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From: Andrew Jones <andrew.jones@linux.dev>
To: kvm-riscv@lists.infradead.org
Subject: [kvm-unit-tests PATCH v2 1/7] riscv: Fix virt_to_phys again
Date: Mon, 12 Aug 2024 15:44:53 +0200	[thread overview]
Message-ID: <20240812134451.112498-10-andrew.jones@linux.dev> (raw)
In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev>

The last fix was a bit hasty since we didn't double check that
virt_to_phys() was the right place for the fix, rather than
virt_to_pte_phys(), and of course it was the latter... All
architectures add on the offset in virt_to_pte_phys() and then
simply wrap virt_to_pte_phys() with virt_to_phys(), if they
implement virt_to_phys() at all. RISCV shouldn't be different.

Fixes: e1dd4ea76894 ("riscv: Fix virt_to_phys")
Fixes: 23100d972705 ("riscv: Enable vmalloc")
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
---
 lib/riscv/mmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c
index 165a7034bc69..2c9c4f376ac9 100644
--- a/lib/riscv/mmu.c
+++ b/lib/riscv/mmu.c
@@ -179,7 +179,7 @@ phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt)
 	if (!pte_val(*ptep))
 		return 0;
 
-	return __pa(pteval_to_ptep(pte_val(*ptep)));
+	return __pa(pteval_to_ptep(pte_val(*ptep))) | offset_in_page(virt);
 }
 
 unsigned long virt_to_phys(volatile void *address)
@@ -194,7 +194,7 @@ unsigned long virt_to_phys(volatile void *address)
 	paddr = virt_to_pte_phys(pgtable, (void *)address);
 	assert(sizeof(long) == 8 || !(paddr >> 32));
 
-	return (unsigned long)paddr | offset_in_page(address);
+	return (unsigned long)paddr;
 }
 
 void *phys_to_virt(unsigned long address)
-- 
2.45.2



WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <andrew.jones@linux.dev>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com
Subject: [kvm-unit-tests PATCH v2 1/7] riscv: Fix virt_to_phys again
Date: Mon, 12 Aug 2024 15:44:53 +0200	[thread overview]
Message-ID: <20240812134451.112498-10-andrew.jones@linux.dev> (raw)
In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev>

The last fix was a bit hasty since we didn't double check that
virt_to_phys() was the right place for the fix, rather than
virt_to_pte_phys(), and of course it was the latter... All
architectures add on the offset in virt_to_pte_phys() and then
simply wrap virt_to_pte_phys() with virt_to_phys(), if they
implement virt_to_phys() at all. RISCV shouldn't be different.

Fixes: e1dd4ea76894 ("riscv: Fix virt_to_phys")
Fixes: 23100d972705 ("riscv: Enable vmalloc")
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
---
 lib/riscv/mmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c
index 165a7034bc69..2c9c4f376ac9 100644
--- a/lib/riscv/mmu.c
+++ b/lib/riscv/mmu.c
@@ -179,7 +179,7 @@ phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt)
 	if (!pte_val(*ptep))
 		return 0;
 
-	return __pa(pteval_to_ptep(pte_val(*ptep)));
+	return __pa(pteval_to_ptep(pte_val(*ptep))) | offset_in_page(virt);
 }
 
 unsigned long virt_to_phys(volatile void *address)
@@ -194,7 +194,7 @@ unsigned long virt_to_phys(volatile void *address)
 	paddr = virt_to_pte_phys(pgtable, (void *)address);
 	assert(sizeof(long) == 8 || !(paddr >> 32));
 
-	return (unsigned long)paddr | offset_in_page(address);
+	return (unsigned long)paddr;
 }
 
 void *phys_to_virt(unsigned long address)
-- 
2.45.2


  reply	other threads:[~2024-08-12 13:44 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-12 13:44 [kvm-unit-tests PATCH v2 0/7] riscv: 32-bit should use phys_addr_t Andrew Jones
2024-08-12 13:44 ` Andrew Jones
2024-08-12 13:44 ` Andrew Jones [this message]
2024-08-12 13:44   ` [kvm-unit-tests PATCH v2 1/7] riscv: Fix virt_to_phys again Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 2/7] riscv: setup: Apply VA_BASE check to rv64 Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 3/7] riscv: Support up to 34-bit physical addresses on rv32, sort of Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 4/7] riscv: Track memory above 3G Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 5/7] riscv: mmu: Sanity check input physical addresses Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 6/7] riscv: Define and use PHYS_PAGE_MASK Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 7/7] riscv: mmu: Ensure order of PTE update and sfence Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 14:07 ` [kvm-unit-tests PATCH v2 0/7] riscv: 32-bit should use phys_addr_t Andrew Jones
2024-08-12 14:07   ` Andrew Jones

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