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From: Andrew Jones <andrew.jones@linux.dev>
To: kvm-riscv@lists.infradead.org
Subject: [kvm-unit-tests PATCH v2 5/7] riscv: mmu: Sanity check input physical addresses
Date: Mon, 12 Aug 2024 15:44:57 +0200	[thread overview]
Message-ID: <20240812134451.112498-14-andrew.jones@linux.dev> (raw)
In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev>

Ensure physical addresses aren't using bits they shouldn't be.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
---
 lib/riscv/asm/mmu.h | 2 ++
 lib/riscv/mmu.c     | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/lib/riscv/asm/mmu.h b/lib/riscv/asm/mmu.h
index bb60f0895e2b..9cd760093666 100644
--- a/lib/riscv/asm/mmu.h
+++ b/lib/riscv/asm/mmu.h
@@ -6,6 +6,8 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 
+#define PHYS_MASK	((phys_addr_t)SATP_PPN << PAGE_SHIFT | (PAGE_SIZE - 1))
+
 static inline pgd_t *current_pgtable(void)
 {
 	return (pgd_t *)((csr_read(CSR_SATP) & SATP_PPN) << PAGE_SHIFT);
diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c
index 6ab1f15a99ae..24f9f90e51c3 100644
--- a/lib/riscv/mmu.c
+++ b/lib/riscv/mmu.c
@@ -77,6 +77,8 @@ pteval_t *install_page(pgd_t *pgtable, phys_addr_t phys, void *virt)
 	phys_addr_t paddr = phys & PAGE_MASK;
 	uintptr_t vaddr = (uintptr_t)virt & PAGE_MASK;
 
+	assert(phys == (phys & PHYS_MASK));
+
 	return __install_page(pgtable, paddr, vaddr,
 			      __pgprot(_PAGE_READ | _PAGE_WRITE), true);
 }
@@ -89,6 +91,8 @@ void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
 	uintptr_t vaddr = virt_offset & PAGE_MASK;
 	uintptr_t virt_end = phys_end - paddr + vaddr;
 
+	assert(phys_start == (phys_start & PHYS_MASK));
+	assert(phys_end == (phys_end & PHYS_MASK));
 	assert(phys_start < phys_end);
 
 	for (; vaddr < virt_end; vaddr += PAGE_SIZE, paddr += PAGE_SIZE)
-- 
2.45.2



WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <andrew.jones@linux.dev>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: atishp@rivosinc.com, cade.richard@berkeley.edu, jamestiotio@gmail.com
Subject: [kvm-unit-tests PATCH v2 5/7] riscv: mmu: Sanity check input physical addresses
Date: Mon, 12 Aug 2024 15:44:57 +0200	[thread overview]
Message-ID: <20240812134451.112498-14-andrew.jones@linux.dev> (raw)
In-Reply-To: <20240812134451.112498-9-andrew.jones@linux.dev>

Ensure physical addresses aren't using bits they shouldn't be.

Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
---
 lib/riscv/asm/mmu.h | 2 ++
 lib/riscv/mmu.c     | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/lib/riscv/asm/mmu.h b/lib/riscv/asm/mmu.h
index bb60f0895e2b..9cd760093666 100644
--- a/lib/riscv/asm/mmu.h
+++ b/lib/riscv/asm/mmu.h
@@ -6,6 +6,8 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 
+#define PHYS_MASK	((phys_addr_t)SATP_PPN << PAGE_SHIFT | (PAGE_SIZE - 1))
+
 static inline pgd_t *current_pgtable(void)
 {
 	return (pgd_t *)((csr_read(CSR_SATP) & SATP_PPN) << PAGE_SHIFT);
diff --git a/lib/riscv/mmu.c b/lib/riscv/mmu.c
index 6ab1f15a99ae..24f9f90e51c3 100644
--- a/lib/riscv/mmu.c
+++ b/lib/riscv/mmu.c
@@ -77,6 +77,8 @@ pteval_t *install_page(pgd_t *pgtable, phys_addr_t phys, void *virt)
 	phys_addr_t paddr = phys & PAGE_MASK;
 	uintptr_t vaddr = (uintptr_t)virt & PAGE_MASK;
 
+	assert(phys == (phys & PHYS_MASK));
+
 	return __install_page(pgtable, paddr, vaddr,
 			      __pgprot(_PAGE_READ | _PAGE_WRITE), true);
 }
@@ -89,6 +91,8 @@ void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
 	uintptr_t vaddr = virt_offset & PAGE_MASK;
 	uintptr_t virt_end = phys_end - paddr + vaddr;
 
+	assert(phys_start == (phys_start & PHYS_MASK));
+	assert(phys_end == (phys_end & PHYS_MASK));
 	assert(phys_start < phys_end);
 
 	for (; vaddr < virt_end; vaddr += PAGE_SIZE, paddr += PAGE_SIZE)
-- 
2.45.2


  parent reply	other threads:[~2024-08-12 13:44 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-12 13:44 [kvm-unit-tests PATCH v2 0/7] riscv: 32-bit should use phys_addr_t Andrew Jones
2024-08-12 13:44 ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 1/7] riscv: Fix virt_to_phys again Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 2/7] riscv: setup: Apply VA_BASE check to rv64 Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 3/7] riscv: Support up to 34-bit physical addresses on rv32, sort of Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 4/7] riscv: Track memory above 3G Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` Andrew Jones [this message]
2024-08-12 13:44   ` [kvm-unit-tests PATCH v2 5/7] riscv: mmu: Sanity check input physical addresses Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 6/7] riscv: Define and use PHYS_PAGE_MASK Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 13:44 ` [kvm-unit-tests PATCH v2 7/7] riscv: mmu: Ensure order of PTE update and sfence Andrew Jones
2024-08-12 13:44   ` Andrew Jones
2024-08-12 14:07 ` [kvm-unit-tests PATCH v2 0/7] riscv: 32-bit should use phys_addr_t Andrew Jones
2024-08-12 14:07   ` Andrew Jones

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