From: Ryan Chen <ryan_chen@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v14 1/3] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Wed, 2 Oct 2024 15:02:11 +0800 [thread overview]
Message-ID: <20241002070213.1165263-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20241002070213.1165263-1-ryan_chen@aspeedtech.com>
Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/i2c/aspeed,i2c.yaml | 51 +++++++++++++++++--
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
maintainers:
- Rayn Chen <rayn_chen@aspeedtech.com>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
enum:
@@ -49,12 +46,50 @@ properties:
description:
states that there is another master active on this bus
+ aspeed,enable-dma:
+ type: boolean
+ description: |
+ I2C bus enable dma mode transfer.
+
+ ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+ single DMA engine. DTS files can specify the data transfer mode to/from
+ the device, either DMA or programmed I/O. However, hardware limitations
+ may require a DTS to manually allocate which controller can use DMA mode.
+ The "aspeed,enable-dma" property allows control of this.
+
+ In cases where one the hardware design results in a specific
+ controller handling a larger amount of data, a DTS would likely
+ enable DMA mode for that one controller.
+
+ aspeed,global-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of i2c global register node.
+
required:
- reg
- compatible
- clocks
- resets
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-i2cv2
+
+ then:
+ properties:
+ reg:
+ minItems: 2
+ required:
+ - aspeed,global-regs
+ else:
+ properties:
+ aspeed,global-regs: false
+ aspeed,enable-dma: false
+
unevaluatedProperties: false
examples:
@@ -71,3 +106,13 @@ examples:
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ i2c1: i2c at 80 {
+ compatible = "aspeed,ast2600-i2cv2";
+ reg = <0x80 0x80>, <0xc00 0x20>;
+ aspeed,global-regs = <&i2c_global>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_I2C>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: <brendan.higgins@linux.dev>, <benh@kernel.crashing.org>,
<joel@jms.id.au>, <andi.shyti@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<andrew@codeconstruct.com.au>, <p.zabel@pengutronix.de>,
<andriy.shevchenko@linux.intel.com>, <linux-i2c@vger.kernel.org>,
<openbmc@lists.ozlabs.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<ryan_chen@aspeedtech.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v14 1/3] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Wed, 2 Oct 2024 15:02:11 +0800 [thread overview]
Message-ID: <20241002070213.1165263-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20241002070213.1165263-1-ryan_chen@aspeedtech.com>
Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/i2c/aspeed,i2c.yaml | 51 +++++++++++++++++--
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
maintainers:
- Rayn Chen <rayn_chen@aspeedtech.com>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
enum:
@@ -49,12 +46,50 @@ properties:
description:
states that there is another master active on this bus
+ aspeed,enable-dma:
+ type: boolean
+ description: |
+ I2C bus enable dma mode transfer.
+
+ ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+ single DMA engine. DTS files can specify the data transfer mode to/from
+ the device, either DMA or programmed I/O. However, hardware limitations
+ may require a DTS to manually allocate which controller can use DMA mode.
+ The "aspeed,enable-dma" property allows control of this.
+
+ In cases where one the hardware design results in a specific
+ controller handling a larger amount of data, a DTS would likely
+ enable DMA mode for that one controller.
+
+ aspeed,global-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of i2c global register node.
+
required:
- reg
- compatible
- clocks
- resets
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-i2cv2
+
+ then:
+ properties:
+ reg:
+ minItems: 2
+ required:
+ - aspeed,global-regs
+ else:
+ properties:
+ aspeed,global-regs: false
+ aspeed,enable-dma: false
+
unevaluatedProperties: false
examples:
@@ -71,3 +106,13 @@ examples:
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ i2c1: i2c@80 {
+ compatible = "aspeed,ast2600-i2cv2";
+ reg = <0x80 0x80>, <0xc00 0x20>;
+ aspeed,global-regs = <&i2c_global>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_I2C>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
next prev parent reply other threads:[~2024-10-02 7:02 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-02 7:02 [PATCH v14 0/3] Add ASPEED AST2600 I2Cv2 controller driver Ryan Chen
2024-10-02 7:02 ` Ryan Chen
2024-10-02 7:02 ` Ryan Chen [this message]
2024-10-02 7:02 ` [PATCH v14 1/3] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Ryan Chen
2024-10-02 7:02 ` [PATCH v14 2/3] i2c: aspeed: support AST2600 i2c new register mode driver Ryan Chen
2024-10-02 7:02 ` Ryan Chen
2024-10-05 7:36 ` kernel test robot
2024-10-05 7:36 ` kernel test robot
2024-10-10 13:40 ` Andy Shevchenko
2024-10-10 13:40 ` Andy Shevchenko
2024-10-10 13:40 ` Andy Shevchenko
2024-10-11 0:16 ` Ryan Chen
2024-10-11 0:16 ` Ryan Chen
2024-10-11 0:16 ` Ryan Chen
2024-10-05 10:00 ` kernel test robot
2024-10-05 10:00 ` kernel test robot
2024-10-02 7:02 ` [PATCH v14 3/3] i2c: aspeed: support AST2600 i2c new register slave " Ryan Chen
2024-10-02 7:02 ` Ryan Chen
2024-10-02 14:35 ` [PATCH v14 0/3] Add ASPEED AST2600 I2Cv2 controller driver Andy Shevchenko
2024-10-02 14:35 ` Andy Shevchenko
2024-10-02 14:35 ` Andy Shevchenko
2024-10-03 3:41 ` Ryan Chen
2024-10-03 3:41 ` Ryan Chen
2024-10-03 3:41 ` Ryan Chen
2024-10-03 10:15 ` Andy Shevchenko
2024-10-03 10:15 ` Andy Shevchenko
2024-10-03 10:15 ` Andy Shevchenko
2024-10-03 12:20 ` Andi Shyti
2024-10-03 12:20 ` Andi Shyti
2024-10-03 12:20 ` Andi Shyti
2024-10-03 12:39 ` Andy Shevchenko
2024-10-03 12:39 ` Andy Shevchenko
2024-10-03 12:39 ` Andy Shevchenko
2024-10-04 6:58 ` Ryan Chen
2024-10-04 6:58 ` Ryan Chen
2024-10-04 6:58 ` Ryan Chen
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