From: Damien Le Moal <dlemoal@kernel.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
Rick Wertenbroek <rick.wertenbroek@gmail.com>,
Wilfred Mallawa <wilfred.mallawa@wdc.com>,
Niklas Cassel <cassel@kernel.org>
Subject: [PATCH v3 02/12] PCI: rockchip-ep: Use a macro to define EP controller .align feature
Date: Mon, 7 Oct 2024 13:12:08 +0900 [thread overview]
Message-ID: <20241007041218.157516-3-dlemoal@kernel.org> (raw)
In-Reply-To: <20241007041218.157516-1-dlemoal@kernel.org>
Introduce the macro ROCKCHIP_PCIE_AT_SIZE_ALIGN defined using
ROCKCHIP_PCIE_AT_MIN_NUM_BITS to initialize the .align field of the
controller epc_features structure, avoiding using the "magic" value 8
directly.
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
drivers/pci/controller/pcie-rockchip-ep.c | 2 +-
drivers/pci/controller/pcie-rockchip.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 27a7febb74e0..5a07084fb7c4 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -446,7 +446,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = {
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = false,
- .align = 256,
+ .align = ROCKCHIP_PCIE_AT_SIZE_ALIGN,
};
static const struct pci_epc_features*
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 15ee949f2485..02368ce9bd54 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -248,6 +248,7 @@
#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8
#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20
+#define ROCKCHIP_PCIE_AT_SIZE_ALIGN (1UL << ROCKCHIP_PCIE_AT_MIN_NUM_BITS)
#define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \
(PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008)
--
2.46.2
WARNING: multiple messages have this Message-ID (diff)
From: Damien Le Moal <dlemoal@kernel.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
Rick Wertenbroek <rick.wertenbroek@gmail.com>,
Wilfred Mallawa <wilfred.mallawa@wdc.com>,
Niklas Cassel <cassel@kernel.org>
Subject: [PATCH v3 02/12] PCI: rockchip-ep: Use a macro to define EP controller .align feature
Date: Mon, 7 Oct 2024 13:12:08 +0900 [thread overview]
Message-ID: <20241007041218.157516-3-dlemoal@kernel.org> (raw)
In-Reply-To: <20241007041218.157516-1-dlemoal@kernel.org>
Introduce the macro ROCKCHIP_PCIE_AT_SIZE_ALIGN defined using
ROCKCHIP_PCIE_AT_MIN_NUM_BITS to initialize the .align field of the
controller epc_features structure, avoiding using the "magic" value 8
directly.
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
drivers/pci/controller/pcie-rockchip-ep.c | 2 +-
drivers/pci/controller/pcie-rockchip.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 27a7febb74e0..5a07084fb7c4 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -446,7 +446,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = {
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = false,
- .align = 256,
+ .align = ROCKCHIP_PCIE_AT_SIZE_ALIGN,
};
static const struct pci_epc_features*
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 15ee949f2485..02368ce9bd54 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -248,6 +248,7 @@
#define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8
#define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20
+#define ROCKCHIP_PCIE_AT_SIZE_ALIGN (1UL << ROCKCHIP_PCIE_AT_MIN_NUM_BITS)
#define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \
(PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008)
--
2.46.2
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next prev parent reply other threads:[~2024-10-07 4:12 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-07 4:12 [PATCH v3 00/12] Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 01/12] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 7:02 ` Manivannan Sadhasivam
2024-10-10 7:02 ` Manivannan Sadhasivam
2024-10-10 8:41 ` Damien Le Moal
2024-10-10 8:41 ` Damien Le Moal
2024-10-10 10:36 ` Manivannan Sadhasivam
2024-10-10 10:36 ` Manivannan Sadhasivam
2024-10-07 4:12 ` Damien Le Moal [this message]
2024-10-07 4:12 ` [PATCH v3 02/12] PCI: rockchip-ep: Use a macro to define EP controller .align feature Damien Le Moal
2024-10-10 7:03 ` Manivannan Sadhasivam
2024-10-10 7:03 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 03/12] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 7:09 ` Manivannan Sadhasivam
2024-10-10 7:09 ` Manivannan Sadhasivam
2024-10-11 8:22 ` Damien Le Moal
2024-10-11 8:22 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 04/12] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 7:13 ` Manivannan Sadhasivam
2024-10-10 7:13 ` Manivannan Sadhasivam
2024-10-12 9:31 ` Manivannan Sadhasivam
2024-10-12 9:31 ` Manivannan Sadhasivam
2024-10-12 12:02 ` Damien Le Moal
2024-10-12 12:02 ` Damien Le Moal
2024-10-12 12:39 ` Manivannan Sadhasivam
2024-10-12 12:39 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 05/12] PCI: rockchip-ep: Implement the .map_align() controller operation Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 2:43 ` kernel test robot
2024-10-10 2:43 ` kernel test robot
2024-10-10 3:44 ` kernel test robot
2024-10-10 3:44 ` kernel test robot
2024-10-07 4:12 ` [PATCH v3 06/12] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 7:23 ` Manivannan Sadhasivam
2024-10-10 7:23 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 07/12] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 7:25 ` Manivannan Sadhasivam
2024-10-10 7:25 ` Manivannan Sadhasivam
2024-10-10 8:09 ` Manivannan Sadhasivam
2024-10-10 8:09 ` Manivannan Sadhasivam
2024-10-10 8:37 ` Damien Le Moal
2024-10-10 8:37 ` Damien Le Moal
2024-10-11 8:30 ` Damien Le Moal
2024-10-11 8:30 ` Damien Le Moal
2024-10-12 12:14 ` Manivannan Sadhasivam
2024-10-12 12:14 ` Manivannan Sadhasivam
2024-10-11 8:25 ` Damien Le Moal
2024-10-11 8:25 ` Damien Le Moal
2024-10-12 12:12 ` Manivannan Sadhasivam
2024-10-12 12:12 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 08/12] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 8:22 ` Manivannan Sadhasivam
2024-10-10 8:22 ` Manivannan Sadhasivam
2024-10-11 8:45 ` Damien Le Moal
2024-10-11 8:45 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 09/12] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 8:24 ` Manivannan Sadhasivam
2024-10-10 8:24 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 10/12] PCI: rockchip-ep: Improve link training Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 10:35 ` Manivannan Sadhasivam
2024-10-10 10:35 ` Manivannan Sadhasivam
2024-10-11 8:55 ` Damien Le Moal
2024-10-11 8:55 ` Damien Le Moal
2024-10-12 12:16 ` Manivannan Sadhasivam
2024-10-12 12:16 ` Manivannan Sadhasivam
2024-10-17 0:52 ` Damien Le Moal
2024-10-17 0:52 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 11/12] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-07 6:12 ` Krzysztof Kozlowski
2024-10-07 6:12 ` Krzysztof Kozlowski
2024-10-07 6:50 ` Damien Le Moal
2024-10-07 6:50 ` Damien Le Moal
2024-10-07 6:54 ` Krzysztof Kozlowski
2024-10-07 6:54 ` Krzysztof Kozlowski
2024-10-07 6:58 ` Damien Le Moal
2024-10-07 6:58 ` Damien Le Moal
2024-10-07 7:00 ` Krzysztof Kozlowski
2024-10-07 7:00 ` Krzysztof Kozlowski
2024-10-07 7:22 ` Damien Le Moal
2024-10-07 7:22 ` Damien Le Moal
2024-10-07 7:27 ` Manivannan Sadhasivam
2024-10-07 7:27 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 12/12] PCI: rockchip-ep: Handle PERST# signal in endpoint mode Damien Le Moal
2024-10-07 4:12 ` Damien Le Moal
2024-10-10 4:35 ` kernel test robot
2024-10-10 4:35 ` kernel test robot
2024-10-10 10:49 ` Manivannan Sadhasivam
2024-10-10 10:49 ` Manivannan Sadhasivam
2024-10-11 9:30 ` Damien Le Moal
2024-10-11 9:30 ` Damien Le Moal
2024-10-12 12:31 ` Manivannan Sadhasivam
2024-10-12 12:31 ` Manivannan Sadhasivam
2024-10-15 6:24 ` Damien Le Moal
2024-10-15 6:24 ` Damien Le Moal
2024-10-07 4:45 ` [PATCH v3 00/12] Damien Le Moal
2024-10-07 10:02 ` Niklas Cassel
2024-10-07 10:02 ` Niklas Cassel
2024-10-07 10:26 ` Damien Le Moal
2024-10-07 10:26 ` Damien Le Moal
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