From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <ira.weiny@intel.com>, Davidlohr Bueso <dave@stgolabs.net>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v2 6/6] cxl/test: Improve init-order fidelity relative to real-world systems
Date: Thu, 24 Oct 2024 13:17:21 +0100 [thread overview]
Message-ID: <20241024131721.00000a58@Huawei.com> (raw)
In-Reply-To: <172964784521.81806.15791069994065969243.stgit@dwillia2-xfh.jf.intel.com>
On Tue, 22 Oct 2024 18:44:06 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> The investigation of an initialization failure [1] highlighted that
> cxl_test does not reflect the init-order of real world systems. The
> expected order is root/bus first then async probing of the memory
> devices.
>
> Fix up cxl_test to reflect that order. While it did not reproduce the
> initial bug report (since that is dependent on built-in vs modular
> builds), it did reveal a separate latent bug in the subsystem's decoder
> shutdown flow. Fix for that sent separately.
>
> Link: http://lore.kernel.org/20241004212504.1246-1-gourry@gourry.net [1]
> Cc: Davidlohr Bueso <dave@stgolabs.net>
> Cc: Jonathan Cameron <jonathan.cameron@huawei.com>
> Cc: Dave Jiang <dave.jiang@intel.com>
> Cc: Alison Schofield <alison.schofield@intel.com>
> Cc: Vishal Verma <vishal.l.verma@intel.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
I'm never particularly confident reviewing cxl_test but this looks fine to
me.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
next prev parent reply other threads:[~2024-10-24 12:17 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 1:43 [PATCH v2 0/6] cxl: Initialization and shutdown fixes Dan Williams
2024-10-23 1:43 ` [PATCH v2 1/6] cxl/port: Fix CXL port initialization order when the subsystem is built-in Dan Williams
2024-10-24 9:42 ` Jonathan Cameron
2024-10-24 16:19 ` Dan Williams
2024-10-24 16:39 ` Jonathan Cameron
2024-10-24 10:36 ` Alejandro Lucero Palau
2024-10-24 16:32 ` Dan Williams
2024-10-25 8:43 ` Alejandro Lucero Palau
2024-10-25 15:19 ` Dan Williams
2024-10-24 14:14 ` Ira Weiny
2024-10-25 19:32 ` [PATCH v3 " Dan Williams
2024-10-23 1:43 ` [PATCH v2 2/6] cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices() Dan Williams
2024-10-23 15:57 ` Gregory Price
2024-10-24 9:43 ` Jonathan Cameron
2024-10-24 14:29 ` Ira Weiny
2024-10-23 1:43 ` [PATCH v2 3/6] cxl/acpi: Ensure ports ready at cxl_acpi_probe() return Dan Williams
2024-10-23 15:58 ` Gregory Price
2024-10-24 9:44 ` Jonathan Cameron
2024-10-24 14:34 ` Ira Weiny
2024-10-23 1:43 ` [PATCH v2 4/6] cxl/port: Fix use-after-free, permit out-of-order decoder shutdown Dan Williams
2024-10-24 15:55 ` Ira Weiny
2024-10-23 1:43 ` [PATCH v2 5/6] cxl/port: Prevent out-of-order decoder allocation Dan Williams
2024-10-24 12:10 ` Jonathan Cameron
2024-10-24 16:20 ` Ira Weiny
2024-10-23 1:44 ` [PATCH v2 6/6] cxl/test: Improve init-order fidelity relative to real-world systems Dan Williams
2024-10-24 12:17 ` Jonathan Cameron [this message]
2024-10-24 16:32 ` Ira Weiny
2024-10-23 13:12 ` [PATCH v2 0/6] cxl: Initialization and shutdown fixes Robert Richter
2024-10-23 16:00 ` Gregory Price
2024-10-23 20:34 ` Dan Williams
2024-10-24 11:56 ` Robert Richter
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