From: Rob Herring <robh@kernel.org>
To: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Vinod Koul <vkoul@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Minda Chen <minda.chen@starfivetech.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Iyappan Subramanian <iyappan@os.amperecomputing.com>,
Keyur Chudgar <keyur@os.amperecomputing.com>,
Quan Nguyen <quan@os.amperecomputing.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-msm@vger.kernel.org, imx@lists.linux.dev,
devicetree@vger.kernel.org, NXP S32 Linux Team <s32@nxp.com>
Subject: Re: [PATCH v5 13/16] dt-bindings: net: Add DT bindings for DWMAC on NXP S32G/R SoCs
Date: Tue, 19 Nov 2024 14:39:03 -0600 [thread overview]
Message-ID: <20241119203903.GA2249015-robh@kernel.org> (raw)
In-Reply-To: <20241119-upstream_s32cc_gmac-v5-13-7dcc90fcffef@oss.nxp.com>
On Tue, Nov 19, 2024 at 04:00:19PM +0100, Jan Petrous (OSS) wrote:
> Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx
> and S32R45 automotive series SoCs.
>
> Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
> ---
> .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 105 +++++++++++++++++++++
> .../devicetree/bindings/net/snps,dwmac.yaml | 3 +
> 2 files changed, 108 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
> new file mode 100644
> index 000000000000..a141e826a295
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2021-2024 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller
> +
> +maintainers:
> + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
> +
> +description:
> + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs.
> + The SoC series S32G2xx and S32G3xx feature one DWMAC instance,
> + the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
> + interface over Pinctrl device or the output can be routed
> + to the embedded SerDes for SGMII connectivity.
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: nxp,s32g2-dwmac
> + - items:
> + - enum:
> + - nxp,s32g3-dwmac
> + - nxp,s32r45-dwmac
> + - const: nxp,s32g2-dwmac
> +
> + reg:
> + items:
> + - description: Main GMAC registers
> + - description: GMAC PHY mode control register
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + const: macirq
> +
> + clocks:
> + items:
> + - description: Main GMAC clock
> + - description: Transmit clock
> + - description: Receive clock
> + - description: PTP reference clock
> +
> + clock-names:
> + items:
> + - const: stmmaceth
> + - const: tx
> + - const: rx
> + - const: ptp_ref
> +
> +required:
> + - clocks
> + - clock-names
> +
> +allOf:
> + - $ref: snps,dwmac.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/phy/phy.h>
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + ethernet@4033c000 {
> + compatible = "nxp,s32g2-dwmac";
> + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */
> + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + snps,mtl-rx-config = <&mtl_rx_setup>;
> + snps,mtl-tx-config = <&mtl_tx_setup>;
> + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
> + clock-names = "stmmaceth", "tx", "rx", "ptp_ref";
> + phy-mode = "rgmii-id";
> + phy-handle = <&phy0>;
> +
> + mtl_rx_setup: rx-queues-config {
> + snps,rx-queues-to-use = <5>;
> + };
> +
> + mtl_tx_setup: tx-queues-config {
> + snps,tx-queues-to-use = <5>;
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> + };
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 4e2ba1bf788c..a88d1c236eaf 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -66,6 +66,9 @@ properties:
> - ingenic,x2000-mac
> - loongson,ls2k-dwmac
> - loongson,ls7a-dwmac
> + - nxp,s32g2-dwmac
> + - nxp,s32g3-dwmac
> + - nxp,s32r-dwmac
You really only need to add nxp,s32g2-dwmac since it's always present.
Other than the yamllint issue,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
Cc: Andrew Lunn <andrew@lunn.ch>, NXP S32 Linux Team <s32@nxp.com>,
Emil Renner Berthing <kernel@esmil.dk>,
imx@lists.linux.dev,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Eric Dumazet <edumazet@google.com>,
Iyappan Subramanian <iyappan@os.amperecomputing.com>,
Quan Nguyen <quan@os.amperecomputing.com>,
Fabio Estevam <festevam@gmail.com>,
linux-stm32@st-md-mailman.stormreply.com,
Russell King <linux@armlinux.org.uk>,
Jose Abreu <joabreu@synopsys.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Richard Cochran <richardcochran@gmail.com>,
devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
linux-arm-msm@vger.kernel.org,
Sascha Hauer <s.hauer@pengutronix.de>,
Keyur Chudgar <keyur@os.amperecomputing.com>,
Minda Chen <minda.chen@starfivetech.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, Vinod Koul <vkoul@kernel.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
Heiner Kallweit <hkallweit1@gmail.com>
Subject: Re: [PATCH v5 13/16] dt-bindings: net: Add DT bindings for DWMAC on NXP S32G/R SoCs
Date: Tue, 19 Nov 2024 14:39:03 -0600 [thread overview]
Message-ID: <20241119203903.GA2249015-robh@kernel.org> (raw)
In-Reply-To: <20241119-upstream_s32cc_gmac-v5-13-7dcc90fcffef@oss.nxp.com>
On Tue, Nov 19, 2024 at 04:00:19PM +0100, Jan Petrous (OSS) wrote:
> Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx
> and S32R45 automotive series SoCs.
>
> Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
> ---
> .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 105 +++++++++++++++++++++
> .../devicetree/bindings/net/snps,dwmac.yaml | 3 +
> 2 files changed, 108 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
> new file mode 100644
> index 000000000000..a141e826a295
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2021-2024 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller
> +
> +maintainers:
> + - Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
> +
> +description:
> + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs.
> + The SoC series S32G2xx and S32G3xx feature one DWMAC instance,
> + the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
> + interface over Pinctrl device or the output can be routed
> + to the embedded SerDes for SGMII connectivity.
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: nxp,s32g2-dwmac
> + - items:
> + - enum:
> + - nxp,s32g3-dwmac
> + - nxp,s32r45-dwmac
> + - const: nxp,s32g2-dwmac
> +
> + reg:
> + items:
> + - description: Main GMAC registers
> + - description: GMAC PHY mode control register
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + const: macirq
> +
> + clocks:
> + items:
> + - description: Main GMAC clock
> + - description: Transmit clock
> + - description: Receive clock
> + - description: PTP reference clock
> +
> + clock-names:
> + items:
> + - const: stmmaceth
> + - const: tx
> + - const: rx
> + - const: ptp_ref
> +
> +required:
> + - clocks
> + - clock-names
> +
> +allOf:
> + - $ref: snps,dwmac.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/phy/phy.h>
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + ethernet@4033c000 {
> + compatible = "nxp,s32g2-dwmac";
> + reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */
> + <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + snps,mtl-rx-config = <&mtl_rx_setup>;
> + snps,mtl-tx-config = <&mtl_tx_setup>;
> + clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
> + clock-names = "stmmaceth", "tx", "rx", "ptp_ref";
> + phy-mode = "rgmii-id";
> + phy-handle = <&phy0>;
> +
> + mtl_rx_setup: rx-queues-config {
> + snps,rx-queues-to-use = <5>;
> + };
> +
> + mtl_tx_setup: tx-queues-config {
> + snps,tx-queues-to-use = <5>;
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> + };
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 4e2ba1bf788c..a88d1c236eaf 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -66,6 +66,9 @@ properties:
> - ingenic,x2000-mac
> - loongson,ls2k-dwmac
> - loongson,ls7a-dwmac
> + - nxp,s32g2-dwmac
> + - nxp,s32g3-dwmac
> + - nxp,s32r-dwmac
You really only need to add nxp,s32g2-dwmac since it's always present.
Other than the yamllint issue,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2024-11-19 20:39 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-19 15:00 [PATCH v5 00/16] Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45 Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 15:00 ` [PATCH v5 01/16] net: driver: stmmac: Fix CSR divider comment Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 15:00 ` [PATCH v5 02/16] net: driver: stmmac: Extend CSR calc support Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:35 ` Russell King (Oracle)
2024-11-19 16:35 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 03/16] net: stmmac: Fix clock rate variables size Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:29 ` Russell King (Oracle)
2024-11-19 16:29 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 04/16] net: phy: Add helper for mapping RGMII link speed to clock rate Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:41 ` Russell King (Oracle)
2024-11-19 16:41 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 05/16] net: dwmac-dwc-qos-eth: Use helper rgmii_clock Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:42 ` Russell King (Oracle)
2024-11-19 16:42 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 06/16] net: dwmac-imx: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:42 ` Russell King (Oracle)
2024-11-19 16:42 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 07/16] net: dwmac-intel-plat: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:44 ` Russell King (Oracle)
2024-11-19 16:44 ` Russell King (Oracle)
2024-11-23 6:54 ` Jan Petrous
2024-11-23 6:54 ` Jan Petrous
2024-11-19 15:00 ` [PATCH v5 08/16] net: dwmac-rk: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:45 ` Russell King (Oracle)
2024-11-19 16:45 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 09/16] net: dwmac-starfive: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:46 ` Russell King (Oracle)
2024-11-19 16:46 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 10/16] net: macb: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:46 ` Russell King (Oracle)
2024-11-19 16:46 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 11/16] net: xgene_enet: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:47 ` Russell King (Oracle)
2024-11-19 16:47 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 12/16] net: dwmac-sti: " Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:48 ` Russell King (Oracle)
2024-11-19 16:48 ` Russell King (Oracle)
2024-11-19 15:00 ` [PATCH v5 13/16] dt-bindings: net: Add DT bindings for DWMAC on NXP S32G/R SoCs Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:24 ` Rob Herring (Arm)
2024-11-19 16:24 ` Rob Herring (Arm)
2024-11-24 21:27 ` Jan Petrous
2024-11-24 21:27 ` Jan Petrous
2024-11-19 20:39 ` Rob Herring [this message]
2024-11-19 20:39 ` Rob Herring
2024-11-20 13:01 ` Jan Petrous
2024-11-20 13:01 ` Jan Petrous
2024-11-19 15:00 ` [PATCH v5 14/16] net: stmmac: dwmac-s32: add basic NXP S32G/S32R glue driver Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 16:58 ` Russell King (Oracle)
2024-11-19 16:58 ` Russell King (Oracle)
2024-11-24 22:18 ` Jan Petrous
2024-11-24 22:18 ` Jan Petrous
2024-11-19 15:00 ` [PATCH v5 15/16] MAINTAINERS: Add Jan Petrous as the NXP S32G/R DWMAC driver maintainer Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 15:00 ` [PATCH v5 16/16] net: stmmac: platform: Fix PTP clock rate reading Jan Petrous (OSS)
2024-11-19 15:00 ` Jan Petrous via B4 Relay
2024-11-19 17:09 ` Russell King (Oracle)
2024-11-19 17:09 ` Russell King (Oracle)
2024-11-20 12:59 ` Jan Petrous
2024-11-20 12:59 ` Jan Petrous
2024-11-21 7:45 ` Paolo Abeni
2024-11-21 17:12 ` Jan Petrous
2024-11-21 17:12 ` Jan Petrous
2024-11-19 16:40 ` [PATCH v5 00/16] Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45 Russell King (Oracle)
2024-11-19 16:40 ` Russell King (Oracle)
2024-11-20 11:58 ` Jan Petrous
2024-11-20 11:58 ` Jan Petrous
2024-11-20 11:59 ` Russell King (Oracle)
2024-11-20 11:59 ` Russell King (Oracle)
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