* [PULL 1/7] target/loongarch: Add dynamic function access with CSR register
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 2/7] target/loongarch: Remove static CSR function setting Bibo Mao
` (6 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
With CSR register, dynamic function access is used for CSR register
access in TCG mode, so that csr info can be used by other modules.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
.../tcg/insn_trans/trans_privileged.c.inc | 37 +++++++++++++++++--
target/loongarch/tcg/tcg_loongarch.h | 12 ++++++
target/loongarch/tcg/translate.c | 5 +++
3 files changed, 51 insertions(+), 3 deletions(-)
create mode 100644 target/loongarch/tcg/tcg_loongarch.h
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 30f9b83fb2..96958bd6c1 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -76,7 +76,7 @@ enum {
#define CSR_OFF(NAME) \
CSR_OFF_FLAGS(NAME, 0)
-static const CSRInfo csr_info[] = {
+static CSRInfo csr_info[] = {
CSR_OFF_FLAGS(CRMD, CSRFL_EXITTB),
CSR_OFF(PRMD),
CSR_OFF_FLAGS(EUEN, CSRFL_EXITTB),
@@ -160,9 +160,9 @@ static bool check_plv(DisasContext *ctx)
return false;
}
-static const CSRInfo *get_csr(unsigned csr_num)
+static CSRInfo *get_csr(unsigned csr_num)
{
- const CSRInfo *csr;
+ CSRInfo *csr;
if (csr_num >= ARRAY_SIZE(csr_info)) {
return NULL;
@@ -174,6 +174,37 @@ static const CSRInfo *get_csr(unsigned csr_num)
return csr;
}
+static bool set_csr_trans_func(unsigned int csr_num, GenCSRRead readfn,
+ GenCSRWrite writefn)
+{
+ CSRInfo *csr;
+
+ csr = get_csr(csr_num);
+ if (!csr) {
+ return false;
+ }
+
+ csr->readfn = readfn;
+ csr->writefn = writefn;
+ return true;
+}
+
+#define SET_CSR_FUNC(NAME, read, write) \
+ set_csr_trans_func(LOONGARCH_CSR_##NAME, read, write)
+
+void loongarch_csr_translate_init(void)
+{
+ SET_CSR_FUNC(ESTAT, NULL, gen_helper_csrwr_estat);
+ SET_CSR_FUNC(ASID, NULL, gen_helper_csrwr_asid);
+ SET_CSR_FUNC(PGD, gen_helper_csrrd_pgd, NULL);
+ SET_CSR_FUNC(PWCL, NULL, gen_helper_csrwr_pwcl);
+ SET_CSR_FUNC(CPUID, gen_helper_csrrd_cpuid, NULL);
+ SET_CSR_FUNC(TCFG, NULL, gen_helper_csrwr_tcfg);
+ SET_CSR_FUNC(TVAL, gen_helper_csrrd_tval, NULL);
+ SET_CSR_FUNC(TICLR, NULL, gen_helper_csrwr_ticlr);
+}
+#undef SET_CSR_FUNC
+
static bool check_csr_flags(DisasContext *ctx, const CSRInfo *csr, bool write)
{
if ((csr->flags & CSRFL_READONLY) && write) {
diff --git a/target/loongarch/tcg/tcg_loongarch.h b/target/loongarch/tcg/tcg_loongarch.h
new file mode 100644
index 0000000000..da2539e995
--- /dev/null
+++ b/target/loongarch/tcg/tcg_loongarch.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU LoongArch TCG interface
+ *
+ * Copyright (c) 2025 Loongson Technology Corporation Limited
+ */
+#ifndef TARGET_LOONGARCH_TCG_LOONGARCH_H
+#define TARGET_LOONGARCH_TCG_LOONGARCH_H
+
+void loongarch_csr_translate_init(void);
+
+#endif /* TARGET_LOONGARCH_TCG_LOONGARCH_H */
diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c
index 68be999410..3480f54c71 100644
--- a/target/loongarch/tcg/translate.c
+++ b/target/loongarch/tcg/translate.c
@@ -16,6 +16,7 @@
#include "exec/log.h"
#include "qemu/qemu-print.h"
#include "fpu/softfloat.h"
+#include "tcg_loongarch.h"
#include "translate.h"
#include "internals.h"
#include "vec.h"
@@ -358,4 +359,8 @@ void loongarch_translate_init(void)
offsetof(CPULoongArchState, lladdr), "lladdr");
cpu_llval = tcg_global_mem_new(tcg_env,
offsetof(CPULoongArchState, llval), "llval");
+
+#ifndef CONFIG_USER_ONLY
+ loongarch_csr_translate_init();
+#endif
}
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 2/7] target/loongarch: Remove static CSR function setting
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
2025-01-24 7:00 ` [PULL 1/7] target/loongarch: Add dynamic function access with CSR register Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 3/7] target/loongarch: Add generic csr function type Bibo Mao
` (5 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
Since CSR function setting is done dynamically in TCG mode, remove
static CSR function setting here.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
.../tcg/insn_trans/trans_privileged.c.inc | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 96958bd6c1..b90e14cd2a 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -82,7 +82,7 @@ static CSRInfo csr_info[] = {
CSR_OFF_FLAGS(EUEN, CSRFL_EXITTB),
CSR_OFF_FLAGS(MISC, CSRFL_READONLY),
CSR_OFF(ECFG),
- CSR_OFF_FUNCS(ESTAT, CSRFL_EXITTB, NULL, gen_helper_csrwr_estat),
+ CSR_OFF_FLAGS(ESTAT, CSRFL_EXITTB),
CSR_OFF(ERA),
CSR_OFF(BADV),
CSR_OFF_FLAGS(BADI, CSRFL_READONLY),
@@ -91,15 +91,15 @@ static CSRInfo csr_info[] = {
CSR_OFF(TLBEHI),
CSR_OFF(TLBELO0),
CSR_OFF(TLBELO1),
- CSR_OFF_FUNCS(ASID, CSRFL_EXITTB, NULL, gen_helper_csrwr_asid),
+ CSR_OFF_FLAGS(ASID, CSRFL_EXITTB),
CSR_OFF(PGDL),
CSR_OFF(PGDH),
- CSR_OFF_FUNCS(PGD, CSRFL_READONLY, gen_helper_csrrd_pgd, NULL),
- CSR_OFF_FUNCS(PWCL, 0, NULL, gen_helper_csrwr_pwcl),
+ CSR_OFF_FLAGS(PGD, CSRFL_READONLY),
+ CSR_OFF(PWCL),
CSR_OFF(PWCH),
CSR_OFF(STLBPS),
CSR_OFF(RVACFG),
- CSR_OFF_FUNCS(CPUID, CSRFL_READONLY, gen_helper_csrrd_cpuid, NULL),
+ CSR_OFF_FLAGS(CPUID, CSRFL_READONLY),
CSR_OFF_FLAGS(PRCFG1, CSRFL_READONLY),
CSR_OFF_FLAGS(PRCFG2, CSRFL_READONLY),
CSR_OFF_FLAGS(PRCFG3, CSRFL_READONLY),
@@ -120,10 +120,10 @@ static CSRInfo csr_info[] = {
CSR_OFF_ARRAY(SAVE, 14),
CSR_OFF_ARRAY(SAVE, 15),
CSR_OFF(TID),
- CSR_OFF_FUNCS(TCFG, CSRFL_IO, NULL, gen_helper_csrwr_tcfg),
- CSR_OFF_FUNCS(TVAL, CSRFL_READONLY | CSRFL_IO, gen_helper_csrrd_tval, NULL),
+ CSR_OFF_FLAGS(TCFG, CSRFL_IO),
+ CSR_OFF_FLAGS(TVAL, CSRFL_READONLY | CSRFL_IO),
CSR_OFF(CNTC),
- CSR_OFF_FUNCS(TICLR, CSRFL_IO, NULL, gen_helper_csrwr_ticlr),
+ CSR_OFF_FLAGS(TICLR, CSRFL_IO),
CSR_OFF(LLBCTL),
CSR_OFF(IMPCTL1),
CSR_OFF(IMPCTL2),
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 3/7] target/loongarch: Add generic csr function type
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
2025-01-24 7:00 ` [PULL 1/7] target/loongarch: Add dynamic function access with CSR register Bibo Mao
2025-01-24 7:00 ` [PULL 2/7] target/loongarch: Remove static CSR function setting Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 4/7] target/loongarch: Add common header file for CSR registers Bibo Mao
` (4 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
Parameter type TCGv and TCGv_ptr for function GenCSRRead and GenCSRWrite
is not used in non-TCG mode. Generic csr function type is added here
with parameter void type, so that it passes to compile with non-TCG mode.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
.../tcg/insn_trans/trans_privileged.c.inc | 27 ++++++++++++-------
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index b90e14cd2a..0513cac577 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -44,12 +44,13 @@ GEN_FALSE_TRANS(idle)
typedef void (*GenCSRRead)(TCGv dest, TCGv_ptr env);
typedef void (*GenCSRWrite)(TCGv dest, TCGv_ptr env, TCGv src);
+typedef void (*GenCSRFunc)(void);
typedef struct {
int offset;
int flags;
- GenCSRRead readfn;
- GenCSRWrite writefn;
+ GenCSRFunc readfn;
+ GenCSRFunc writefn;
} CSRInfo;
enum {
@@ -184,8 +185,8 @@ static bool set_csr_trans_func(unsigned int csr_num, GenCSRRead readfn,
return false;
}
- csr->readfn = readfn;
- csr->writefn = writefn;
+ csr->readfn = (GenCSRFunc)readfn;
+ csr->writefn = (GenCSRFunc)writefn;
return true;
}
@@ -222,6 +223,7 @@ static bool trans_csrrd(DisasContext *ctx, arg_csrrd *a)
{
TCGv dest;
const CSRInfo *csr;
+ GenCSRRead readfn;
if (check_plv(ctx)) {
return false;
@@ -233,8 +235,9 @@ static bool trans_csrrd(DisasContext *ctx, arg_csrrd *a)
} else {
check_csr_flags(ctx, csr, false);
dest = gpr_dst(ctx, a->rd, EXT_NONE);
- if (csr->readfn) {
- csr->readfn(dest, tcg_env);
+ readfn = (GenCSRRead)csr->readfn;
+ if (readfn) {
+ readfn(dest, tcg_env);
} else {
tcg_gen_ld_tl(dest, tcg_env, csr->offset);
}
@@ -247,6 +250,7 @@ static bool trans_csrwr(DisasContext *ctx, arg_csrwr *a)
{
TCGv dest, src1;
const CSRInfo *csr;
+ GenCSRWrite writefn;
if (check_plv(ctx)) {
return false;
@@ -262,9 +266,10 @@ static bool trans_csrwr(DisasContext *ctx, arg_csrwr *a)
return false;
}
src1 = gpr_src(ctx, a->rd, EXT_NONE);
- if (csr->writefn) {
+ writefn = (GenCSRWrite)csr->writefn;
+ if (writefn) {
dest = gpr_dst(ctx, a->rd, EXT_NONE);
- csr->writefn(dest, tcg_env, src1);
+ writefn(dest, tcg_env, src1);
} else {
dest = tcg_temp_new();
tcg_gen_ld_tl(dest, tcg_env, csr->offset);
@@ -278,6 +283,7 @@ static bool trans_csrxchg(DisasContext *ctx, arg_csrxchg *a)
{
TCGv src1, mask, oldv, newv, temp;
const CSRInfo *csr;
+ GenCSRWrite writefn;
if (check_plv(ctx)) {
return false;
@@ -308,8 +314,9 @@ static bool trans_csrxchg(DisasContext *ctx, arg_csrxchg *a)
tcg_gen_andc_tl(temp, oldv, mask);
tcg_gen_or_tl(newv, newv, temp);
- if (csr->writefn) {
- csr->writefn(oldv, tcg_env, newv);
+ writefn = (GenCSRWrite)csr->writefn;
+ if (writefn) {
+ writefn(oldv, tcg_env, newv);
} else {
tcg_gen_st_tl(newv, tcg_env, csr->offset);
}
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 4/7] target/loongarch: Add common header file for CSR registers
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
` (2 preceding siblings ...)
2025-01-24 7:00 ` [PULL 3/7] target/loongarch: Add generic csr function type Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 5/7] target/loongarch: Add common source file for CSR register Bibo Mao
` (3 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
Common header file csr.h is added here, it can be used by both
TCG mode and kvm mode.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/csr.h | 25 +++++++++++++++++++
.../tcg/insn_trans/trans_privileged.c.inc | 16 +-----------
2 files changed, 26 insertions(+), 15 deletions(-)
create mode 100644 target/loongarch/csr.h
diff --git a/target/loongarch/csr.h b/target/loongarch/csr.h
new file mode 100644
index 0000000000..20d4bf5dc7
--- /dev/null
+++ b/target/loongarch/csr.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2025 Loongson Technology Corporation Limited
+ */
+
+#ifndef TARGET_LOONGARCH_CSR_H
+#define TARGET_LOONGARCH_CSR_H
+
+#include "cpu-csr.h"
+
+typedef void (*GenCSRFunc)(void);
+enum {
+ CSRFL_READONLY = (1 << 0),
+ CSRFL_EXITTB = (1 << 1),
+ CSRFL_IO = (1 << 2),
+};
+
+typedef struct {
+ int offset;
+ int flags;
+ GenCSRFunc readfn;
+ GenCSRFunc writefn;
+} CSRInfo;
+
+#endif /* TARGET_LOONGARCH_CSR_H */
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 0513cac577..87506ec0dc 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -5,7 +5,7 @@
* LoongArch translation routines for the privileged instructions.
*/
-#include "cpu-csr.h"
+#include "csr.h"
#ifdef CONFIG_USER_ONLY
@@ -44,20 +44,6 @@ GEN_FALSE_TRANS(idle)
typedef void (*GenCSRRead)(TCGv dest, TCGv_ptr env);
typedef void (*GenCSRWrite)(TCGv dest, TCGv_ptr env, TCGv src);
-typedef void (*GenCSRFunc)(void);
-
-typedef struct {
- int offset;
- int flags;
- GenCSRFunc readfn;
- GenCSRFunc writefn;
-} CSRInfo;
-
-enum {
- CSRFL_READONLY = (1 << 0),
- CSRFL_EXITTB = (1 << 1),
- CSRFL_IO = (1 << 2),
-};
#define CSR_OFF_FUNCS(NAME, FL, RD, WR) \
[LOONGARCH_CSR_##NAME] = { \
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 5/7] target/loongarch: Add common source file for CSR register
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
` (3 preceding siblings ...)
2025-01-24 7:00 ` [PULL 4/7] target/loongarch: Add common header file for CSR registers Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 6/7] target/loongarch: Set unused flag with CSR registers Bibo Mao
` (2 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
Common source file csr.c is added here, it can be used by both
TCG mode and kvm mode. The common code is removed from file
tcg/insn_trans/trans_privileged.c.inc to csrc.c
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/csr.c | 114 ++++++++++++++++++
target/loongarch/csr.h | 1 +
target/loongarch/meson.build | 1 +
.../tcg/insn_trans/trans_privileged.c.inc | 107 ----------------
4 files changed, 116 insertions(+), 107 deletions(-)
create mode 100644 target/loongarch/csr.c
diff --git a/target/loongarch/csr.c b/target/loongarch/csr.c
new file mode 100644
index 0000000000..62c1815bfb
--- /dev/null
+++ b/target/loongarch/csr.c
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2025 Loongson Technology Corporation Limited
+ */
+#include <stddef.h>
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "csr.h"
+
+#define CSR_OFF_FUNCS(NAME, FL, RD, WR) \
+ [LOONGARCH_CSR_##NAME] = { \
+ .offset = offsetof(CPULoongArchState, CSR_##NAME), \
+ .flags = FL, .readfn = RD, .writefn = WR \
+ }
+
+#define CSR_OFF_ARRAY(NAME, N) \
+ [LOONGARCH_CSR_##NAME(N)] = { \
+ .offset = offsetof(CPULoongArchState, CSR_##NAME[N]), \
+ .flags = 0, .readfn = NULL, .writefn = NULL \
+ }
+
+#define CSR_OFF_FLAGS(NAME, FL) CSR_OFF_FUNCS(NAME, FL, NULL, NULL)
+#define CSR_OFF(NAME) CSR_OFF_FLAGS(NAME, 0)
+
+static CSRInfo csr_info[] = {
+ CSR_OFF_FLAGS(CRMD, CSRFL_EXITTB),
+ CSR_OFF(PRMD),
+ CSR_OFF_FLAGS(EUEN, CSRFL_EXITTB),
+ CSR_OFF_FLAGS(MISC, CSRFL_READONLY),
+ CSR_OFF(ECFG),
+ CSR_OFF_FLAGS(ESTAT, CSRFL_EXITTB),
+ CSR_OFF(ERA),
+ CSR_OFF(BADV),
+ CSR_OFF_FLAGS(BADI, CSRFL_READONLY),
+ CSR_OFF(EENTRY),
+ CSR_OFF(TLBIDX),
+ CSR_OFF(TLBEHI),
+ CSR_OFF(TLBELO0),
+ CSR_OFF(TLBELO1),
+ CSR_OFF_FLAGS(ASID, CSRFL_EXITTB),
+ CSR_OFF(PGDL),
+ CSR_OFF(PGDH),
+ CSR_OFF_FLAGS(PGD, CSRFL_READONLY),
+ CSR_OFF(PWCL),
+ CSR_OFF(PWCH),
+ CSR_OFF(STLBPS),
+ CSR_OFF(RVACFG),
+ CSR_OFF_FLAGS(CPUID, CSRFL_READONLY),
+ CSR_OFF_FLAGS(PRCFG1, CSRFL_READONLY),
+ CSR_OFF_FLAGS(PRCFG2, CSRFL_READONLY),
+ CSR_OFF_FLAGS(PRCFG3, CSRFL_READONLY),
+ CSR_OFF_ARRAY(SAVE, 0),
+ CSR_OFF_ARRAY(SAVE, 1),
+ CSR_OFF_ARRAY(SAVE, 2),
+ CSR_OFF_ARRAY(SAVE, 3),
+ CSR_OFF_ARRAY(SAVE, 4),
+ CSR_OFF_ARRAY(SAVE, 5),
+ CSR_OFF_ARRAY(SAVE, 6),
+ CSR_OFF_ARRAY(SAVE, 7),
+ CSR_OFF_ARRAY(SAVE, 8),
+ CSR_OFF_ARRAY(SAVE, 9),
+ CSR_OFF_ARRAY(SAVE, 10),
+ CSR_OFF_ARRAY(SAVE, 11),
+ CSR_OFF_ARRAY(SAVE, 12),
+ CSR_OFF_ARRAY(SAVE, 13),
+ CSR_OFF_ARRAY(SAVE, 14),
+ CSR_OFF_ARRAY(SAVE, 15),
+ CSR_OFF(TID),
+ CSR_OFF_FLAGS(TCFG, CSRFL_IO),
+ CSR_OFF_FLAGS(TVAL, CSRFL_READONLY | CSRFL_IO),
+ CSR_OFF(CNTC),
+ CSR_OFF_FLAGS(TICLR, CSRFL_IO),
+ CSR_OFF(LLBCTL),
+ CSR_OFF(IMPCTL1),
+ CSR_OFF(IMPCTL2),
+ CSR_OFF(TLBRENTRY),
+ CSR_OFF(TLBRBADV),
+ CSR_OFF(TLBRERA),
+ CSR_OFF(TLBRSAVE),
+ CSR_OFF(TLBRELO0),
+ CSR_OFF(TLBRELO1),
+ CSR_OFF(TLBREHI),
+ CSR_OFF(TLBRPRMD),
+ CSR_OFF(MERRCTL),
+ CSR_OFF(MERRINFO1),
+ CSR_OFF(MERRINFO2),
+ CSR_OFF(MERRENTRY),
+ CSR_OFF(MERRERA),
+ CSR_OFF(MERRSAVE),
+ CSR_OFF(CTAG),
+ CSR_OFF_ARRAY(DMW, 0),
+ CSR_OFF_ARRAY(DMW, 1),
+ CSR_OFF_ARRAY(DMW, 2),
+ CSR_OFF_ARRAY(DMW, 3),
+ CSR_OFF(DBG),
+ CSR_OFF(DERA),
+ CSR_OFF(DSAVE),
+};
+
+CSRInfo *get_csr(unsigned int csr_num)
+{
+ CSRInfo *csr;
+
+ if (csr_num >= ARRAY_SIZE(csr_info)) {
+ return NULL;
+ }
+
+ csr = &csr_info[csr_num];
+ if (csr->offset == 0) {
+ return NULL;
+ }
+
+ return csr;
+}
diff --git a/target/loongarch/csr.h b/target/loongarch/csr.h
index 20d4bf5dc7..caad832545 100644
--- a/target/loongarch/csr.h
+++ b/target/loongarch/csr.h
@@ -22,4 +22,5 @@ typedef struct {
GenCSRFunc writefn;
} CSRInfo;
+CSRInfo *get_csr(unsigned int csr_num);
#endif /* TARGET_LOONGARCH_CSR_H */
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index 7817318287..20bd3e2f0a 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -10,6 +10,7 @@ loongarch_system_ss = ss.source_set()
loongarch_system_ss.add(files(
'arch_dump.c',
'cpu_helper.c',
+ 'csr.c',
'loongarch-qmp-cmds.c',
'machine.c',
))
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 87506ec0dc..3afa23af79 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -45,99 +45,6 @@ GEN_FALSE_TRANS(idle)
typedef void (*GenCSRRead)(TCGv dest, TCGv_ptr env);
typedef void (*GenCSRWrite)(TCGv dest, TCGv_ptr env, TCGv src);
-#define CSR_OFF_FUNCS(NAME, FL, RD, WR) \
- [LOONGARCH_CSR_##NAME] = { \
- .offset = offsetof(CPULoongArchState, CSR_##NAME), \
- .flags = FL, .readfn = RD, .writefn = WR \
- }
-
-#define CSR_OFF_ARRAY(NAME, N) \
- [LOONGARCH_CSR_##NAME(N)] = { \
- .offset = offsetof(CPULoongArchState, CSR_##NAME[N]), \
- .flags = 0, .readfn = NULL, .writefn = NULL \
- }
-
-#define CSR_OFF_FLAGS(NAME, FL) \
- CSR_OFF_FUNCS(NAME, FL, NULL, NULL)
-
-#define CSR_OFF(NAME) \
- CSR_OFF_FLAGS(NAME, 0)
-
-static CSRInfo csr_info[] = {
- CSR_OFF_FLAGS(CRMD, CSRFL_EXITTB),
- CSR_OFF(PRMD),
- CSR_OFF_FLAGS(EUEN, CSRFL_EXITTB),
- CSR_OFF_FLAGS(MISC, CSRFL_READONLY),
- CSR_OFF(ECFG),
- CSR_OFF_FLAGS(ESTAT, CSRFL_EXITTB),
- CSR_OFF(ERA),
- CSR_OFF(BADV),
- CSR_OFF_FLAGS(BADI, CSRFL_READONLY),
- CSR_OFF(EENTRY),
- CSR_OFF(TLBIDX),
- CSR_OFF(TLBEHI),
- CSR_OFF(TLBELO0),
- CSR_OFF(TLBELO1),
- CSR_OFF_FLAGS(ASID, CSRFL_EXITTB),
- CSR_OFF(PGDL),
- CSR_OFF(PGDH),
- CSR_OFF_FLAGS(PGD, CSRFL_READONLY),
- CSR_OFF(PWCL),
- CSR_OFF(PWCH),
- CSR_OFF(STLBPS),
- CSR_OFF(RVACFG),
- CSR_OFF_FLAGS(CPUID, CSRFL_READONLY),
- CSR_OFF_FLAGS(PRCFG1, CSRFL_READONLY),
- CSR_OFF_FLAGS(PRCFG2, CSRFL_READONLY),
- CSR_OFF_FLAGS(PRCFG3, CSRFL_READONLY),
- CSR_OFF_ARRAY(SAVE, 0),
- CSR_OFF_ARRAY(SAVE, 1),
- CSR_OFF_ARRAY(SAVE, 2),
- CSR_OFF_ARRAY(SAVE, 3),
- CSR_OFF_ARRAY(SAVE, 4),
- CSR_OFF_ARRAY(SAVE, 5),
- CSR_OFF_ARRAY(SAVE, 6),
- CSR_OFF_ARRAY(SAVE, 7),
- CSR_OFF_ARRAY(SAVE, 8),
- CSR_OFF_ARRAY(SAVE, 9),
- CSR_OFF_ARRAY(SAVE, 10),
- CSR_OFF_ARRAY(SAVE, 11),
- CSR_OFF_ARRAY(SAVE, 12),
- CSR_OFF_ARRAY(SAVE, 13),
- CSR_OFF_ARRAY(SAVE, 14),
- CSR_OFF_ARRAY(SAVE, 15),
- CSR_OFF(TID),
- CSR_OFF_FLAGS(TCFG, CSRFL_IO),
- CSR_OFF_FLAGS(TVAL, CSRFL_READONLY | CSRFL_IO),
- CSR_OFF(CNTC),
- CSR_OFF_FLAGS(TICLR, CSRFL_IO),
- CSR_OFF(LLBCTL),
- CSR_OFF(IMPCTL1),
- CSR_OFF(IMPCTL2),
- CSR_OFF(TLBRENTRY),
- CSR_OFF(TLBRBADV),
- CSR_OFF(TLBRERA),
- CSR_OFF(TLBRSAVE),
- CSR_OFF(TLBRELO0),
- CSR_OFF(TLBRELO1),
- CSR_OFF(TLBREHI),
- CSR_OFF(TLBRPRMD),
- CSR_OFF(MERRCTL),
- CSR_OFF(MERRINFO1),
- CSR_OFF(MERRINFO2),
- CSR_OFF(MERRENTRY),
- CSR_OFF(MERRERA),
- CSR_OFF(MERRSAVE),
- CSR_OFF(CTAG),
- CSR_OFF_ARRAY(DMW, 0),
- CSR_OFF_ARRAY(DMW, 1),
- CSR_OFF_ARRAY(DMW, 2),
- CSR_OFF_ARRAY(DMW, 3),
- CSR_OFF(DBG),
- CSR_OFF(DERA),
- CSR_OFF(DSAVE),
-};
-
static bool check_plv(DisasContext *ctx)
{
if (ctx->plv == MMU_PLV_USER) {
@@ -147,20 +54,6 @@ static bool check_plv(DisasContext *ctx)
return false;
}
-static CSRInfo *get_csr(unsigned csr_num)
-{
- CSRInfo *csr;
-
- if (csr_num >= ARRAY_SIZE(csr_info)) {
- return NULL;
- }
- csr = &csr_info[csr_num];
- if (csr->offset == 0) {
- return NULL;
- }
- return csr;
-}
-
static bool set_csr_trans_func(unsigned int csr_num, GenCSRRead readfn,
GenCSRWrite writefn)
{
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 6/7] target/loongarch: Set unused flag with CSR registers
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
` (4 preceding siblings ...)
2025-01-24 7:00 ` [PULL 5/7] target/loongarch: Add common source file for CSR register Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-24 7:00 ` [PULL 7/7] target/loongarch: Dump all generic " Bibo Mao
2025-01-25 3:28 ` [PULL 0/7] loongarch-to-apply queue Stefan Hajnoczi
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
On LA464, some CSR registers are not used such as CSR_SAVE8 -
CSR_SAVE15, also CSR registers relative with MCE is not used now.
Flag CSRFL_UNUSED is added for these registers, so that it will
not dumped. In order to keep compatiblity, these CSR registers are
not removed since it is used in vmstate already.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 30 +++++++++++++++++++++++++++++-
target/loongarch/csr.c | 13 +++++++++++++
target/loongarch/csr.h | 2 ++
3 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index d611a60470..a744010332 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -19,7 +19,7 @@
#include "cpu.h"
#include "internals.h"
#include "fpu/softfloat-helpers.h"
-#include "cpu-csr.h"
+#include "csr.h"
#ifndef CONFIG_USER_ONLY
#include "system/reset.h"
#endif
@@ -375,6 +375,33 @@ static int loongarch_cpu_mmu_index(CPUState *cs, bool ifetch)
return MMU_DA_IDX;
}
+static void loongarch_la464_init_csr(Object *obj)
+{
+#ifndef CONFIG_USER_ONLY
+ static bool initialized;
+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+ CPULoongArchState *env = &cpu->env;
+ int i, num;
+
+ if (!initialized) {
+ initialized = true;
+ num = FIELD_EX64(env->CSR_PRCFG1, CSR_PRCFG1, SAVE_NUM);
+ for (i = num; i < 16; i++) {
+ set_csr_flag(LOONGARCH_CSR_SAVE(i), CSRFL_UNUSED);
+ }
+ set_csr_flag(LOONGARCH_CSR_IMPCTL1, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_IMPCTL2, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRCTL, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRINFO1, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRINFO2, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRENTRY, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRERA, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_MERRSAVE, CSRFL_UNUSED);
+ set_csr_flag(LOONGARCH_CSR_CTAG, CSRFL_UNUSED);
+ }
+#endif
+}
+
static void loongarch_la464_initfn(Object *obj)
{
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
@@ -470,6 +497,7 @@ static void loongarch_la464_initfn(Object *obj)
env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
+ loongarch_la464_init_csr(obj);
loongarch_cpu_post_init(obj);
}
diff --git a/target/loongarch/csr.c b/target/loongarch/csr.c
index 62c1815bfb..87bd24e8cd 100644
--- a/target/loongarch/csr.c
+++ b/target/loongarch/csr.c
@@ -112,3 +112,16 @@ CSRInfo *get_csr(unsigned int csr_num)
return csr;
}
+
+bool set_csr_flag(unsigned int csr_num, int flag)
+{
+ CSRInfo *csr;
+
+ csr = get_csr(csr_num);
+ if (!csr) {
+ return false;
+ }
+
+ csr->flags |= flag;
+ return true;
+}
diff --git a/target/loongarch/csr.h b/target/loongarch/csr.h
index caad832545..deb1aacc33 100644
--- a/target/loongarch/csr.h
+++ b/target/loongarch/csr.h
@@ -13,6 +13,7 @@ enum {
CSRFL_READONLY = (1 << 0),
CSRFL_EXITTB = (1 << 1),
CSRFL_IO = (1 << 2),
+ CSRFL_UNUSED = (1 << 3),
};
typedef struct {
@@ -23,4 +24,5 @@ typedef struct {
} CSRInfo;
CSRInfo *get_csr(unsigned int csr_num);
+bool set_csr_flag(unsigned int csr_num, int flag);
#endif /* TARGET_LOONGARCH_CSR_H */
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PULL 7/7] target/loongarch: Dump all generic CSR registers
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
` (5 preceding siblings ...)
2025-01-24 7:00 ` [PULL 6/7] target/loongarch: Set unused flag with CSR registers Bibo Mao
@ 2025-01-24 7:00 ` Bibo Mao
2025-01-25 3:28 ` [PULL 0/7] loongarch-to-apply queue Stefan Hajnoczi
7 siblings, 0 replies; 22+ messages in thread
From: Bibo Mao @ 2025-01-24 7:00 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel, Song Gao
CSR registers is import system control registers, it had better
dump all CSR registers when VM is running in system mode.
Here is dump output example of CSR registers:
CSR000: CRMD b4 PRMD 4 EUEN 0 MISC 0
CSR004: ECFG 71c1c ESTAT 0 ERA 9000000002c31300 BADV 12022c0e0
CSR008: BADI 2b0000
CSR012: EENTRY 90000000046b0000
CSR016: TLBIDX ffffffff8e000228 TLBEHI 120228000 TLBELO0 400000016f19001f TLBELO1 400000016f1a401f
CSR024: ASID a0004 PGDL 90000001016f0000 PGDH 9000000004680000 PGD 0
CSR028: PWCL 5e56e PWCH 2e4 STLBPS e RVACFG 0
CSR032: CPUID 0 PRCFG1 72f8 PRCFG2 3ffff000 PRCFG3 8073f2
CSR048: SAVE0 0 SAVE1 af9c SAVE2 12010d6a8 SAVE3 8300000
CSR052: SAVE4 0 SAVE5 0 SAVE6 0 SAVE7 0
CSR064: TID 0 TCFG 8f0ca15 TVAL 4cefd8b CNTC fffffffffe688aaa
CSR068: TICLR 0
CSR096: LLBCTL 1
CSR136: TLBRENTRY 46ba000 TLBRBADV ffff8000130d81e2 TLBRERA 9000000003585cb8 TLBRSAVE ffff8000130d81e0
CSR140: TLBRELO0 1fe00043 TLBRELO1 40 TLBREHI ffff8000130d800e TLBRPRMD 0
CSR384: DMW0 8000000000000001 DMW1 9000000000000011 DMW2 0 DMW3 0
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
target/loongarch/cpu.c | 66 ++++++++++++++++++++++++++++++++----------
target/loongarch/csr.c | 2 ++
target/loongarch/csr.h | 1 +
3 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index a744010332..e91f4a5239 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -793,6 +793,54 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
return oc;
}
+static void loongarch_cpu_dump_csr(CPUState *cs, FILE *f)
+{
+#ifndef CONFIG_USER_ONLY
+ CPULoongArchState *env = cpu_env(cs);
+ CSRInfo *csr_info;
+ int64_t *addr;
+ int i, j, len, col = 0;
+
+ qemu_fprintf(f, "\n");
+
+ /* Dump all generic CSR register */
+ for (i = 0; i < LOONGARCH_CSR_DBG; i++) {
+ csr_info = get_csr(i);
+ if (!csr_info || (csr_info->flags & CSRFL_UNUSED)) {
+ if (i == (col + 3)) {
+ qemu_fprintf(f, "\n");
+ }
+
+ continue;
+ }
+
+ if ((i > (col + 3)) || (i == col)) {
+ col = i & ~3;
+ qemu_fprintf(f, " CSR%03d:", col);
+ }
+
+ addr = (void *)env + csr_info->offset;
+ qemu_fprintf(f, " %s ", csr_info->name);
+ len = strlen(csr_info->name);
+ for (; len < 6; len++) {
+ qemu_fprintf(f, " ");
+ }
+
+ qemu_fprintf(f, "%" PRIx64, *addr);
+ j = find_last_bit((void *)addr, BITS_PER_LONG) & (BITS_PER_LONG - 1);
+ len += j / 4 + 1;
+ for (; len < 22; len++) {
+ qemu_fprintf(f, " ");
+ }
+
+ if (i == (col + 3)) {
+ qemu_fprintf(f, "\n");
+ }
+ }
+ qemu_fprintf(f, "\n");
+#endif
+}
+
static void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
CPULoongArchState *env = cpu_env(cs);
@@ -812,22 +860,8 @@ static void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
}
}
- qemu_fprintf(f, "CRMD=%016" PRIx64 "\n", env->CSR_CRMD);
- qemu_fprintf(f, "PRMD=%016" PRIx64 "\n", env->CSR_PRMD);
- qemu_fprintf(f, "EUEN=%016" PRIx64 "\n", env->CSR_EUEN);
- qemu_fprintf(f, "ESTAT=%016" PRIx64 "\n", env->CSR_ESTAT);
- qemu_fprintf(f, "ERA=%016" PRIx64 "\n", env->CSR_ERA);
- qemu_fprintf(f, "BADV=%016" PRIx64 "\n", env->CSR_BADV);
- qemu_fprintf(f, "BADI=%016" PRIx64 "\n", env->CSR_BADI);
- qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY);
- qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 ","
- " PRCFG3=%016" PRIx64 "\n",
- env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3);
- qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
- qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
- qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);
- qemu_fprintf(f, "TCFG=%016" PRIx64 "\n", env->CSR_TCFG);
- qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL);
+ /* csr */
+ loongarch_cpu_dump_csr(cs, f);
/* fpr */
if (flags & CPU_DUMP_FPU) {
diff --git a/target/loongarch/csr.c b/target/loongarch/csr.c
index 87bd24e8cd..7ea0a30450 100644
--- a/target/loongarch/csr.c
+++ b/target/loongarch/csr.c
@@ -9,12 +9,14 @@
#define CSR_OFF_FUNCS(NAME, FL, RD, WR) \
[LOONGARCH_CSR_##NAME] = { \
+ .name = (stringify(NAME)), \
.offset = offsetof(CPULoongArchState, CSR_##NAME), \
.flags = FL, .readfn = RD, .writefn = WR \
}
#define CSR_OFF_ARRAY(NAME, N) \
[LOONGARCH_CSR_##NAME(N)] = { \
+ .name = (stringify(NAME##N)), \
.offset = offsetof(CPULoongArchState, CSR_##NAME[N]), \
.flags = 0, .readfn = NULL, .writefn = NULL \
}
diff --git a/target/loongarch/csr.h b/target/loongarch/csr.h
index deb1aacc33..81a656baae 100644
--- a/target/loongarch/csr.h
+++ b/target/loongarch/csr.h
@@ -17,6 +17,7 @@ enum {
};
typedef struct {
+ const char *name;
int offset;
int flags;
GenCSRFunc readfn;
--
2.43.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PULL 0/7] loongarch-to-apply queue
2025-01-24 7:00 [PULL 0/7] loongarch-to-apply queue Bibo Mao
` (6 preceding siblings ...)
2025-01-24 7:00 ` [PULL 7/7] target/loongarch: Dump all generic " Bibo Mao
@ 2025-01-25 3:28 ` Stefan Hajnoczi
7 siblings, 0 replies; 22+ messages in thread
From: Stefan Hajnoczi @ 2025-01-25 3:28 UTC (permalink / raw)
To: Bibo Mao; +Cc: Stefan Hajnoczi, qemu-devel, Song Gao
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 22+ messages in thread