[PULL 0/7] loongarch-to-apply queue

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit bc98ffdc7577e55ab8373c579c28fe24d600c40f:

  Merge tag 'pull-10.1-maintainer-may-2025-070625-1' of https://gitlab.com/stsquad/qemu into staging (2025-06-07 15:08:55 -0400)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250610

for you to fetch changes up to ffe89c1762d879fd39ba1be853d154677dbfbc7b:

  hw/loongarch/virt: Remove global variables about memmap tables (2025-06-10 15:01:41 +0800)

----------------------------------------------------------------
pull-loongarch_20250610

----------------------------------------------------------------
Bibo Mao (5):
      hw/loongarch/virt: Fix big endian support with MCFG table
      hw/intc/loongarch_pch: Convert to little endian with ID register
      hw/intc/loongarch_extioi: Fix typo issue about register EXTIOI_COREISR_END
      hw/loongarch/virt: Remove global variables about initrd
      hw/loongarch/virt: Remove global variables about memmap tables

Qiang Ma (1):
      hw/loongarch/virt: inform guest of kvm

Song Gao (1):
      target/loongarch: add check for fcond

 hw/intc/loongarch_pch_pic.c                      |  2 +-
 hw/loongarch/boot.c                              | 52 +++++++++++++-----------
 hw/loongarch/virt-acpi-build.c                   |  4 +-
 hw/loongarch/virt.c                              | 27 ++++++++----
 include/hw/intc/loongarch_extioi_common.h        |  2 +-
 include/hw/loongarch/boot.h                      |  5 +--
 include/hw/loongarch/virt.h                      |  2 +
 target/loongarch/tcg/insn_trans/trans_fcmp.c.inc | 25 ++++++++----
 target/loongarch/tcg/insn_trans/trans_vec.c.inc  | 16 ++++++--
 9 files changed, 87 insertions(+), 48 deletions(-)

[PULL 1/7] hw/loongarch/virt: Fix big endian support with MCFG table

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

With API build_mcfg(), it is not necessary with parameter structure
AcpiMcfgInfo to convert to little endian since it is directly used
with host native endian.

Here remove endian conversion before calling function build_mcfg().
With this patch, bios-tables-test passes to run on big endian host
machine S390.

Fixes: 735143f10d3e ("hw/loongarch: Add acpi ged support")
Cc: qemu-stable@nongnu.org
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250604065502.1114098-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt-acpi-build.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c
index 073b6de75c..2cd2d9d842 100644
--- a/hw/loongarch/virt-acpi-build.c
+++ b/hw/loongarch/virt-acpi-build.c
@@ -575,8 +575,8 @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
     acpi_add_table(table_offsets, tables_blob);
     {
         AcpiMcfgInfo mcfg = {
-           .base = cpu_to_le64(VIRT_PCI_CFG_BASE),
-           .size = cpu_to_le64(VIRT_PCI_CFG_SIZE),
+           .base = VIRT_PCI_CFG_BASE,
+           .size = VIRT_PCI_CFG_SIZE,
         };
         build_mcfg(tables_blob, tables->linker, &mcfg, lvms->oem_id,
                    lvms->oem_table_id);
-- 
2.34.1

[PULL 2/7] hw/intc/loongarch_pch: Convert to little endian with ID register

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

With PCH ID register, it is defined as union type as follows:
union LoongArchPIC_ID {
    struct {
        uint8_t _reserved_0[3];
        uint8_t id;
        uint8_t version;
        uint8_t _reserved_1;
        uint8_t irq_num;
        uint8_t _reserved_2;
    } QEMU_PACKED desc;
    uint64_t data;
}

And with pch driver in virt machine irq_number is parsed with little
endian method:
  vec_count = ((readq(priv->base) >> 48) & 0xff) + 1

So the value of ID register should be converted to little endian.
With this patch, linux kernel passes to run on S390 big endian host
machine with TCG method.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250604065502.1114098-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/intc/loongarch_pch_pic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index cbba2fc284..ebb33ed0b0 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -82,7 +82,7 @@ static uint64_t pch_pic_read(void *opaque, hwaddr addr, uint64_t field_mask)
     addr -= offset;
     switch (addr) {
     case PCH_PIC_INT_ID:
-        val = s->id.data;
+        val = cpu_to_le64(s->id.data);
         break;
     case PCH_PIC_INT_MASK:
         val = s->int_mask;
-- 
2.34.1

[PULL 3/7] hw/intc/loongarch_extioi: Fix typo issue about register EXTIOI_COREISR_END

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

Interrupt controller extioi supports 256 vectors, register EXTIOI_COREISR
records pending interrupt status with bitmap method. Size of EXTIOI_COREISR
is 256 / 8 = 0x20 bytes, EXTIOI_COREISR_END should be EXTIOI_COREISR_START
+ 0x20 rather than 0xB20.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250605092848.1550985-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 include/hw/intc/loongarch_extioi_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index 735bfee80a..dca25ff893 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -35,7 +35,7 @@
 #define EXTIOI_ISR_START             (0x700 - APIC_OFFSET)
 #define EXTIOI_ISR_END               (0x720 - APIC_OFFSET)
 #define EXTIOI_COREISR_START         (0x800 - APIC_OFFSET)
-#define EXTIOI_COREISR_END           (0xB20 - APIC_OFFSET)
+#define EXTIOI_COREISR_END           (0x820 - APIC_OFFSET)
 #define EXTIOI_COREMAP_START         (0xC00 - APIC_OFFSET)
 #define EXTIOI_COREMAP_END           (0xD00 - APIC_OFFSET)
 #define EXTIOI_SIZE                  0x800
-- 
2.34.1

[PULL 4/7] hw/loongarch/virt: inform guest of kvm

[Song Gao]

From: Qiang Ma <maqianga@uniontech.com>

Commit bab27ea2e3 ("hw/arm/virt: smbios:
inform guest of kvm") fixes the same issue
on arm.

without this patch:
[root@localhost ~]# virt-what
qemu

with this patch:
[root@localhost ~]# virt-what
kvm

Signed-off-by: Qiang Ma <maqianga@uniontech.com>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250603031813.31794-1-maqianga@uniontech.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 1b504047db..a3d449ca8b 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -136,6 +136,10 @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
         return;
     }
 
+    if (kvm_enabled()) {
+        product = "KVM Virtual Machine";
+    }
+
     smbios_set_defaults("QEMU", product, mc->name);
 
     smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64,
-- 
2.34.1

[PULL 5/7] target/loongarch: add check for fcond

[Song Gao]

fcond only has 22 types, add a check for fcond.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2972

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250603024810.350510-1-gaosong@loongson.cn>
---
 .../loongarch/tcg/insn_trans/trans_fcmp.c.inc | 25 +++++++++++++------
 .../loongarch/tcg/insn_trans/trans_vec.c.inc  | 16 +++++++++---
 2 files changed, 30 insertions(+), 11 deletions(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
index 3babf69e4a..6a2c030a6b 100644
--- a/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
@@ -4,10 +4,15 @@
  */
 
 /* bit0(signaling/quiet) bit1(lt) bit2(eq) bit3(un) bit4(neq) */
-static uint32_t get_fcmp_flags(int cond)
+static uint32_t get_fcmp_flags(DisasContext *ctx, int cond)
 {
     uint32_t flags = 0;
 
+    /*check cond , cond =[0-8,10,12] */
+    if ((cond > 8) &&(cond != 10) && (cond != 12)) {
+        return -1;
+    }
+
     if (cond & 0x1) {
         flags |= FCMP_LT;
     }
@@ -26,9 +31,14 @@ static uint32_t get_fcmp_flags(int cond)
 static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a)
 {
     TCGv var, src1, src2;
-    uint32_t flags;
+    uint32_t flags = get_fcmp_flags(ctx, a->fcond >>1);
     void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32);
 
+    if (flags == -1) {
+        generate_exception(ctx, EXCCODE_INE);
+        return true;
+    }
+
     if (!avail_FP_SP(ctx)) {
         return false;
     }
@@ -39,8 +49,6 @@ static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a)
     src1 = get_fpr(ctx, a->fj);
     src2 = get_fpr(ctx, a->fk);
     fn = (a->fcond & 1 ? gen_helper_fcmp_s_s : gen_helper_fcmp_c_s);
-    flags = get_fcmp_flags(a->fcond >> 1);
-
     fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
 
     tcg_gen_st8_tl(var, tcg_env, offsetof(CPULoongArchState, cf[a->cd]));
@@ -50,9 +58,14 @@ static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a)
 static bool trans_fcmp_cond_d(DisasContext *ctx, arg_fcmp_cond_d *a)
 {
     TCGv var, src1, src2;
-    uint32_t flags;
+    uint32_t flags = get_fcmp_flags(ctx, a->fcond >> 1);
     void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32);
 
+    if (flags == -1) {
+        generate_exception(ctx, EXCCODE_INE);
+        return true;
+    }
+
     if (!avail_FP_DP(ctx)) {
         return false;
     }
@@ -63,8 +76,6 @@ static bool trans_fcmp_cond_d(DisasContext *ctx, arg_fcmp_cond_d *a)
     src1 = get_fpr(ctx, a->fj);
     src2 = get_fpr(ctx, a->fk);
     fn = (a->fcond & 1 ? gen_helper_fcmp_s_d : gen_helper_fcmp_c_d);
-    flags = get_fcmp_flags(a->fcond >> 1);
-
     fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
 
     tcg_gen_st8_tl(var, tcg_env, offsetof(CPULoongArchState, cf[a->cd]));
diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index dff92772ad..d6f0560349 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -4655,19 +4655,23 @@ TRANS(xvslti_du, LASX, do_xcmpi, MO_64, TCG_COND_LTU)
 
 static bool do_vfcmp_cond_s(DisasContext *ctx, arg_vvv_fcond *a, uint32_t sz)
 {
-    uint32_t flags;
+    uint32_t flags = get_fcmp_flags(ctx, a->fcond >> 1);
     void (*fn)(TCGv_env, TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
     TCGv_i32 vd = tcg_constant_i32(a->vd);
     TCGv_i32 vj = tcg_constant_i32(a->vj);
     TCGv_i32 vk = tcg_constant_i32(a->vk);
     TCGv_i32 oprsz = tcg_constant_i32(sz);
 
+    if(flags == -1){
+        generate_exception(ctx, EXCCODE_INE);
+        return true;
+    }
+
     if (!check_vec(ctx, sz)) {
         return true;
     }
 
     fn = (a->fcond & 1 ? gen_helper_vfcmp_s_s : gen_helper_vfcmp_c_s);
-    flags = get_fcmp_flags(a->fcond >> 1);
     fn(tcg_env, oprsz, vd, vj, vk, tcg_constant_i32(flags));
 
     return true;
@@ -4675,19 +4679,23 @@ static bool do_vfcmp_cond_s(DisasContext *ctx, arg_vvv_fcond *a, uint32_t sz)
 
 static bool do_vfcmp_cond_d(DisasContext *ctx, arg_vvv_fcond *a, uint32_t sz)
 {
-    uint32_t flags;
+    uint32_t flags = get_fcmp_flags(ctx, a->fcond >> 1);
     void (*fn)(TCGv_env, TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
     TCGv_i32 vd = tcg_constant_i32(a->vd);
     TCGv_i32 vj = tcg_constant_i32(a->vj);
     TCGv_i32 vk = tcg_constant_i32(a->vk);
     TCGv_i32 oprsz = tcg_constant_i32(sz);
 
+    if (flags == -1) {
+        generate_exception(ctx, EXCCODE_INE);
+        return true;
+    }
+
     if (!check_vec(ctx, sz)) {
         return true;
     }
 
     fn = (a->fcond & 1 ? gen_helper_vfcmp_s_d : gen_helper_vfcmp_c_d);
-    flags = get_fcmp_flags(a->fcond >> 1);
     fn(tcg_env, oprsz, vd, vj, vk, tcg_constant_i32(flags));
 
     return true;
-- 
2.34.1

[PULL 6/7] hw/loongarch/virt: Remove global variables about initrd

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

Global variables initrd_offset and initrd_size records loading information
about initrd, it can be moved to structure loongarch_boot_info.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250430094738.1556670-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 21 ++++++++++-----------
 include/hw/loongarch/boot.h |  2 ++
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 9b6292eaa1..a343547acd 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -38,9 +38,6 @@ struct loongarch_linux_hdr {
 struct memmap_entry *memmap_table;
 unsigned memmap_entries;
 
-ram_addr_t initrd_offset;
-uint64_t initrd_size;
-
 static const unsigned int slave_boot_code[] = {
                   /* Configure reset ebase.                    */
     0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
@@ -121,7 +118,8 @@ static void init_efi_boot_memmap(struct efi_system_table *systab,
     }
 }
 
-static void init_efi_initrd_table(struct efi_system_table *systab,
+static void init_efi_initrd_table(struct loongarch_boot_info *info,
+                                  struct efi_system_table *systab,
                                   void *p, void *start)
 {
     efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID;
@@ -132,8 +130,8 @@ static void init_efi_initrd_table(struct efi_system_table *systab,
     systab->tables[1].table = (struct efi_configuration_table *)(p - start);
     systab->nr_tables = 2;
 
-    initrd_table->base = initrd_offset;
-    initrd_table->size = initrd_size;
+    initrd_table->base = info->initrd_addr;
+    initrd_table->size = info->initrd_size;
 }
 
 static void init_efi_fdt_table(struct efi_system_table *systab)
@@ -169,7 +167,7 @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
     init_efi_boot_memmap(systab, p, start);
     p += ROUND_UP(sizeof(struct efi_boot_memmap) +
                   sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
-    init_efi_initrd_table(systab, p, start);
+    init_efi_initrd_table(info, systab, p, start);
     p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
     init_efi_fdt_table(systab);
 
@@ -276,8 +274,8 @@ static ram_addr_t alloc_initrd_memory(struct loongarch_boot_info *info,
 
 static int64_t load_kernel_info(struct loongarch_boot_info *info)
 {
-    uint64_t kernel_entry, kernel_low, kernel_high;
-    ssize_t kernel_size;
+    uint64_t kernel_entry, kernel_low, kernel_high, initrd_offset = 0;
+    ssize_t kernel_size, initrd_size;
 
     kernel_size = load_elf(info->kernel_filename, NULL,
                            cpu_loongarch_virt_to_phys, NULL,
@@ -313,8 +311,9 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
                          info->initrd_filename);
             exit(1);
         }
-    } else {
-        initrd_size = 0;
+
+        info->initrd_addr = initrd_offset;
+        info->initrd_size = initrd_size;
     }
 
     return kernel_entry;
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
index b3b870df1f..27399de99c 100644
--- a/include/hw/loongarch/boot.h
+++ b/include/hw/loongarch/boot.h
@@ -102,6 +102,8 @@ struct loongarch_boot_info {
     const char *kernel_cmdline;
     const char *initrd_filename;
     uint64_t a0, a1, a2;
+    uint64_t initrd_addr;
+    uint64_t initrd_size;
 };
 
 extern struct memmap_entry *memmap_table;
-- 
2.34.1

[PULL 7/7] hw/loongarch/virt: Remove global variables about memmap tables

[Song Gao]

From: Bibo Mao <maobibo@loongson.cn>

Global variables memmap_table and memmap_entries stores UEFI memory
map table informations. It can be moved into structure
LoongArchVirtMachineState.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250430094738.1556670-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/boot.c         | 31 +++++++++++++++++++------------
 hw/loongarch/virt.c         | 23 ++++++++++++++++-------
 include/hw/loongarch/boot.h |  3 ---
 include/hw/loongarch/virt.h |  2 ++
 4 files changed, 37 insertions(+), 22 deletions(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index a343547acd..14d6c52d4e 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -35,9 +35,6 @@ struct loongarch_linux_hdr {
     uint32_t pe_header_offset;
 } QEMU_PACKED;
 
-struct memmap_entry *memmap_table;
-unsigned memmap_entries;
-
 static const unsigned int slave_boot_code[] = {
                   /* Configure reset ebase.                    */
     0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
@@ -91,12 +88,16 @@ static inline void *guidcpy(void *dst, const void *src)
     return memcpy(dst, src, sizeof(efi_guid_t));
 }
 
-static void init_efi_boot_memmap(struct efi_system_table *systab,
+static void init_efi_boot_memmap(MachineState *ms,
+                                 struct efi_system_table *systab,
                                  void *p, void *start)
 {
     unsigned i;
     struct efi_boot_memmap *boot_memmap = p;
     efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID;
+    LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms);
+    struct memmap_entry *memmap_table;
+    unsigned int memmap_entries;
 
     /* efi_configuration_table 1 */
     guidcpy(&systab->tables[0].guid, &tbl_guid);
@@ -108,6 +109,8 @@ static void init_efi_boot_memmap(struct efi_system_table *systab,
     boot_memmap->map_size = 0;
 
     efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap);
+    memmap_table = lvms->memmap_table;
+    memmap_entries = lvms->memmap_entries;
     for (i = 0; i < memmap_entries; i++) {
         map = (void *)boot_memmap + sizeof(*map);
         map[i].type = memmap_table[i].type;
@@ -144,10 +147,12 @@ static void init_efi_fdt_table(struct efi_system_table *systab)
     systab->nr_tables = 3;
 }
 
-static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
+static void init_systab(MachineState *ms,
+                        struct loongarch_boot_info *info, void *p, void *start)
 {
     void *bp_tables_start;
     struct efi_system_table *systab = p;
+    LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms);
 
     info->a2 = p - start;
 
@@ -164,9 +169,9 @@ static void init_systab(struct loongarch_boot_info *info, void *p, void *start)
     systab->tables = p;
     bp_tables_start = p;
 
-    init_efi_boot_memmap(systab, p, start);
+    init_efi_boot_memmap(ms, systab, p, start);
     p += ROUND_UP(sizeof(struct efi_boot_memmap) +
-                  sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB);
+                  sizeof(efi_memory_desc_t) * lvms->memmap_entries, 64 * KiB);
     init_efi_initrd_table(info, systab, p, start);
     p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB);
     init_efi_fdt_table(systab);
@@ -368,17 +373,19 @@ static void loongarch_firmware_boot(LoongArchVirtMachineState *lvms,
     fw_cfg_add_kernel_info(info, lvms->fw_cfg);
 }
 
-static void init_boot_rom(struct loongarch_boot_info *info, void *p)
+static void init_boot_rom(MachineState *ms,
+                          struct loongarch_boot_info *info, void *p)
 {
     void *start = p;
 
     init_cmdline(info, p, start);
     p += COMMAND_LINE_SIZE;
 
-    init_systab(info, p, start);
+    init_systab(ms, info, p, start);
 }
 
-static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
+static void loongarch_direct_kernel_boot(MachineState *ms,
+                                         struct loongarch_boot_info *info)
 {
     void *p, *bp;
     int64_t kernel_addr = VIRT_FLASH0_BASE;
@@ -396,7 +403,7 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
     /* Load cmdline and system tables at [0 - 1 MiB] */
     p = g_malloc0(1 * MiB);
     bp = p;
-    init_boot_rom(info, p);
+    init_boot_rom(ms, info, p);
     rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory);
 
     /* Load slave boot code at pflash0 . */
@@ -436,6 +443,6 @@ void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
     if (lvms->bios_loaded) {
         loongarch_firmware_boot(lvms, info);
     } else {
-        loongarch_direct_kernel_boot(info);
+        loongarch_direct_kernel_boot(ms, info);
     }
 }
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index a3d449ca8b..34dfbd13e5 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -172,8 +172,15 @@ static void virt_powerdown_req(Notifier *notifier, void *opaque)
     acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
 }
 
-static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
+static void memmap_add_entry(MachineState *ms, uint64_t address,
+                             uint64_t length, uint32_t type)
 {
+    LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms);
+    struct memmap_entry *memmap_table;
+    unsigned int memmap_entries;
+
+    memmap_table = lvms->memmap_table;
+    memmap_entries = lvms->memmap_entries;
     /* Ensure there are no duplicate entries. */
     for (unsigned i = 0; i < memmap_entries; i++) {
         assert(memmap_table[i].address != address);
@@ -186,6 +193,8 @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
     memmap_table[memmap_entries].type = cpu_to_le32(type);
     memmap_table[memmap_entries].reserved = 0;
     memmap_entries++;
+    lvms->memmap_table = memmap_table;
+    lvms->memmap_entries = memmap_entries;
 }
 
 static DeviceState *create_acpi_ged(DeviceState *pch_pic,
@@ -623,13 +632,13 @@ static void fw_cfg_add_memory(MachineState *ms)
     }
 
     if (size >= gap) {
-        memmap_add_entry(base, gap, 1);
+        memmap_add_entry(ms, base, gap, 1);
         size -= gap;
         base = VIRT_HIGHMEM_BASE;
     }
 
     if (size) {
-        memmap_add_entry(base, size, 1);
+        memmap_add_entry(ms, base, size, 1);
         base += size;
     }
 
@@ -644,7 +653,7 @@ static void fw_cfg_add_memory(MachineState *ms)
          * lowram:  [base, +(gap - numa_info[0].node_mem))
          * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap))
          */
-        memmap_add_entry(base, gap - numa_info[0].node_mem, 1);
+        memmap_add_entry(ms, base, gap - numa_info[0].node_mem, 1);
         size = ram_size - gap;
         base = VIRT_HIGHMEM_BASE;
     } else {
@@ -652,7 +661,7 @@ static void fw_cfg_add_memory(MachineState *ms)
     }
 
     if (size) {
-        memmap_add_entry(base, size, 1);
+        memmap_add_entry(ms, base, size, 1);
     }
 }
 
@@ -738,8 +747,8 @@ static void virt_init(MachineState *machine)
     rom_set_fw(lvms->fw_cfg);
     if (lvms->fw_cfg != NULL) {
         fw_cfg_add_file(lvms->fw_cfg, "etc/memmap",
-                        memmap_table,
-                        sizeof(struct memmap_entry) * (memmap_entries));
+                        lvms->memmap_table,
+                        sizeof(struct memmap_entry) * lvms->memmap_entries);
     }
 
     /* Initialize the IO interrupt subsystem */
diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h
index 27399de99c..9819f7fbe3 100644
--- a/include/hw/loongarch/boot.h
+++ b/include/hw/loongarch/boot.h
@@ -106,9 +106,6 @@ struct loongarch_boot_info {
     uint64_t initrd_size;
 };
 
-extern struct memmap_entry *memmap_table;
-extern unsigned memmap_entries;
-
 struct memmap_entry {
     uint64_t address;
     uint64_t length;
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 2b7d19953f..602feab0f0 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -63,6 +63,8 @@ struct LoongArchVirtMachineState {
     struct loongarch_boot_info bootinfo;
     DeviceState *ipi;
     DeviceState *extioi;
+    struct memmap_entry *memmap_table;
+    unsigned int memmap_entries;
 };
 
 #define TYPE_LOONGARCH_VIRT_MACHINE  MACHINE_TYPE_NAME("virt")
-- 
2.34.1

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit c4a9d49c7b23a02c646ebac756519c15a24f7ecc:

  Merge tag 'pull-9p-20260207' of https://github.com/cschoenebeck/qemu into staging (2026-02-07 17:46:15 +0000)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20260210

for you to fetch changes up to 59c8adc2830342c2cff5fe8867191d0e166abb29:

  target/loongarch: Add LA v1.1 instructions to max cpu (2026-02-10 10:48:20 +0800)

----------------------------------------------------------------
pull-loongarch-2026-02-10

----------------------------------------------------------------
Jiajie Chen (7):
      target/loongarch: Require atomics to be aligned
      target/loongarch: Add am{swap/add}[_db].{b/h}
      target/loongarch: Add amcas[_db].{b/h/w/d}
      target/loongarch: Add estimated reciprocal instructions
      target/loongarch: Add llacq/screl instructions
      target/loongarch: Add sc.q instructions
      target/loongarch: Add LA v1.1 instructions to max cpu

 target/loongarch/cpu.c                             |  11 +-
 target/loongarch/cpu.h                             |   7 +
 target/loongarch/disas.c                           |  33 +++++
 target/loongarch/insns.decode                      |  34 +++++
 target/loongarch/tcg/insn_trans/trans_atomic.c.inc | 145 +++++++++++++++++++--
 target/loongarch/tcg/insn_trans/trans_farith.c.inc |   4 +
 target/loongarch/tcg/insn_trans/trans_memory.c.inc |  22 ++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc    |   8 ++
 target/loongarch/tcg/translate.c                   |   6 +-
 target/loongarch/translate.h                       |  30 +++--
 10 files changed, 280 insertions(+), 20 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Peter Maydell]

On Tue, 10 Feb 2026 at 02:57, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit c4a9d49c7b23a02c646ebac756519c15a24f7ecc:
>
>   Merge tag 'pull-9p-20260207' of https://github.com/cschoenebeck/qemu into staging (2026-02-07 17:46:15 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/gaosong715/qemu.git tags/pull-loongarch-20260210
>
> for you to fetch changes up to 59c8adc2830342c2cff5fe8867191d0e166abb29:
>
>   target/loongarch: Add LA v1.1 instructions to max cpu (2026-02-10 10:48:20 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-2026-02-10
>
> ----------------------------------------------------------------
> Jiajie Chen (7):
>       target/loongarch: Require atomics to be aligned
>       target/loongarch: Add am{swap/add}[_db].{b/h}
>       target/loongarch: Add amcas[_db].{b/h/w/d}
>       target/loongarch: Add estimated reciprocal instructions
>       target/loongarch: Add llacq/screl instructions
>       target/loongarch: Add sc.q instructions
>       target/loongarch: Add LA v1.1 instructions to max cpu



Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/11.0
for any user-visible changes.

-- PMM

[PULL 0/7] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit cf86770c7aa31ebd6e56f4eeb25c34107f92c51e:

  Merge tag 'pull-request-2025-01-21v2' of https://gitlab.com/thuth/qemu into staging (2025-01-22 09:59:02 -0500)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250124

for you to fetch changes up to 3215fe8528de45a1794f0314623cc10bd8e8e19f:

  target/loongarch: Dump all generic CSR registers (2025-01-24 14:49:24 +0800)

----------------------------------------------------------------
pull-loongarch-20250124 queue

----------------------------------------------------------------
Bibo Mao (7):
      target/loongarch: Add dynamic function access with CSR register
      target/loongarch: Remove static CSR function setting
      target/loongarch: Add generic csr function type
      target/loongarch: Add common header file for CSR registers
      target/loongarch: Add common source file for CSR register
      target/loongarch: Set unused flag with CSR registers
      target/loongarch: Dump all generic CSR registers

 target/loongarch/cpu.c                             |  96 +++++++++---
 target/loongarch/csr.c                             | 129 +++++++++++++++++
 target/loongarch/csr.h                             |  29 ++++
 target/loongarch/meson.build                       |   1 +
 .../tcg/insn_trans/trans_privileged.c.inc          | 161 +++++----------------
 target/loongarch/tcg/tcg_loongarch.h               |  12 ++
 target/loongarch/tcg/translate.c                   |   5 +
 7 files changed, 294 insertions(+), 139 deletions(-)
 create mode 100644 target/loongarch/csr.c
 create mode 100644 target/loongarch/csr.h
 create mode 100644 target/loongarch/tcg/tcg_loongarch.h

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:

  Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929

for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:

  hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)

----------------------------------------------------------------
pull-loongarch-20240929

----------------------------------------------------------------
Bibo Mao (3):
      acpi: ged: Add macro for acpi sleep control register
      hw/loongarch/virt: Add FDT table support with acpi ged pm register
      target/loongarch: Avoid bits shift exceeding width of bool type

Jiaxun Yang (2):
      hw/loongarch/boot: Refactor EFI booting protocol generation
      hw/loongarch/boot: Rework boot code generation

Philippe Mathieu-Daudé (2):
      hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
      hw/loongarch/fw_cfg: Build in common_ss[]

 hw/acpi/generic_event_device.c         |   6 +-
 hw/loongarch/boot.c                    | 321 +++++++++++++++++++++------------
 hw/loongarch/meson.build               |   2 +-
 hw/loongarch/virt.c                    |  39 ++++
 include/hw/acpi/generic_event_device.h |   7 +-
 include/hw/loongarch/boot.h            | 106 +++++++++--
 include/hw/loongarch/virt.h            |   1 -
 target/loongarch/arch_dump.c           |   6 +-
 8 files changed, 342 insertions(+), 146 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Peter Maydell]

On Sun, 29 Sept 2024 at 09:35, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:
>
>   Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
>
> for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
>
>   hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240929
>
> ----------------------------------------------------------------

Hi; this fails to build on 32-bit hosts:


https://gitlab.com/qemu-project/qemu/-/jobs/7953018819
https://gitlab.com/qemu-project/qemu/-/jobs/7953018846

../hw/loongarch/boot.c: In function ‘init_systab_32’:
../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
187 |           ((typeof(p))((uintptr_t)(s) + \
    |            ^
../hw/loongarch/boot.c:201:9: note: in expansion of macro ‘BOOTP_ALIGN_PTR_UP’
201 |      p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
    |          ^~~~~~~~~~~~~~~~~~
../hw/loongarch/boot.c:243:1: note: in expansion of macro ‘EFI_INIT_SYSTAB_GEN’
243 | EFI_INIT_SYSTAB_GEN(32)
    | ^~~~~~~~~~~~~~~~~~~
../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
187 |          ((typeof(p))((uintptr_t)(s) + \
    |           ^

etc.

This happens because if the argument 'n' to BOOTP_ALIGN_PTR_UP()
is a 64-bit type (as EFI_TABLE_ALIGN happens to be) then the
expression ends up being calculated as 64-bits, which is bigger
than the type of a pointer on these hosts.

-- PMM

Re: [PULL 0/7] loongarch-to-apply queue

[gaosong]

在 2024/9/30 下午10:06, Peter Maydell 写道:
> On Sun, 29 Sept 2024 at 09:35, Song Gao <gaosong@loongson.cn> wrote:
>> The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:
>>
>>    Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)
>>
>> are available in the Git repository at:
>>
>>    https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
>>
>> for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
>>
>>    hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)
>>
>> ----------------------------------------------------------------
>> pull-loongarch-20240929
>>
>> ----------------------------------------------------------------
> Hi; this fails to build on 32-bit hosts:
>
>
> https://gitlab.com/qemu-project/qemu/-/jobs/7953018819
> https://gitlab.com/qemu-project/qemu/-/jobs/7953018846
>
> ../hw/loongarch/boot.c: In function ‘init_systab_32’:
> ../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
> different size [-Werror=int-to-pointer-cast]
> 187 |           ((typeof(p))((uintptr_t)(s) + \
>      |            ^
> ../hw/loongarch/boot.c:201:9: note: in expansion of macro ‘BOOTP_ALIGN_PTR_UP’
> 201 |      p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
>      |          ^~~~~~~~~~~~~~~~~~
> ../hw/loongarch/boot.c:243:1: note: in expansion of macro ‘EFI_INIT_SYSTAB_GEN’
> 243 | EFI_INIT_SYSTAB_GEN(32)
>      | ^~~~~~~~~~~~~~~~~~~
> ../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
> different size [-Werror=int-to-pointer-cast]
> 187 |          ((typeof(p))((uintptr_t)(s) + \
>      |           ^
>
> etc.
>
> This happens because if the argument 'n' to BOOTP_ALIGN_PTR_UP()
> is a 64-bit type (as EFI_TABLE_ALIGN happens to be) then the
> expression ends up being calculated as 64-bits, which is bigger
> than the type of a pointer on these hosts.
>
> -- PMM
Sorry for  the late reply.

@Jiaxun  Could you fix this and update the patch?

Thanks.
Song Gao

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:

  Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912

for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:

  hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)

----------------------------------------------------------------
pull-loongarch-20240912

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Add compatible support about VM reboot
      hw/loongarch: Remove default enable with VIRTIO_VGA device
      target/loongarch/kvm: Add vCPU reset function
      target/loongarch: Support QMP dump-guest-memory
      hw/loongarch: Add acpi SPCR table support

Jason A. Donenfeld (2):
      hw/loongarch: virt: support up to 4 serial ports
      hw/loongarch: virt: pass random seed to fdt

 hw/loongarch/Kconfig                 |   1 -
 hw/loongarch/acpi-build.c            |  63 +++++++++++--
 hw/loongarch/virt.c                  |  33 ++++---
 include/hw/pci-host/ls7a.h           |   9 +-
 target/loongarch/arch_dump.c         | 167 +++++++++++++++++++++++++++++++++++
 target/loongarch/cpu.c               |  17 +++-
 target/loongarch/internals.h         |   2 +
 target/loongarch/kvm/kvm.c           |   5 +-
 target/loongarch/kvm/kvm_loongarch.h |   2 +-
 target/loongarch/meson.build         |   1 +
 10 files changed, 274 insertions(+), 26 deletions(-)
 create mode 100644 target/loongarch/arch_dump.c

Re: [PULL 0/7] loongarch-to-apply queue

[Peter Maydell]

On Thu, 12 Sept 2024 at 14:09, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:
>
>   Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912
>
> for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:
>
>   hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240912
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2
for any user-visible changes.

-- PMM

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 63011373ad22c794a013da69663c03f1297a5c56:

  Merge tag 'pull-riscv-to-apply-20231012-1' of https://github.com/alistair23/qemu into staging (2023-10-12 10:24:44 -0400)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231013

for you to fetch changes up to 1bea6930ca7b9587ea8d8fbb77069b6a13aa031a:

  LoongArch: step down as general arch maintainer (2023-10-13 10:05:32 +0800)

----------------------------------------------------------------
pull-loongarch-20231013

*Fix ASXE flag conflict
*Add preldx instruction
*Add preldx instruction
*Remove unused region
*Xiao juan step down as general arch maintainer

----------------------------------------------------------------
Jiajie Chen (1):
      target/loongarch: fix ASXE flag conflict

Philippe Mathieu-Daudé (2):
      hw/loongarch/virt: Remove unused ISA UART
      hw/loongarch/virt: Remove unused ISA Bus

Song Gao (2):
      target/loongarch: Add preldx instruction
      hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region

Thomas Weißschuh (1):
      hw/loongarch: remove global loaderparams variable

Xiaojuan Yang (1):
      LoongArch: step down as general arch maintainer

 MAINTAINERS                                    |   2 -
 hw/loongarch/Kconfig                           |   2 -
 hw/loongarch/virt.c                            | 103 +++++++------------------
 include/hw/loongarch/virt.h                    |   3 -
 target/loongarch/cpu.h                         |   4 +-
 target/loongarch/disas.c                       |   7 ++
 target/loongarch/insn_trans/trans_memory.c.inc |   5 ++
 target/loongarch/insns.decode                  |   3 +
 tests/tcg/loongarch64/system/boot.S            |   7 +-
 9 files changed, 49 insertions(+), 87 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 115 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit a11f65ec1b8adcb012b89c92819cbda4dc25aaf1:

  Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2022-11-01 13:49:33 -0400)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20221103

for you to fetch changes up to d31e2b1af7e6db41e6088679babc3893bd69b4b3:

  target/loongarch: Fix raise_mmu_exception() set wrong exception_index (2022-11-03 17:59:19 +0800)

----------------------------------------------------------------
pull-loongarch-20221103

----------------------------------------------------------------
Song Gao (2):
      target/loongarch: Add exception subcode
      target/loongarch: Fix raise_mmu_exception() set wrong exception_index

Xiaojuan Yang (5):
      hw/intc: Convert the memops to with_attrs in LoongArch extioi
      hw/intc: Fix LoongArch extioi coreisr accessing
      hw/loongarch: Load FDT table into dram memory space
      hw/loongarch: Improve fdt for LoongArch virt machine
      hw/loongarch: Add TPM device for LoongArch virt machine

 hw/intc/loongarch_extioi.c      | 41 ++++++++++++++++-------------
 hw/intc/trace-events            |  3 +--
 hw/loongarch/acpi-build.c       | 50 +++++++++++++++++++++++++++++++++--
 hw/loongarch/virt.c             | 53 ++++++++++++++++++++++++++++++++-----
 include/hw/loongarch/virt.h     |  3 ---
 include/hw/pci-host/ls7a.h      |  1 +
 target/loongarch/cpu.c          |  8 ++++--
 target/loongarch/cpu.h          | 58 ++++++++++++++++++++++-------------------
 target/loongarch/iocsr_helper.c | 19 ++++++++------
 target/loongarch/tlb_helper.c   |  5 ++--
 10 files changed, 170 insertions(+), 71 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

The cross-win32-system GitLab CI job fails to build with the following error:

i686-w64-mingw32-gcc -m32 -Ilibqemu-loongarch64-softmmu.fa.p -I. -I..
-Itarget/loongarch -I../target/loongarch -I../dtc/libfdt -Iqapi
-Itrace -Iui -Iui/shader
-I/usr/i686-w64-mingw32/sys-root/mingw/include/pixman-1
-I/usr/i686-w64-mingw32/sys-root/mingw/include/glib-2.0
-I/usr/i686-w64-mingw32/sys-root/mingw/lib/glib-2.0/include
-fdiagnostics-color=auto -Wall -Winvalid-pch -Werror -std=gnu11 -O2 -g
-iquote . -iquote /builds/qemu-project/qemu -iquote
/builds/qemu-project/qemu/include -iquote
/builds/qemu-project/qemu/tcg/i386 -mms-bitfields -U_FORTIFY_SOURCE
-D_FORTIFY_SOURCE=2 -fno-pie -no-pie -D_GNU_SOURCE
-D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes
-Wredundant-decls -Wundef -Wwrite-strings -Wmissing-prototypes
-fno-strict-aliasing -fno-common -fwrapv -Wold-style-declaration
-Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k
-Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs
-Wendif-labels -Wexpansion-to-defined -Wimplicit-fallthrough=2
-Wno-missing-include-dirs -Wno-shift-negative-value -Wno-psabi
-fstack-protector-strong -DNEED_CPU_H
'-DCONFIG_TARGET="loongarch64-softmmu-config-target.h"'
'-DCONFIG_DEVICES="loongarch64-softmmu-config-devices.h"' -MD -MQ
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj -MF
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj.d -o
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj -c
../hw/loongarch/acpi-build.c
../hw/loongarch/acpi-build.c: In function 'acpi_build':
../hw/loongarch/acpi-build.c:402:9: error: implicit declaration of
function 'tpm_get_version' [-Werror=implicit-function-declaration]
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~~~~~~~~
../hw/loongarch/acpi-build.c:402:9: error: nested extern declaration
of 'tpm_get_version' [-Werror=nested-externs]
../hw/loongarch/acpi-build.c:402:25: error: implicit declaration of
function 'tpm_find' [-Werror=implicit-function-declaration]
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~
../hw/loongarch/acpi-build.c:402:25: error: nested extern declaration
of 'tpm_find' [-Werror=nested-externs]
../hw/loongarch/acpi-build.c:402:40: error: 'TPM_VERSION_2_0'
undeclared (first use in this function); did you mean 'TP_VERSION'?
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~~~~~~~~
| TP_VERSION
../hw/loongarch/acpi-build.c:402:40: note: each undeclared identifier
is reported only once for each function it appears in

https://gitlab.com/qemu-project/qemu/-/jobs/3270049630

Stefan