From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Varadarajan Narayanan <quic_varada@quicinc.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, p.zabel@pengutronix.de,
dmitry.baryshkov@linaro.org, quic_nsekar@quicinc.com,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org,
Praveenkumar I <quic_ipkumar@quicinc.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v7 6/7] arm64: dts: qcom: ipq5332: Add PCIe related nodes
Date: Mon, 3 Feb 2025 21:56:17 +0530 [thread overview]
Message-ID: <20250203162617.sstmdvv7d3k53izf@thinkpad> (raw)
In-Reply-To: <20250122063411.3503097-7-quic_varada@quicinc.com>
On Wed, Jan 22, 2025 at 12:04:10PM +0530, Varadarajan Narayanan wrote:
> From: Praveenkumar I <quic_ipkumar@quicinc.com>
>
> Add phy and controller nodes for pcie0_x1 and pcie1_x2.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
One minor comment below.
[...]
> + assigned-clocks = <&gcc GCC_PCIE3X2_AUX_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_M_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_S_BRIDGE_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_S_CLK>,
> + <&gcc GCC_PCIE3X2_RCHG_CLK>;
> +
> + assigned-clock-rates = <2000000>,
> + <266666666>,
> + <240000000>,
> + <240000000>,
> + <100000000>;
> +
Does the drivers really need to set clock rate for these many clocks?
No, as per the reply to my similar question to IPQ5424:
https://lore.kernel.org/linux-arm-msm/9206e44c-da4f-4bdb-850f-fac511f4ddc7@quicinc.com/
- Mani
--
மணிவண்ணன் சதாசிவம்
WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Varadarajan Narayanan <quic_varada@quicinc.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, p.zabel@pengutronix.de,
dmitry.baryshkov@linaro.org, quic_nsekar@quicinc.com,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org,
Praveenkumar I <quic_ipkumar@quicinc.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v7 6/7] arm64: dts: qcom: ipq5332: Add PCIe related nodes
Date: Mon, 3 Feb 2025 21:56:17 +0530 [thread overview]
Message-ID: <20250203162617.sstmdvv7d3k53izf@thinkpad> (raw)
In-Reply-To: <20250122063411.3503097-7-quic_varada@quicinc.com>
On Wed, Jan 22, 2025 at 12:04:10PM +0530, Varadarajan Narayanan wrote:
> From: Praveenkumar I <quic_ipkumar@quicinc.com>
>
> Add phy and controller nodes for pcie0_x1 and pcie1_x2.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
One minor comment below.
[...]
> + assigned-clocks = <&gcc GCC_PCIE3X2_AUX_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_M_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_S_BRIDGE_CLK>,
> + <&gcc GCC_PCIE3X2_AXI_S_CLK>,
> + <&gcc GCC_PCIE3X2_RCHG_CLK>;
> +
> + assigned-clock-rates = <2000000>,
> + <266666666>,
> + <240000000>,
> + <240000000>,
> + <100000000>;
> +
Does the drivers really need to set clock rate for these many clocks?
No, as per the reply to my similar question to IPQ5424:
https://lore.kernel.org/linux-arm-msm/9206e44c-da4f-4bdb-850f-fac511f4ddc7@quicinc.com/
- Mani
--
மணிவண்ணன் சதாசிவம்
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-02-03 16:26 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-22 6:34 [PATCH v7 0/7] Add PCIe support for Qualcomm IPQ5332 Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-22 6:34 ` [PATCH v7 1/7] dt-bindings: phy: qcom,uniphy-pcie: Document PCIe uniphy Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-23 7:54 ` Krzysztof Kozlowski
2025-01-23 7:54 ` Krzysztof Kozlowski
2025-01-22 6:34 ` [PATCH v7 2/7] phy: qcom: Introduce PCIe UNIPHY 28LP driver Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-22 6:34 ` [PATCH v7 3/7] dt-bindings: PCI: qcom: Use sdx55 reg description for ipq9574 Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-23 7:55 ` Krzysztof Kozlowski
2025-01-23 7:55 ` Krzysztof Kozlowski
2025-02-03 16:16 ` Manivannan Sadhasivam
2025-02-03 16:16 ` Manivannan Sadhasivam
2025-01-22 6:34 ` [PATCH v7 4/7] arm64: dts: qcom: ipq9574: Reorder reg and reg-names Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-27 10:33 ` Konrad Dybcio
2025-01-27 10:33 ` Konrad Dybcio
2025-02-03 16:27 ` Krzysztof Kozlowski
2025-02-03 16:27 ` Krzysztof Kozlowski
2025-01-22 6:34 ` [PATCH v7 5/7] dt-bindings: PCI: qcom: Document the IPQ5332 PCIe controller Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-01-23 7:58 ` Krzysztof Kozlowski
2025-01-23 7:58 ` Krzysztof Kozlowski
2025-01-23 8:05 ` Varadarajan Narayanan
2025-01-23 8:05 ` Varadarajan Narayanan
2025-01-23 8:27 ` Krzysztof Kozlowski
2025-01-23 8:27 ` Krzysztof Kozlowski
2025-01-22 6:34 ` [PATCH v7 6/7] arm64: dts: qcom: ipq5332: Add PCIe related nodes Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-02-03 16:26 ` Manivannan Sadhasivam [this message]
2025-02-03 16:26 ` Manivannan Sadhasivam
2025-01-22 6:34 ` [PATCH v7 7/7] arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers Varadarajan Narayanan
2025-01-22 6:34 ` Varadarajan Narayanan
2025-02-03 16:27 ` Manivannan Sadhasivam
2025-02-03 16:27 ` Manivannan Sadhasivam
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