All of lore.kernel.org
 help / color / mirror / Atom feed
From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, E Shattow <e@freeshell.de>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 0/2] riscv: dts: starfive: Enable USB3.0 for Pine64 Star64
Date: Wed, 19 Feb 2025 17:39:55 +0000	[thread overview]
Message-ID: <20250219-cut-lankiness-0c5c0a561fc6@spud> (raw)
In-Reply-To: <20250102183746.411526-1-e@freeshell.de>

From: Conor Dooley <conor.dooley@microchip.com>

On Thu, 02 Jan 2025 10:37:35 -0800, E Shattow wrote:
> Add PCIe configuration of USB3.0 registers for pciephy0 mode on all
> JH7110 targets:
> 
> VisionFive2 1.2a, not applicable (USB-C peripheral mode power input)
> VisionFive2 1.3b, not applicable (USB-C peripheral mode power input)
> Milk-V Mars, one USB-A port USB3.0 disable (USB2.0 + PCIe0 peripheral)
> Pine64 Star64, one USB-A port USB3.0 enable (USB3.0 + PCIe0 disable)
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive: jh7110: pciephy0 USB 3.0 configuration registers
      https://git.kernel.org/conor/c/65e8b9912670
[2/2] riscv: dts: starfive: jh7110-pine64-star64: enable USB 3.0 port
      https://git.kernel.org/conor/c/38818f7c9c17

Thanks,
Conor.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, E Shattow <e@freeshell.de>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 0/2] riscv: dts: starfive: Enable USB3.0 for Pine64 Star64
Date: Wed, 19 Feb 2025 17:39:55 +0000	[thread overview]
Message-ID: <20250219-cut-lankiness-0c5c0a561fc6@spud> (raw)
In-Reply-To: <20250102183746.411526-1-e@freeshell.de>

From: Conor Dooley <conor.dooley@microchip.com>

On Thu, 02 Jan 2025 10:37:35 -0800, E Shattow wrote:
> Add PCIe configuration of USB3.0 registers for pciephy0 mode on all
> JH7110 targets:
> 
> VisionFive2 1.2a, not applicable (USB-C peripheral mode power input)
> VisionFive2 1.3b, not applicable (USB-C peripheral mode power input)
> Milk-V Mars, one USB-A port USB3.0 disable (USB2.0 + PCIe0 peripheral)
> Pine64 Star64, one USB-A port USB3.0 enable (USB3.0 + PCIe0 disable)
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive: jh7110: pciephy0 USB 3.0 configuration registers
      https://git.kernel.org/conor/c/65e8b9912670
[2/2] riscv: dts: starfive: jh7110-pine64-star64: enable USB 3.0 port
      https://git.kernel.org/conor/c/38818f7c9c17

Thanks,
Conor.

  parent reply	other threads:[~2025-02-19 17:40 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-02 18:37 [PATCH v1 0/2] riscv: dts: starfive: Enable USB3.0 for Pine64 Star64 E Shattow
2025-01-02 18:37 ` [PATCH v1 1/2] riscv: dts: starfive: jh7110: pciephy0 USB 3.0 configuration registers E Shattow
2025-01-02 18:37   ` E Shattow
2025-01-13 18:44   ` Conor Dooley
2025-01-13 18:44     ` Conor Dooley
2025-01-14  5:42     ` Minda Chen
2025-01-14  5:42       ` Minda Chen
2025-01-14 18:11       ` Conor Dooley
2025-01-14 18:11         ` Conor Dooley
2025-01-15 10:58         ` Minda Chen
2025-01-15 10:58           ` Minda Chen
2025-01-17 14:04           ` E Shattow
2025-01-17 14:04             ` E Shattow
2025-01-22 10:41             ` Minda Chen
2025-01-22 10:41               ` Minda Chen
2025-01-23 11:38               ` E Shattow
2025-01-23 11:38                 ` E Shattow
2025-02-14 10:34                 ` Minda Chen
2025-02-14 10:34                   ` Minda Chen
2025-01-17 17:45           ` Conor Dooley
2025-01-17 17:45             ` Conor Dooley
2025-02-19 13:49   ` Emil Renner Berthing
2025-02-19 13:49     ` Emil Renner Berthing
2025-01-02 18:37 ` [PATCH v1 2/2] riscv: dts: starfive: jh7110-pine64-star64: enable USB 3.0 port E Shattow
2025-01-02 18:37   ` E Shattow
2025-02-19 13:50   ` Emil Renner Berthing
2025-02-19 13:50     ` Emil Renner Berthing
2025-02-19 17:39 ` Conor Dooley [this message]
2025-02-19 17:39   ` [PATCH v1 0/2] riscv: dts: starfive: Enable USB3.0 for Pine64 Star64 Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250219-cut-lankiness-0c5c0a561fc6@spud \
    --to=conor@kernel.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=conor.dooley@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=e@freeshell.de \
    --cc=kernel@esmil.dk \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.