From: Yazen Ghannam <yazen.ghannam@amd.com>
To: "Zhuo, Qiuxu" <qiuxu.zhuo@intel.com>
Cc: "x86@kernel.org" <x86@kernel.org>,
"Luck, Tony" <tony.luck@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"Smita.KoralahalliChannabasappa@amd.com"
<Smita.KoralahalliChannabasappa@amd.com>
Subject: Re: [PATCH v2 07/16] x86/mce: Define BSP-only init
Date: Wed, 19 Feb 2025 10:57:45 -0500 [thread overview]
Message-ID: <20250219155745.GB337534@yaz-khff2.amd.com> (raw)
In-Reply-To: <CY8PR11MB71348FE4A5684E941992B5CA89FA2@CY8PR11MB7134.namprd11.prod.outlook.com>
On Tue, Feb 18, 2025 at 03:16:49AM +0000, Zhuo, Qiuxu wrote:
> > From: Yazen Ghannam <yazen.ghannam@amd.com>
> > [...]
> > diff --git a/arch/x86/kernel/cpu/mce/amd.c
> > b/arch/x86/kernel/cpu/mce/amd.c index 302a310d0630..a4ef4ff1a7ff 100644
> > --- a/arch/x86/kernel/cpu/mce/amd.c
> > +++ b/arch/x86/kernel/cpu/mce/amd.c
> > @@ -656,9 +656,6 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
> > u32 low = 0, high = 0, address = 0;
> > int offset = -1;
> >
> > - mce_flags.overflow_recov =
> > cpu_feature_enabled(X86_FEATURE_OVERFLOW_RECOV);
> > - mce_flags.succor =
> > cpu_feature_enabled(X86_FEATURE_SUCCOR);
> > - mce_flags.smca =
> > cpu_feature_enabled(X86_FEATURE_SMCA);
> > mce_flags.amd_threshold = 1;
> >
> > [...]
> > --- a/arch/x86/kernel/cpu/mce/core.c
> > +++ b/arch/x86/kernel/cpu/mce/core.c
> > [...]
> > +/* Called only on the boot CPU. */
> > +void cpu_mca_init(struct cpuinfo_x86 *c) {
> > + u64 cap;
> > +
> > + if (!mce_available(c))
> > + return;
> > +
> > + mce_flags.overflow_recov =
> > cpu_feature_enabled(X86_FEATURE_OVERFLOW_RECOV);
> > + mce_flags.succor =
> > cpu_feature_enabled(X86_FEATURE_SUCCOR);
> > + mce_flags.smca =
> > cpu_feature_enabled(X86_FEATURE_SMCA);
>
> 1. Before this patch set, the above code was executed only if the following
> condition was true. Do we still need this check?
>
> if (c->x86_vendor == X86_VENDOR_AMD || c->x86_vendor == X86_VENDOR_HYGON)
> {
> The above code.
> }
I don't think so. Feature checks should be independent of vendor, so the
vendor checks are redundant.
>
> 2. Can " mce_flags.amd_threshold = 1;" also be moved here?
>
No, because this flag is not based on a CPU feature. However, I think
more cleanup can be done for this, but that will come later.
Thanks,
Yazen
next prev parent reply other threads:[~2025-02-19 15:57 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-13 16:45 [PATCH v2 00/16] AMD MCA interrupts rework Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 01/16] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-02-17 6:58 ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 02/16] x86/mce/amd: Remove return value for mce_threshold_create_device() Yazen Ghannam
2025-02-17 7:11 ` Zhuo, Qiuxu
2025-02-17 14:09 ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 03/16] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-02-17 7:57 ` Zhuo, Qiuxu
2025-02-17 14:17 ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 04/16] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-02-18 1:28 ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 05/16] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-02-13 22:32 ` Luck, Tony
2025-02-17 13:55 ` Yazen Ghannam
2025-02-18 16:40 ` Luck, Tony
2025-02-18 2:15 ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 06/16] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-02-18 3:00 ` Zhuo, Qiuxu
2025-02-19 15:53 ` Yazen Ghannam
2025-02-27 15:25 ` Borislav Petkov
2025-02-27 16:31 ` Yazen Ghannam
2025-02-27 19:33 ` Borislav Petkov
2025-02-27 19:59 ` Yazen Ghannam
2025-02-27 20:48 ` Borislav Petkov
2025-02-28 14:29 ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 07/16] x86/mce: Define BSP-only init Yazen Ghannam
2025-02-18 3:16 ` Zhuo, Qiuxu
2025-02-19 15:57 ` Yazen Ghannam [this message]
2025-02-20 1:37 ` Zhuo, Qiuxu
2025-02-20 14:36 ` Yazen Ghannam
2025-02-24 13:28 ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 08/16] x86/mce: Define BSP-only SMCA init Yazen Ghannam
2025-02-18 3:33 ` Zhuo, Qiuxu
2025-02-19 16:01 ` Yazen Ghannam
2025-02-13 16:45 ` [PATCH v2 09/16] x86/mce: Do 'UNKNOWN' vendor check early Yazen Ghannam
2025-02-18 5:31 ` Zhuo, Qiuxu
2025-02-13 16:45 ` [PATCH v2 10/16] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-02-18 6:03 ` Zhuo, Qiuxu
2025-02-19 16:06 ` Yazen Ghannam
2025-02-20 1:27 ` Zhuo, Qiuxu
2025-02-20 14:37 ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 11/16] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-02-18 6:29 ` Zhuo, Qiuxu
2025-02-13 16:46 ` [PATCH v2 12/16] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-02-18 6:42 ` Zhuo, Qiuxu
2025-02-19 16:07 ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 13/16] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-02-18 7:37 ` Zhuo, Qiuxu
2025-02-19 16:09 ` Yazen Ghannam
2025-02-20 1:41 ` Zhuo, Qiuxu
2025-02-20 14:41 ` Yazen Ghannam
2025-02-24 13:31 ` Zhuo, Qiuxu
2025-02-13 16:46 ` [PATCH v2 14/16] x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems Yazen Ghannam
2025-02-18 8:23 ` Zhuo, Qiuxu
2025-02-19 16:16 ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 15/16] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-02-13 22:34 ` Luck, Tony
2025-02-17 14:06 ` Yazen Ghannam
2025-02-18 13:27 ` Zhuo, Qiuxu
2025-02-19 16:19 ` Yazen Ghannam
2025-02-13 16:46 ` [PATCH v2 16/16] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-02-18 13:51 ` Zhuo, Qiuxu
2025-02-13 22:40 ` [PATCH v2 00/16] AMD MCA interrupts rework Luck, Tony
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