From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
stephen@networkplumber.org,
Danylo Vodopianov <dvo-plv@napatech.com>
Subject: [PATCH v1 21/32] net/ntnic: add nt400d13 pcm init
Date: Thu, 20 Feb 2025 23:03:45 +0100 [thread overview]
Message-ID: <20250220220406.3925597-22-sil-plv@napatech.com> (raw)
In-Reply-To: <20250220220406.3925597-1-sil-plv@napatech.com>
From: Danylo Vodopianov <dvo-plv@napatech.com>
Initialize and create PCM for FPGA and HIF modules
Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
---
drivers/net/ntnic/meson.build | 1 +
.../nthw/core/include/nthw_pcm_nt400dxx.h | 24 +++++++-
.../nt400dxx/reset/nthw_fpga_rst_nt400dxx.c | 18 ++++++
.../net/ntnic/nthw/core/nthw_pcm_nt400dxx.c | 56 +++++++++++++++++++
drivers/net/ntnic/nthw/nthw_drv.h | 1 +
5 files changed, 99 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/nthw/core/nthw_pcm_nt400dxx.c
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index aec7b52714..b9ac069bcc 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -61,6 +61,7 @@ sources = files(
'nthw/core/nthw_pcie3.c',
'nthw/core/nthw_pca9532.c',
'nthw/core/nthw_pcal6416a.c',
+ 'nthw/core/nthw_pcm_nt400dxx.c',
'nthw/core/nthw_phy_tile.c',
'nthw/core/nthw_si5332_si5156.c',
'nthw/core/nthw_rpf.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_pcm_nt400dxx.h b/drivers/net/ntnic/nthw/core/include/nthw_pcm_nt400dxx.h
index 1e114886ca..23865f466b 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_pcm_nt400dxx.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_pcm_nt400dxx.h
@@ -5,10 +5,32 @@
#ifndef __NTHW_PCM_NT400DXX_H__
#define __NTHW_PCM_NT400DXX_H__
+#include "nthw_fpga_model.h"
+
struct nthw_pcm_nt400_dxx {
+ nthw_fpga_t *mp_fpga;
+ nthw_module_t *mp_mod_pcm;
+ int mn_instance;
+
+ int mn_module_major_version;
int mn_module_minor_version;
+
+ nthw_register_t *mp_reg_ctrl;
+ nthw_field_t *mp_fld_ctrl_ts_pll_recal; /* Dunite HW version 3 */
+ nthw_field_t *mp_fld_ctrl_ts_clksel;
+ nthw_field_t *mp_fld_ctrl_ts_pll_rst;
+
+ nthw_register_t *mp_reg_stat;
+ nthw_field_t *mp_fld_stat_ts_pll_locked;
+
+ nthw_register_t *mp_reg_latch;
+ nthw_field_t *mp_fld_latch_ts_pll_locked;
};
typedef struct nthw_pcm_nt400_dxx nthw_pcm_nt400dxx_t;
+typedef struct nthw_pcm_nt400_dxx nthw_pcm_nt400_dxx;
+
+nthw_pcm_nt400dxx_t *nthw_pcm_nt400dxx_new(void);
+int nthw_pcm_nt400dxx_init(nthw_pcm_nt400dxx_t *p, nthw_fpga_t *p_fpga, int n_instance);
-#endif /* __NTHW_PCM_NT400DXX_H__ */
+#endif /* __NTHW_PCM_NT400DXX_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
index e0e4bc0861..1d93474cff 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
@@ -13,6 +13,24 @@
static int nthw_fpga_rst_nt400dxx_init(struct fpga_info_s *p_fpga_info)
{
assert(p_fpga_info);
+ int res = -1;
+ nthw_fpga_t *p_fpga = NULL;
+
+ p_fpga = p_fpga_info->mp_fpga;
+
+ nthw_hif_t *p_nthw_hif = nthw_hif_new();
+ res = nthw_hif_init(p_nthw_hif, p_fpga, 0);
+
+ if (res == 0)
+ NT_LOG(DBG, NTHW, "%s: Hif module found", p_fpga_info->mp_adapter_id_str);
+
+ /* Create PCM */
+ p_fpga_info->mp_nthw_agx.p_pcm = nthw_pcm_nt400dxx_new();
+ res = nthw_pcm_nt400dxx_init(p_fpga_info->mp_nthw_agx.p_pcm, p_fpga, 0);
+
+ if (res != 0)
+ return res;
+
return 0;
}
diff --git a/drivers/net/ntnic/nthw/core/nthw_pcm_nt400dxx.c b/drivers/net/ntnic/nthw/core/nthw_pcm_nt400dxx.c
new file mode 100644
index 0000000000..f32a277e86
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nthw_pcm_nt400dxx.c
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+#include "nthw_fpga.h"
+
+#include "nthw_pcm_nt400dxx.h"
+
+nthw_pcm_nt400dxx_t *nthw_pcm_nt400dxx_new(void)
+{
+ nthw_pcm_nt400dxx_t *p = malloc(sizeof(nthw_pcm_nt400dxx_t));
+
+ if (p)
+ memset(p, 0, sizeof(nthw_pcm_nt400dxx_t));
+
+ return p;
+}
+
+int nthw_pcm_nt400dxx_init(nthw_pcm_nt400dxx_t *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_PCM_NT400DXX, n_instance);
+
+ if (p == NULL)
+ return p_mod == NULL ? -1 : 0;
+
+ if (p_mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: PCM_NT400DXX %d: no such instance",
+ p->mp_fpga->p_fpga_info->mp_adapter_id_str, p->mn_instance);
+ return -1;
+ }
+
+ p->mp_mod_pcm = p_mod;
+
+ p->mp_fpga = p_fpga;
+ p->mn_instance = n_instance;
+
+ p->mn_module_major_version = nthw_module_get_major_version(p->mp_mod_pcm);
+ p->mn_module_minor_version = nthw_module_get_minor_version(p->mp_mod_pcm);
+
+ p->mp_reg_ctrl = nthw_module_get_register(p->mp_mod_pcm, PCM_NT400DXX_CTRL);
+ p->mp_fld_ctrl_ts_pll_recal =
+ nthw_register_query_field(p->mp_reg_ctrl, PCM_NT400DXX_CTRL_TS_PLL_RECAL);
+
+ p->mp_reg_stat = nthw_module_get_register(p->mp_mod_pcm, PCM_NT400DXX_STAT);
+ p->mp_fld_stat_ts_pll_locked =
+ nthw_register_get_field(p->mp_reg_stat, PCM_NT400DXX_STAT_TS_PLL_LOCKED);
+
+ p->mp_reg_latch = nthw_module_get_register(p->mp_mod_pcm, PCM_NT400DXX_LATCH);
+ p->mp_fld_latch_ts_pll_locked =
+ nthw_register_get_field(p->mp_reg_latch, PCM_NT400DXX_LATCH_TS_PLL_LOCKED);
+
+ return 0;
+}
diff --git a/drivers/net/ntnic/nthw/nthw_drv.h b/drivers/net/ntnic/nthw/nthw_drv.h
index 1d5b750db9..955d0a37b0 100644
--- a/drivers/net/ntnic/nthw/nthw_drv.h
+++ b/drivers/net/ntnic/nthw/nthw_drv.h
@@ -15,6 +15,7 @@
#include "nthw_rpf.h"
#include "nthw_pcm_nt400dxx.h"
#include "nthw_phy_tile.h"
+#include "nthw_pcm_nt400dxx.h"
/*
* Structs for controlling Agilex based NT400DXX adapter
--
2.45.0
next prev parent reply other threads:[~2025-02-20 22:06 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 22:03 [PATCH v1 00/32] add new adapter NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 01/32] net/ntnic: add link agx 100g Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 02/32] net/ntnic: add link state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 03/32] net/ntnic: add rpf and gfg init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 04/32] net/ntnic: add agx setup for port Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 05/32] net/ntnic: add host loopback init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 06/32] net/ntnic: add line " Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 07/32] net/ntnic: add 100 gbps port init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 08/32] net/ntnic: add port post init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 09/32] net/ntnic: add nim low power API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 10/32] net/ntnic: add link handling API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 11/32] net/ntnic: add port init to the state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 12/32] net/ntnic: add port disable API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 13/32] net/ntnic: add minimal initialization new NIC NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 14/32] net/ntnic: add minimal reset FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 15/32] net/ntnic: add FPGA modules and registers Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 16/32] net/ntnic: add setup for fpga reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 17/32] net/ntnic: add default reset setting for NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 18/32] net/ntnic: add DDR calibration to reset stage Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 19/32] net/ntnic: add PHY ftile reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 20/32] net/ntnic: add clock init Serhii Iliushyk
2025-03-05 17:03 ` David Marchand
2025-03-07 10:20 ` Serhii Iliushyk
2025-02-20 22:03 ` Serhii Iliushyk [this message]
2025-02-20 22:03 ` [PATCH v1 22/32] net/ntnic: add HIF clock test Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 23/32] net/ntnic: add nt400d13 PRM module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 24/32] net/ntnic: add nt400d13 PRM module reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 25/32] net/ntnic: add SPI v3 support for FPGA Serhii Iliushyk
2025-02-22 19:21 ` Stephen Hemminger
2025-02-20 22:03 ` [PATCH v1 26/32] net/ntnic: add i2cm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 27/32] net/ntnic: add pca init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 28/32] net/ntnic: add pcal init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 29/32] net/ntnic: add reset PHY init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 30/32] net/ntnic: add igam module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 31/32] net/ntnic: init IGAM and config PLL for FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 32/32] net/ntnic: revert untrusted loop bound Serhii Iliushyk
2025-02-20 22:31 ` Stephen Hemminger
2025-02-20 23:49 ` [PATCH v1 00/32] add new adapter NT400D13 Stephen Hemminger
2025-02-22 21:41 ` Stephen Hemminger
2025-04-11 10:36 ` Serhii Iliushyk
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