From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
stephen@networkplumber.org,
Danylo Vodopianov <dvo-plv@napatech.com>
Subject: [PATCH v1 23/32] net/ntnic: add nt400d13 PRM module init
Date: Thu, 20 Feb 2025 23:03:47 +0100 [thread overview]
Message-ID: <20250220220406.3925597-24-sil-plv@napatech.com> (raw)
In-Reply-To: <20250220220406.3925597-1-sil-plv@napatech.com>
From: Danylo Vodopianov <dvo-plv@napatech.com>
Initialize RAB0 and create PRM for FPGA.
Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
---
drivers/net/ntnic/meson.build | 1 +
.../nthw/core/include/nthw_prm_nt400dxx.h | 30 +++++++++++++
.../nt400dxx/reset/nthw_fpga_rst_nt400dxx.c | 11 +++++
.../net/ntnic/nthw/core/nthw_prm_nt400dxx.c | 43 +++++++++++++++++++
drivers/net/ntnic/nthw/nthw_drv.h | 2 +
5 files changed, 87 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_prm_nt400dxx.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_prm_nt400dxx.c
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index b9ac069bcc..9885d4efbf 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -63,6 +63,7 @@ sources = files(
'nthw/core/nthw_pcal6416a.c',
'nthw/core/nthw_pcm_nt400dxx.c',
'nthw/core/nthw_phy_tile.c',
+ 'nthw/core/nthw_prm_nt400dxx.c',
'nthw/core/nthw_si5332_si5156.c',
'nthw/core/nthw_rpf.c',
'nthw/core/nthw_rmc.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_prm_nt400dxx.h b/drivers/net/ntnic/nthw/core/include/nthw_prm_nt400dxx.h
new file mode 100644
index 0000000000..09bfd79249
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_prm_nt400dxx.h
@@ -0,0 +1,30 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef NTHW_PRM_NT400DXX_H_
+#define NTHW_PRM_NT400DXX_H_
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct nt_prm_nt400dxx {
+ nthw_fpga_t *mp_fpga;
+ nthw_module_t *mp_mod_prm;
+
+ int mn_instance;
+
+ nthw_register_t *mp_reg_rst;
+ nthw_field_t *mp_fld_rst_periph;
+ nthw_field_t *mp_fld_rst_platform;
+};
+
+typedef struct nt_prm_nt400dxx nthw_prm_nt400dxx_t;
+typedef struct nt_prm_nt400dxx nt_prm_nt400dxx;
+
+nthw_prm_nt400dxx_t *nthw_prm_nt400dxx_new(void);
+int nthw_prm_nt400dxx_init(nthw_prm_nt400dxx_t *p, nthw_fpga_t *p_fpga, int n_instance);
+
+#endif /* NTHW_PRM_NT400DXX_H_ */
diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
index 60e7714283..4d74db88de 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
@@ -44,6 +44,17 @@ static int nthw_fpga_rst_nt400dxx_init(struct fpga_info_s *p_fpga_info)
nthw_hif_delete(p_nthw_hif);
+ /* (b) Init RAB0 */
+ nthw_rac_rab_init(p_fpga_info->mp_nthw_rac, 0x7);
+ nthw_rac_rab_init(p_fpga_info->mp_nthw_rac, 0x6);
+
+ /* Create PRM */
+ p_fpga_info->mp_nthw_agx.p_prm = nthw_prm_nt400dxx_new();
+ res = nthw_prm_nt400dxx_init(p_fpga_info->mp_nthw_agx.p_prm, p_fpga, 0);
+
+ if (res != 0)
+ return res;
+
/* Create PCM */
p_fpga_info->mp_nthw_agx.p_pcm = nthw_pcm_nt400dxx_new();
res = nthw_pcm_nt400dxx_init(p_fpga_info->mp_nthw_agx.p_pcm, p_fpga, 0);
diff --git a/drivers/net/ntnic/nthw/core/nthw_prm_nt400dxx.c b/drivers/net/ntnic/nthw/core/nthw_prm_nt400dxx.c
new file mode 100644
index 0000000000..b1910fdbd5
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nthw_prm_nt400dxx.c
@@ -0,0 +1,43 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+#include "nthw_prm_nt400dxx.h"
+
+nthw_prm_nt400dxx_t *nthw_prm_nt400dxx_new(void)
+{
+ nthw_prm_nt400dxx_t *p = malloc(sizeof(nthw_prm_nt400dxx_t));
+
+ if (p)
+ memset(p, 0, sizeof(nthw_prm_nt400dxx_t));
+
+ return p;
+}
+
+int nthw_prm_nt400dxx_init(nthw_prm_nt400dxx_t *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_PRM_NT400DXX, n_instance);
+
+ if (p == NULL)
+ return p_mod == NULL ? -1 : 0;
+
+ if (p_mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: PRM_NT400DXX %d: no such instance",
+ p->mp_fpga->p_fpga_info->mp_adapter_id_str, p->mn_instance);
+ return -1;
+ }
+
+ p->mp_mod_prm = p_mod;
+
+ p->mp_fpga = p_fpga;
+ p->mn_instance = n_instance;
+
+ p->mp_reg_rst = nthw_module_get_register(p->mp_mod_prm, PRM_NT400DXX_RST);
+ p->mp_fld_rst_periph = nthw_register_get_field(p->mp_reg_rst, PRM_NT400DXX_RST_PERIPH);
+ p->mp_fld_rst_platform = nthw_register_get_field(p->mp_reg_rst, PRM_NT400DXX_RST_PLATFORM);
+ return 0;
+}
diff --git a/drivers/net/ntnic/nthw/nthw_drv.h b/drivers/net/ntnic/nthw/nthw_drv.h
index 955d0a37b0..ecd3bb9cc4 100644
--- a/drivers/net/ntnic/nthw/nthw_drv.h
+++ b/drivers/net/ntnic/nthw/nthw_drv.h
@@ -15,6 +15,7 @@
#include "nthw_rpf.h"
#include "nthw_pcm_nt400dxx.h"
#include "nthw_phy_tile.h"
+#include "nthw_prm_nt400dxx.h"
#include "nthw_pcm_nt400dxx.h"
/*
@@ -27,6 +28,7 @@ typedef struct nthw_agx_s {
nthw_pca9532_t *p_pca9532_led;
nthw_si5332_t *p_si5332;
nthw_si5156_t *p_si5156;
+ nthw_prm_nt400dxx_t *p_prm;
nthw_pcm_nt400dxx_t *p_pcm;
nthw_phy_tile_t *p_phy_tile;
nthw_rpf_t *p_rpf;
--
2.45.0
next prev parent reply other threads:[~2025-02-20 22:06 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 22:03 [PATCH v1 00/32] add new adapter NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 01/32] net/ntnic: add link agx 100g Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 02/32] net/ntnic: add link state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 03/32] net/ntnic: add rpf and gfg init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 04/32] net/ntnic: add agx setup for port Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 05/32] net/ntnic: add host loopback init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 06/32] net/ntnic: add line " Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 07/32] net/ntnic: add 100 gbps port init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 08/32] net/ntnic: add port post init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 09/32] net/ntnic: add nim low power API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 10/32] net/ntnic: add link handling API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 11/32] net/ntnic: add port init to the state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 12/32] net/ntnic: add port disable API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 13/32] net/ntnic: add minimal initialization new NIC NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 14/32] net/ntnic: add minimal reset FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 15/32] net/ntnic: add FPGA modules and registers Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 16/32] net/ntnic: add setup for fpga reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 17/32] net/ntnic: add default reset setting for NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 18/32] net/ntnic: add DDR calibration to reset stage Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 19/32] net/ntnic: add PHY ftile reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 20/32] net/ntnic: add clock init Serhii Iliushyk
2025-03-05 17:03 ` David Marchand
2025-03-07 10:20 ` Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 21/32] net/ntnic: add nt400d13 pcm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 22/32] net/ntnic: add HIF clock test Serhii Iliushyk
2025-02-20 22:03 ` Serhii Iliushyk [this message]
2025-02-20 22:03 ` [PATCH v1 24/32] net/ntnic: add nt400d13 PRM module reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 25/32] net/ntnic: add SPI v3 support for FPGA Serhii Iliushyk
2025-02-22 19:21 ` Stephen Hemminger
2025-02-20 22:03 ` [PATCH v1 26/32] net/ntnic: add i2cm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 27/32] net/ntnic: add pca init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 28/32] net/ntnic: add pcal init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 29/32] net/ntnic: add reset PHY init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 30/32] net/ntnic: add igam module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 31/32] net/ntnic: init IGAM and config PLL for FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 32/32] net/ntnic: revert untrusted loop bound Serhii Iliushyk
2025-02-20 22:31 ` Stephen Hemminger
2025-02-20 23:49 ` [PATCH v1 00/32] add new adapter NT400D13 Stephen Hemminger
2025-02-22 21:41 ` Stephen Hemminger
2025-04-11 10:36 ` Serhii Iliushyk
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250220220406.3925597-24-sil-plv@napatech.com \
--to=sil-plv@napatech.com \
--cc=ckm@napatech.com \
--cc=dev@dpdk.org \
--cc=dvo-plv@napatech.com \
--cc=mko-plv@napatech.com \
--cc=stephen@networkplumber.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.