Re: [PATCH v4 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller

From: Rob Herring <robh@kernel.org>
To: Ben Zong-You Xie <ben717@andestech.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, krzk+dt@kernel.org,
	conor+dt@kernel.org, tglx@linutronix.de,
	daniel.lezcano@linaro.org,
	prabhakar.mahadev-lad.rj@bp.renesas.com, geert+renesas@glider.be,
	magnus.damm@gmail.com, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	tim609@andestech.com, Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller
Date: Wed, 14 May 2025 10:01:02 -0500	[thread overview]
Message-ID: <20250514150102.GA2180131-robh@kernel.org> (raw)
In-Reply-To: <20250514095350.3765716-5-ben717@andestech.com>

On Wed, May 14, 2025 at 05:53:45PM +0800, Ben Zong-You Xie wrote:
> Add the DT binding documentation for Andes machine-level software
> interrupt controller.
> 
> In the Andes platform such as QiLai SoC, the PLIC module is instantiated a
> second time with all interrupt sources tied to zero as the software
> interrupt controller (PLICSW). PLICSW can generate machine-level software
> interrupts through programming its registers.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
> ---
>  .../andestech,plicsw.yaml                     | 54 +++++++++++++++++++
>  MAINTAINERS                                   |  1 +

This won't apply for me due to MAINTAINERS conflict with this series. So 
apply the bindings patches with the dts files.

Rob

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