[PATCH 01/13] configs: imx8m*_venice: enable several commands useful for scripting

[PATCH 01/13] configs: imx8m*_venice: enable several commands useful for scripting

[Tim Harvey]

enable cat, xxd, and the ability for setexpr to return values in
variables which are all useful for scripting.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 configs/imx8mm_venice_defconfig | 3 +++
 configs/imx8mn_venice_defconfig | 3 +++
 configs/imx8mp_venice_defconfig | 3 +++
 3 files changed, 9 insertions(+)

diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 051cd7efa81a..25fc1aa0ce63 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -66,6 +66,9 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CAT=y
+CONFIG_CMD_SETEXPR_FMT=y
+CONFIG_CMD_XXD=y
 CONFIG_CMD_DHCP6=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_SYS_DISABLE_AUTOLOAD=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index fd8701e11a43..7a22535e5c9a 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -66,6 +66,9 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CAT=y
+CONFIG_CMD_SETEXPR_FMT=y
+CONFIG_CMD_XXD=y
 CONFIG_CMD_DHCP6=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_SYS_DISABLE_AUTOLOAD=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index b91e69a25e2e..8aa9232cc8df 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -68,6 +68,9 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_CAT=y
+CONFIG_CMD_SETEXPR_FMT=y
+CONFIG_CMD_XXD=y
 CONFIG_CMD_DHCP6=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_SYS_DISABLE_AUTOLOAD=y
-- 
2.25.1

[PATCH 02/13] configs: imx8m*_venice: enable GPT support

[Tim Harvey]

Enable support for working with General Partition Tables via the 'gpt'
command. Also enable support for generating random UUID's for GPT.

See: doc/README.gpt for examples

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 configs/imx8mm_venice_defconfig | 2 ++
 configs/imx8mn_venice_defconfig | 2 ++
 configs/imx8mp_venice_defconfig | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 25fc1aa0ce63..0f263a3ecb80 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -61,6 +61,8 @@ CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 7a22535e5c9a..4fc8e146b06d 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -62,6 +62,8 @@ CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 8aa9232cc8df..8f591f4c7dce 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -64,6 +64,8 @@ CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-- 
2.25.1

[PATCH 03/13] board: venice: move soc-specific dram config into soc-specific files

[Tim Harvey]

Move the determination of the dram timings into the soc-specific files.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/lpddr4_timing.h        | 14 +--
 board/gateworks/venice/lpddr4_timing_imx8mm.c | 57 ++++++++----
 board/gateworks/venice/lpddr4_timing_imx8mn.c | 31 ++++++-
 board/gateworks/venice/lpddr4_timing_imx8mp.c | 23 ++++-
 board/gateworks/venice/spl.c                  | 86 ++++---------------
 5 files changed, 108 insertions(+), 103 deletions(-)

diff --git a/board/gateworks/venice/lpddr4_timing.h b/board/gateworks/venice/lpddr4_timing.h
index d19902f10ec3..21997f6fb2a1 100644
--- a/board/gateworks/venice/lpddr4_timing.h
+++ b/board/gateworks/venice/lpddr4_timing.h
@@ -6,18 +6,6 @@
 #ifndef __LPDDR4_TIMING_H__
 #define __LPDDR4_TIMING_H__
 
-#ifdef CONFIG_IMX8MM
-extern struct dram_timing_info dram_timing_512mb;
-extern struct dram_timing_info dram_timing_1gb;
-extern struct dram_timing_info dram_timing_2gb;
-extern struct dram_timing_info dram_timing_4gb;
-#elif CONFIG_IMX8MN
-extern struct dram_timing_info dram_timing_1gb_single_die;
-extern struct dram_timing_info dram_timing_2gb_single_die;
-extern struct dram_timing_info dram_timing_2gb_dual_die;
-#elif CONFIG_IMX8MP
-extern struct dram_timing_info dram_timing_1gb_single_die;
-extern struct dram_timing_info dram_timing_4gb_dual_die;
-#endif
+extern struct dram_timing_info *spl_dram_init(const char *model, int sizemb);
 
 #endif /* __LPDDR4_TIMING_H__ */
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm.c b/board/gateworks/venice/lpddr4_timing_imx8mm.c
index 3f2c090a94fc..39e4e46490fd 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mm.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mm.c
@@ -1830,7 +1830,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg_512mb[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_512mb = {
+static struct dram_timing_info dram_timing_512mb = {
 	.ddrc_cfg = ddr_ddrc_cfg_512mb,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_512mb),
 	.ddrphy_cfg = ddr_ddrphy_cfg_512mb,
@@ -2489,7 +2489,7 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg_1gb[] = {
 };
 
 /* lpddr4 timing config params */
-struct dram_timing_info dram_timing_1gb = {
+static struct dram_timing_info dram_timing_1gb = {
 	.ddrc_cfg = lpddr4_ddrc_cfg_1gb,
 	.ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg_1gb),
 	.ddrphy_cfg = lpddr4_ddrphy_cfg_1gb,
@@ -3005,7 +3005,7 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg_4gb[] = {
 };
 
 /* lpddr4 timing config params */
-struct dram_timing_info dram_timing_4gb = {
+static struct dram_timing_info dram_timing_4gb = {
 	.ddrc_cfg = lpddr4_ddrc_cfg_4gb,
 	.ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg_4gb),
 	.ddrphy_cfg = lpddr4_ddrphy_cfg_4gb,
@@ -3140,12 +3140,12 @@ static struct dram_cfg_param lpddr4_ddrphy_cfg_2gb[] = {
 	{ 0x100a7, 0x7 },
 	{ 0x110a0, 0x0 },
 	{ 0x110a1, 0x1 },
-	{ 0x110a2, 0x2 },
-	{ 0x110a3, 0x3 },
-	{ 0x110a4, 0x4 },
-	{ 0x110a5, 0x5 },
-	{ 0x110a6, 0x6 },
-	{ 0x110a7, 0x7 },
+	{ 0x110a2, 0x3 },
+	{ 0x110a3, 0x4 },
+	{ 0x110a4, 0x5 },
+	{ 0x110a5, 0x2 },
+	{ 0x110a6, 0x7 },
+	{ 0x110a7, 0x6 },
 	{ 0x120a0, 0x0 },
 	{ 0x120a1, 0x1 },
 	{ 0x120a2, 0x3 },
@@ -3156,12 +3156,12 @@ static struct dram_cfg_param lpddr4_ddrphy_cfg_2gb[] = {
 	{ 0x120a7, 0x6 },
 	{ 0x130a0, 0x0 },
 	{ 0x130a1, 0x1 },
-	{ 0x130a2, 0x5 },
-	{ 0x130a3, 0x2 },
-	{ 0x130a4, 0x3 },
-	{ 0x130a5, 0x4 },
-	{ 0x130a6, 0x7 },
-	{ 0x130a7, 0x6 },
+	{ 0x130a2, 0x2 },
+	{ 0x130a3, 0x3 },
+	{ 0x130a4, 0x4 },
+	{ 0x130a5, 0x5 },
+	{ 0x130a6, 0x6 },
+	{ 0x130a7, 0x7 },
 	{ 0x1005f, 0x1ff },
 	{ 0x1015f, 0x1ff },
 	{ 0x1105f, 0x1ff },
@@ -3521,7 +3521,7 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg_2gb[] = {
 };
 
 /* lpddr4 timing config params */
-struct dram_timing_info dram_timing_2gb = {
+static struct dram_timing_info dram_timing_2gb = {
 	.ddrc_cfg = lpddr4_ddrc_cfg_2gb,
 	.ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg_2gb),
 	.ddrphy_cfg = lpddr4_ddrphy_cfg_2gb,
@@ -3534,3 +3534,28 @@ struct dram_timing_info dram_timing_2gb = {
 	.ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie),
 	.fsp_table = { 3000, 400, 100, },
 };
+
+struct dram_timing_info *spl_dram_init(const char *model, int sizemb)
+{
+	struct dram_timing_info *dram_timing;
+
+	switch (sizemb) {
+	case 512:
+		dram_timing = &dram_timing_512mb;
+		break;
+	case 1024:
+		dram_timing = &dram_timing_1gb;
+		break;
+	case 2048:
+		dram_timing = &dram_timing_2gb;
+		break;
+	case 4096:
+		dram_timing = &dram_timing_4gb;
+		break;
+	default:
+		printf("unsupported");
+		dram_timing = &dram_timing_1gb;
+	}
+
+	return dram_timing;
+}
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mn.c b/board/gateworks/venice/lpddr4_timing_imx8mn.c
index 9ba2d2571ce5..e7d04822c9cf 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mn.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mn.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 
 #include <linux/kernel.h>
+#include <string.h>
 #include <asm/arch/ddr.h>
 
 /*
@@ -1425,7 +1426,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg_1gb_single_die[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_1gb_single_die = {
+static struct dram_timing_info dram_timing_1gb_single_die = {
 	.ddrc_cfg = ddr_ddrc_cfg_1gb_single_die,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_1gb_single_die),
 	.ddrphy_cfg = ddr_ddrphy_cfg_1gb_single_die,
@@ -1890,7 +1891,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg_2gb_single_die[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_2gb_single_die = {
+static struct dram_timing_info dram_timing_2gb_single_die = {
 	.ddrc_cfg = ddr_ddrc_cfg_2gb_single_die,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_2gb_single_die),
 	.ddrphy_cfg = ddr_ddrphy_cfg_2gb_single_die,
@@ -2354,7 +2355,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg_2gb_dual_die[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_2gb_dual_die = {
+static struct dram_timing_info dram_timing_2gb_dual_die = {
 	.ddrc_cfg = ddr_ddrc_cfg_2gb_dual_die,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_2gb_dual_die),
 	.ddrphy_cfg = ddr_ddrphy_cfg_2gb_dual_die,
@@ -2367,3 +2368,27 @@ struct dram_timing_info dram_timing_2gb_dual_die = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 400, 100, },
 };
+
+struct dram_timing_info *spl_dram_init(const char *model, int sizemb)
+{
+	struct dram_timing_info *dram_timing;
+
+	switch (sizemb) {
+	case 1024:
+		dram_timing = &dram_timing_1gb_single_die;
+		break;
+	case 2048:
+		if (!strcmp(model, "GW7902-SP466-A") ||
+		    !strcmp(model, "GW7902-SP466-B")) {
+			dram_timing = &dram_timing_2gb_dual_die;
+		} else {
+			dram_timing = &dram_timing_2gb_single_die;
+		}
+		break;
+	default:
+		printf("unsupported");
+		dram_timing = &dram_timing_2gb_dual_die;
+	}
+
+	return dram_timing;
+}
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mp.c b/board/gateworks/venice/lpddr4_timing_imx8mp.c
index 56c6e2b5cff7..36c4cb147e82 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mp.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mp.c
@@ -1832,7 +1832,7 @@ struct dram_fsp_msg ddr_dram_fsp_msg_1gb_single_die[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_1gb_single_die = {
+static struct dram_timing_info dram_timing_1gb_single_die = {
 	.ddrc_cfg = ddr_ddrc_cfg_1gb_single_die,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_1gb_single_die),
 	.ddrphy_cfg = ddr_ddrphy_cfg_1gb_single_die,
@@ -2364,7 +2364,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg_4gb_dual_die[] = {
 };
 
 /* ddr timing config params */
-struct dram_timing_info dram_timing_4gb_dual_die = {
+static struct dram_timing_info dram_timing_4gb_dual_die = {
 	.ddrc_cfg = ddr_ddrc_cfg_4gb_dual_die,
 	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_4gb_dual_die),
 	.ddrphy_cfg = ddr_ddrphy_cfg_4gb_dual_die,
@@ -2377,3 +2377,22 @@ struct dram_timing_info dram_timing_4gb_dual_die = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 4000, 400, 100, },
 };
+
+struct dram_timing_info *spl_dram_init(const char *model, int sizemb)
+{
+	struct dram_timing_info *dram_timing;
+
+	switch (sizemb) {
+	case 1024:
+		dram_timing = &dram_timing_1gb_single_die;
+		break;
+	case 4096:
+		dram_timing = &dram_timing_4gb_dual_die;
+		break;
+	default:
+		printf("unsupported");
+		dram_timing = &dram_timing_4gb_dual_die;
+	}
+
+	return dram_timing;
+}
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index bcdc1a2a4685..275f9d3453ea 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -32,69 +32,6 @@
 
 #define PCIE_RSTN IMX_GPIO_NR(4, 6)
 
-static void spl_dram_init(int size)
-{
-	struct dram_timing_info *dram_timing;
-
-	switch (size) {
-#ifdef CONFIG_IMX8MM
-	case 512:
-		dram_timing = &dram_timing_512mb;
-		break;
-	case 1024:
-		dram_timing = &dram_timing_1gb;
-		break;
-	case 2048:
-		dram_timing = &dram_timing_2gb;
-		break;
-	case 4096:
-		dram_timing = &dram_timing_4gb;
-		break;
-	default:
-		printf("Unknown DDR configuration: %d MiB\n", size);
-		dram_timing = &dram_timing_1gb;
-		size = 1024;
-#elif CONFIG_IMX8MN
-	case 1024:
-		dram_timing = &dram_timing_1gb_single_die;
-		break;
-	case 2048:
-		if (!strcmp(eeprom_get_model(), "GW7902-SP466-A") ||
-		    !strcmp(eeprom_get_model(), "GW7902-SP466-B")) {
-			dram_timing = &dram_timing_2gb_dual_die;
-		} else {
-			dram_timing = &dram_timing_2gb_single_die;
-		}
-		break;
-	default:
-		printf("Unknown DDR configuration: %d MiB\n", size);
-		dram_timing = &dram_timing_2gb_dual_die;
-		size = 2048;
-#elif CONFIG_IMX8MP
-	case 1024:
-		dram_timing = &dram_timing_1gb_single_die;
-		break;
-	case 4096:
-		dram_timing = &dram_timing_4gb_dual_die;
-		break;
-	default:
-		printf("Unknown DDR configuration: %d GiB\n", size);
-		dram_timing = &dram_timing_4gb_dual_die;
-		size = 4096;
-#endif
-	}
-
-	printf("DRAM    : LPDDR4 ");
-	if (size > 512)
-		printf("%d GiB", size / 1024);
-	else
-		printf("%d MiB", size);
-	printf(" %dMT/s %dMHz\n",
-	       dram_timing->fsp_msg[0].drate,
-	       dram_timing->fsp_msg[0].drate / 2);
-	ddr_init(dram_timing);
-}
-
 /*
  * Model specific PMIC adjustments necessary prior to DRAM init
  *
@@ -118,9 +55,8 @@ static int dm_i2c_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 	return dm_i2c_write(dev, reg, &val, 1);
 }
 
-static int power_init_board(struct udevice *gsc)
+static int power_init_board(const char *model, struct udevice *gsc)
 {
-	const char *model = eeprom_get_model();
 	struct udevice *bus;
 	struct udevice *dev;
 	int ret;
@@ -251,9 +187,11 @@ static int power_init_board(struct udevice *gsc)
 
 void board_init_f(ulong dummy)
 {
+	struct dram_timing_info *dram_timing;
 	struct udevice *bus, *dev;
+	const char *model;
+	int dram_szmb;
 	int i, ret;
-	int dram_sz;
 
 	arch_cpu_init();
 
@@ -311,13 +249,23 @@ void board_init_f(ulong dummy)
 			break;
 		mdelay(1);
 	}
-	dram_sz = venice_eeprom_init(0);
+	dram_szmb = venice_eeprom_init(0);
+	model = eeprom_get_model();
 
 	/* PMIC */
-	power_init_board(dev);
+	power_init_board(model, dev);
 
 	/* DDR initialization */
-	spl_dram_init(dram_sz);
+	printf("DRAM    : LPDDR4 ");
+	if (dram_szmb > 512)
+		printf("%d GiB", dram_szmb / 1024);
+	else
+		printf("%d MiB", dram_szmb);
+	dram_timing = spl_dram_init(model, dram_szmb);
+	printf(" %dMT/s %dMHz\n",
+	       dram_timing->fsp_msg[0].drate,
+	       dram_timing->fsp_msg[0].drate / 2);
+	ddr_init(dram_timing);
 
 	board_init_r(NULL, 0);
 }
-- 
2.25.1

[PATCH 04/13] board: venice: fix dram bus config for GW7902/GW7903/GW7904

[Tim Harvey]

The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
of the DDRC and DDR PHY registers.

The 512MB configuration used this alternate bus layout. Change
the 512MB config to the standard bus configuration and add a generic
function to patch the DDRC/PHY configs for the alternate bus layout.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/lpddr4_timing_imx8mm.c | 46 +++++++++++++++++--
 1 file changed, 41 insertions(+), 5 deletions(-)

diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm.c b/board/gateworks/venice/lpddr4_timing_imx8mm.c
index 39e4e46490fd..956071c5125d 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mm.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mm.c
@@ -6,6 +6,7 @@
  */
 
 #include <linux/kernel.h>
+#include <string.h>
 #include <asm/arch/ddr.h>
 #include <asm/arch/lpddr4_define.h>
 
@@ -1333,7 +1334,7 @@ static struct dram_cfg_param ddr_ddrc_cfg_512mb[] = {
 	{ 0x3d400304, 0x1 },
 	{ 0x3d400030, 0x1 },
 	{ 0x3d400000, 0xa1080020 },
-	{ 0x3d400020, 0x203 },
+	{ 0x3d400020, 0x223 },
 	{ 0x3d400024, 0x3a980 },
 	{ 0x3d400064, 0x5b0062 },
 	{ 0x3d4000d0, 0xc00305ba },
@@ -1385,7 +1386,7 @@ static struct dram_cfg_param ddr_ddrc_cfg_512mb[] = {
 	{ 0x3d400498, 0x620096 },
 	{ 0x3d40049c, 0x1100e07 },
 	{ 0x3d4004a0, 0xc8012c },
-	{ 0x3d402020, 0x1 },
+	{ 0x3d402020, 0x21 },
 	{ 0x3d402024, 0x7d00 },
 	{ 0x3d402050, 0x20d040 },
 	{ 0x3d402064, 0xc000d },
@@ -1410,7 +1411,7 @@ static struct dram_cfg_param ddr_ddrc_cfg_512mb[] = {
 	{ 0x3d402194, 0x80303 },
 	{ 0x3d4021b4, 0x100 },
 	{ 0x3d4020f4, 0xc99 },
-	{ 0x3d403020, 0x1 },
+	{ 0x3d403020, 0x21 },
 	{ 0x3d403024, 0x1f40 },
 	{ 0x3d403050, 0x20d040 },
 	{ 0x3d403064, 0x30004 },
@@ -1459,9 +1460,9 @@ static struct dram_cfg_param ddr_ddrphy_cfg_512mb[] = {
 	{ 0x120a0, 0x0 },
 	{ 0x120a1, 0x1 },
 	{ 0x120a2, 0x3 },
-	{ 0x120a3, 0x4 },
+	{ 0x120a3, 0x2 },
 	{ 0x120a4, 0x5 },
-	{ 0x120a5, 0x2 },
+	{ 0x120a5, 0x4 },
 	{ 0x120a6, 0x7 },
 	{ 0x120a7, 0x6 },
 	{ 0x130a0, 0x0 },
@@ -3535,6 +3536,28 @@ static struct dram_timing_info dram_timing_2gb = {
 	.fsp_table = { 3000, 400, 100, },
 };
 
+static void apply_cfg_patch(struct dram_cfg_param *cfg, int cfg_sz,
+			    struct dram_cfg_param *patch, int patch_sz)
+{
+	int i, j;
+
+	for (i = 0; i < cfg_sz; i++)
+		for (j = 0; j < patch_sz; j++)
+			if (cfg[i].reg == patch[j].reg)
+				cfg[i].val = patch[j].val;
+}
+
+static struct dram_cfg_param ddr_ddrc_cfg_alt_patch[] = {
+	{ 0x3d400020, 0x203},
+	{ 0x3d402020, 0x1},
+	{ 0x3d403020, 0x1}
+};
+
+static struct dram_cfg_param ddr_ddrphy_cfg_alt_patch[] = {
+	{ 0x120a3, 0x4 },
+	{ 0x120a5, 0x2 },
+};
+
 struct dram_timing_info *spl_dram_init(const char *model, int sizemb)
 {
 	struct dram_timing_info *dram_timing;
@@ -3557,5 +3580,18 @@ struct dram_timing_info *spl_dram_init(const char *model, int sizemb)
 		dram_timing = &dram_timing_1gb;
 	}
 
+	/* apply ddrc/phy register changes for alternate dram bus layout */
+	if (!strncmp(model, "GW7902", 6) ||
+	    !strncmp(model, "GW7903", 6) ||
+	    !strncmp(model, "GW7904", 6)) {
+		apply_cfg_patch(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num,
+				ddr_ddrc_cfg_alt_patch,
+				ARRAY_SIZE(ddr_ddrc_cfg_alt_patch));
+
+		apply_cfg_patch(dram_timing->ddrphy_cfg, dram_timing->ddrphy_cfg_num,
+				ddr_ddrphy_cfg_alt_patch,
+				ARRAY_SIZE(ddr_ddrphy_cfg_alt_patch));
+	}
+
 	return dram_timing;
 }
-- 
2.25.1

[PATCH 05/13] board: venice: fix dram size for GW7901-SP486

[Tim Harvey]

The GW7901-SP486 with the exception of the -C revision has 2GB DRAM
loaded but incorrectly specifies 1GB in the EEPROM. Adjust the DRAM size
to account for this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/eeprom.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index afaabf348793..abe25256e668 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -350,6 +350,11 @@ int venice_eeprom_init(int quiet)
 	if (!quiet)
 		eeprom_info(false);
 
+	if (!strncmp(venice_model, "GW7901-SP486", 12) &&
+	    strcmp(venice_model, "GW7901-SP486-C")) {
+		return 2048;
+	}
+
 	return (16 << som_info.sdram_size);
 }
 
-- 
2.25.1

[PATCH 06/13] board: venice: use baseboard model for family

[Tim Harvey]

The venice family of baseboards which is normally GW7xxx
is being expanded to GW8xxx so we need to use the baseboard
number instead of the som.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/eeprom.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index abe25256e668..351d18886f14 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -322,7 +322,7 @@ int venice_eeprom_init(int quiet)
 	/* create model strings */
 	if (base_info.model[0]) {
 		sprintf(venice_model, "GW%c%c%c%c-%c%c-",
-			som_info.model[2], /* family */
+			base_info.model[2], /* family */
 			base_info.model[3], /* baseboard */
 			base_info.model[4], base_info.model[5], /* subload of baseboard */
 			som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
-- 
2.25.1

[PATCH 07/13] board: venice: use SOM model for PMIC adjustment on SOM

[Tim Harvey]

Use the SOM model to adjust PMIC settings on SOM's.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/eeprom.c | 7 +++++++
 board/gateworks/venice/eeprom.h | 1 +
 board/gateworks/venice/spl.c    | 6 ++----
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index 351d18886f14..41f620c90e72 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -19,6 +19,7 @@
 struct venice_board_info som_info;
 struct venice_board_info base_info;
 char venice_model[32];
+char venice_som_model[32];
 char venice_baseboard_model[32];
 u32 venice_serial;
 
@@ -315,6 +316,7 @@ int venice_eeprom_init(int quiet)
 		memset(&som_info, 0, sizeof(som_info));
 		return 0;
 	}
+	strlcpy(venice_som_model, som_info.model, sizeof(venice_som_model));
 
 	/* read optional baseboard EEPROM */
 	eeprom_read(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR, 2, &base_info);
@@ -368,6 +370,11 @@ const char *eeprom_get_model(void)
 	return venice_model;
 }
 
+const char *eeprom_get_som_model(void)
+{
+	return venice_som_model;
+}
+
 const char *eeprom_get_baseboard_model(void)
 {
 	return venice_baseboard_model;
diff --git a/board/gateworks/venice/eeprom.h b/board/gateworks/venice/eeprom.h
index bb7a5fa9ad1f..30cd347d9453 100644
--- a/board/gateworks/venice/eeprom.h
+++ b/board/gateworks/venice/eeprom.h
@@ -26,6 +26,7 @@ struct venice_board_info {
 
 int venice_eeprom_init(int quiet);
 const char *eeprom_get_model(void);
+const char *eeprom_get_som_model(void);
 const char *eeprom_get_baseboard_model(void);
 const char *eeprom_get_dtb_name(int level, char *buf, int len);
 int eeprom_getmac(int index, uint8_t *enetaddr);
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 275f9d3453ea..f14ab1497d70 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -57,6 +57,7 @@ static int dm_i2c_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 
 static int power_init_board(const char *model, struct udevice *gsc)
 {
+	const char *som = eeprom_get_som_model();
 	struct udevice *bus;
 	struct udevice *dev;
 	int ret;
@@ -77,10 +78,7 @@ static int power_init_board(const char *model, struct udevice *gsc)
 		}
 	}
 
-	if ((!strncmp(model, "GW71", 4)) ||
-	    (!strncmp(model, "GW72", 4)) ||
-	    (!strncmp(model, "GW73", 4)) ||
-	    (!strncmp(model, "GW75", 4))) {
+	if (!strncmp(som, "GW70", 4)) {
 		ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
 		if (ret) {
 			printf("PMIC    : failed I2C1 probe: %d\n", ret);
-- 
2.25.1

[PATCH 08/13] board: venice: flip logic for GSC supervisor enable

[Tim Harvey]

Flip the logic used to determine if a board has the proper hardware to
support enabling the GSC voltage supervisor so that we do not need to
keep adding new models to the list.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/spl.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index f14ab1497d70..e813f3e763ec 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -62,14 +62,16 @@ static int power_init_board(const char *model, struct udevice *gsc)
 	struct udevice *dev;
 	int ret;
 
-	/* Enable GSC voltage supervisor for new board models */
-	if ((!strncmp(model, "GW7100", 6) && model[10] > 'D') ||
-	    (!strncmp(model, "GW7101", 6) && model[10] > 'D') ||
-	    (!strncmp(model, "GW7200", 6) && model[10] > 'E') ||
-	    (!strncmp(model, "GW7201", 6) && model[10] > 'E') ||
-	    (!strncmp(model, "GW7300", 6) && model[10] > 'E') ||
-	    (!strncmp(model, "GW7301", 6) && model[10] > 'E') ||
-	    (!strncmp(model, "GW740", 5) && model[7] > 'B')) {
+	/* Enable GSC voltage supervisor only for newew board models */
+	if ((!strncmp(model, "GW7100", 6) && model[10] < 'E') ||
+	    (!strncmp(model, "GW7101", 6) && model[10] < 'E') ||
+	    (!strncmp(model, "GW7200", 6) && model[10] < 'F') ||
+	    (!strncmp(model, "GW7201", 6) && model[10] < 'F') ||
+	    (!strncmp(model, "GW7300", 6) && model[10] < 'F') ||
+	    (!strncmp(model, "GW7301", 6) && model[10] < 'F') ||
+	    (!strncmp(model, "GW740", 5) && model[7] < 'C')) {
+		printf("GSC     : voltage supervisor disabled\n");
+	} else {
 		u8 ver;
 
 		if (!dm_i2c_read(gsc, 14, &ver, 1) && ver > 62) {
-- 
2.25.1

[PATCH 09/13] board: venice: add imx8mp-gw82xx support

[Tim Harvey]

The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
baseboard featuring:
 - i.MX8M Plus SoC
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller (GSC)
 - microSD (1.8V/3.3V Capable)
 - panel status bi-color LED
 - pushbutton switch
 - fan controller with tachometer
 - USB Type-C connector
 - PCIe switch
 - 2x GbE RJ45 connectors
 - multi-protocol RS232/RS485/RS422 Serial ports
 - 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
   (for M.2 and miniPCIe expansion)
 - 2x isolated CAN
 - GPS
 - accelerometer
 - magnetometer
 - off-board connectors for: SPI, GPIO, I2C, ADC
 - Wide range DC power input
 - support for 802.3at PoE (via adapter)

Add support for it by providing its device-tree.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 .../dts/imx8mp-venice-gw82xx-2x-u-boot.dtsi   | 49 +++++++++++++++++++
 configs/imx8mp_venice_defconfig               |  2 +-
 2 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imx8mp-venice-gw82xx-2x-u-boot.dtsi

diff --git a/arch/arm/dts/imx8mp-venice-gw82xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw82xx-2x-u-boot.dtsi
new file mode 100644
index 000000000000..2d58b3b8ab71
--- /dev/null
+++ b/arch/arm/dts/imx8mp-venice-gw82xx-2x-u-boot.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 Gateworks Corporation
+ */
+#include "imx8mp-venice-gw702x-u-boot.dtsi"
+
+&gpio4 {
+	dio_1 {
+		gpio-hog;
+		input;
+		gpios = <8 GPIO_ACTIVE_HIGH>;
+		line-name = "dio1";
+	};
+
+	dio_0 {
+		gpio-hog;
+		input;
+		gpios = <11 GPIO_ACTIVE_HIGH>;
+		line-name = "dio0#";
+	};
+
+	usb1mux {
+		gpio-hog;
+		output-high;
+		gpios = <17 GPIO_ACTIVE_HIGH>;
+		line-name = "usb1_mux";
+	};
+
+	rs485_en {
+		gpio-hog;
+		output-low;
+		gpios = <22 GPIO_ACTIVE_HIGH>;
+		line-name = "rs485_en";
+	};
+
+	rs485_term {
+		gpio-hog;
+		output-low;
+		gpios = <23 GPIO_ACTIVE_HIGH>;
+		line-name = "rs485_term";
+	};
+
+	rs485_half {
+		gpio-hog;
+		output-low;
+		gpios = <27 GPIO_ACTIVE_HIGH>;
+		line-name = "rs485_hd";
+	};
+};
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 8f591f4c7dce..10eac0a0c785 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -88,7 +88,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="freescale/imx8mp-venice-gw71xx-2x freescale/imx8mp-venice-gw72xx-2x freescale/imx8mp-venice-gw73xx-2x freescale/imx8mp-venice-gw74xx freescale/imx8mp-venice-gw75xx-2x"
+CONFIG_OF_LIST="freescale/imx8mp-venice-gw71xx-2x freescale/imx8mp-venice-gw72xx-2x freescale/imx8mp-venice-gw73xx-2x freescale/imx8mp-venice-gw74xx freescale/imx8mp-venice-gw75xx-2x freescale/imx8mp-venice-gw82xx-2x"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_MMC_ENV_DEV=2
-- 
2.25.1

[PATCH 10/13] board: venice: add FSA support

[Tim Harvey]

The Gateworks Flexible Socket Adapters adapt common
busses such as SDIO/UART/USB/PCI to various connectors
such as M.2 B-Key, M.2 E-Key, M.2 M-Key, and MiniPCIe.

Each FSA has an EEPROM onboard describing its details as well as an
optional port-expander for configurable GPIO's.

Add support for identifying the FSA's and configuring their
details such as user description and GPIO's:
 - enable pca953x, pca954x and eeprom support for communicating
   with the I2C eeprom and gpio port expander on the FSA
 - add FSA detection support
 - add FSA gpio configuration support

Each FSA is identified in the device-tree by an alias to it's I2C
bus where an eeprom@54 node must exist as well as an gpio@20 node
for an io-expander. These nodes must be enabled so that
they can be probed to determine if they are actually present in
the system. If not present or not enabled the gpio expander can
not be used. This also requires livetree as the gpio expander
node if not present must be disabled.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/fsa.c           | 736 ++++++++++++++++++++++++++++++++
 board/gateworks/fsa.h           |  51 +++
 board/gateworks/venice/Makefile |   1 +
 board/gateworks/venice/eeprom.c |   3 +
 board/gateworks/venice/venice.c |   7 +
 configs/imx8mm_venice_defconfig |   5 +
 configs/imx8mn_venice_defconfig |   5 +
 configs/imx8mp_venice_defconfig |   5 +
 8 files changed, 813 insertions(+)
 create mode 100644 board/gateworks/fsa.c
 create mode 100644 board/gateworks/fsa.h

diff --git a/board/gateworks/fsa.c b/board/gateworks/fsa.c
new file mode 100644
index 000000000000..1af8021057c4
--- /dev/null
+++ b/board/gateworks/fsa.c
@@ -0,0 +1,736 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 Gateworks Corporation
+ */
+
+#include <command.h>
+#include <hexdump.h>
+#include <i2c.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h> // device_remove/device_unbind
+#include <asm-generic/gpio.h>
+#include <fdt_support.h>
+#include <linux/delay.h>
+
+#include "fsa.h"
+
+static int fsa;
+static struct udevice *fsa_gpiodevs[FSA_MAX] = { NULL };
+
+/* find the ofnode of the FSA i2c bus */
+static ofnode fsa_get_ofnode(int fsa)
+{
+	char str[32];
+
+	/* by alias */
+	snprintf(str, sizeof(str), "fsa%d", fsa);
+	return ofnode_get_aliases_node(str);
+}
+
+static int fsa_get_dtnode(void *fdt, int fsa)
+{
+	char str[32];
+
+	/* by alias */
+	snprintf(str, sizeof(str), "fsa%d", fsa);
+	return fdt_path_offset(fdt, fdt_get_alias(fdt, str));
+}
+
+static const char * const fsa_gpio_config_names[] = { "NC", "", "input", "output-low",
+						      "output-high" };
+
+static const char *fsa_gpio_config_name(struct fsa_gpio_desc *desc)
+{
+	if (desc->config < ARRAY_SIZE(fsa_gpio_config_names))
+		return fsa_gpio_config_names[desc->config];
+	return NULL;
+};
+
+static char *fsa_get_gpio_desc(struct fsa_gpio_desc *desc, char *str, int sz)
+{
+	str[0] = 0;
+	if (desc->source == 0xff) {
+		snprintf(str, sz, "fsa_gpio%d : %s %s",
+			 desc->offset + 1,
+			 desc->name,
+			 fsa_gpio_config_name(desc));
+	} else if (desc->config) {
+		snprintf(str, sz, "gpio@%02x_%02d: %s %s",
+			 desc->source,
+			 desc->offset,
+			 desc->name,
+			 fsa_gpio_config_name(desc));
+	}
+	return str;
+}
+
+static void fsa_show_gpio_descs(const char *prefix, int fsa, struct fsa_board_info *board_info,
+				struct fsa_user_info *user_info)
+{
+	char str[128];
+	int i;
+
+	/* display slot specific gpios */
+	for (i = 0; i < board_info->sockgpios; i++) {
+		fsa_get_gpio_desc(&user_info->gpios[i], str, sizeof(str));
+		printf("%s%-2d: %s\n", prefix, i, str);
+	}
+	/* display io-expander specific gpios */
+	if (fsa_gpiodevs[fsa]) {
+		for (i = board_info->sockgpios;
+		     i < (board_info->sockgpios + board_info->ioexpgpios);
+		     i++) {
+			fsa_get_gpio_desc(&user_info->gpios[i], str, sizeof(str));
+			printf("%s%-2d: %s\n", prefix, i, str);
+		}
+	}
+}
+
+/* detect gpio expander by address and deal with enabling/disabling/adding gpio expander to dt */
+static int fsa_get_gpiodev(int fsa, int addr, struct udevice **devp)
+{
+	struct udevice *bus, *dev;
+	char gpio_name[32];
+	int ret;
+
+	ret = device_get_global_by_ofnode(fsa_get_ofnode(fsa), &bus);
+	if (ret)
+		return ret;
+
+	sprintf(gpio_name, "gpio@%02x", addr);
+
+	/* probe device on i2c bus */
+	ret = dm_i2c_probe(bus, addr, 0, &dev);
+	switch (ret) {
+	case -EREMOTEIO: /* chip is not present on i2c bus */
+		/* if device is in dt remove/unbind/disable it */
+		ret = device_find_child_by_name(bus, gpio_name, &dev);
+		if (ret)
+			return ret;
+		ret = ofnode_set_enabled(dev_ofnode(dev), false);
+		if (ret)
+			return ret;
+		ret = device_unbind(dev);
+		if (ret)
+			return ret;
+		ret = device_remove(dev, DM_REMOVE_NORMAL);
+		if (ret)
+			return ret;
+		return ret;
+	case -ENOSYS: /* chip found but driver invalid */
+		/* if device is in not in dt add/bind it */
+		return ret;
+	case 0: /* chip responded and driver bound */
+		break;
+	}
+
+	if (devp)
+		*devp = dev;
+	return 0;
+}
+
+/* add gpio's to gpio device: GPIO device must be probed before you can manipulate it */
+static int fsa_config_gpios(int fsa, struct fsa_user_info *info, int gpios, struct udevice *dev)
+{
+	struct fsa_gpio_desc *desc;
+	struct gpio_desc gdesc;
+	struct udevice *gdev;
+	int i, ret, flags;
+	char name[32];
+
+	/* configure GPIO's */
+	for (i = 0; i < gpios; i++) {
+		desc = &info->gpios[i];
+		if (desc->config < FSA_GPIO_INPUT)
+			continue;
+		memset(&gdesc, 0, sizeof(gdesc));
+
+		if (desc->source == 0xff) {
+			/* Board specific IMX8M GPIO's: find dev of controller by line-name */
+			sprintf(name, "fsa%d_gpio%d", fsa, desc->offset + 1);
+			uclass_foreach_dev_probe(UCLASS_GPIO, gdev) {
+				ret = dev_read_stringlist_search(gdev, "gpio-line-names", name);
+				if (ret >= 0) {
+					gdesc.dev = gdev;
+					gdesc.offset = ret;
+					break;
+				}
+			}
+		} else {
+			/* port expander GPIOs */
+			gdesc.dev = dev;
+			gdesc.offset = desc->offset;
+		}
+
+		if (!gdesc.dev)
+			continue;
+
+		sprintf(name, "fsa%d_%s", fsa, desc->name);
+		switch (desc->config) {
+		case FSA_GPIO_INPUT:
+			flags = GPIOD_IS_IN;
+			break;
+		case FSA_GPIO_OUTPUT_LOW:
+			flags = GPIOD_IS_OUT;
+			break;
+		case FSA_GPIO_OUTPUT_HIGH:
+			flags = GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE;
+			break;
+		}
+		if (!dm_gpio_request(&gdesc, name))
+			dm_gpio_clrset_flags(&gdesc, GPIOD_MASK_DIR, flags);
+	}
+
+	return 0;
+}
+
+static int fsa_read_board_config(int fsa, struct fsa_board_info *info)
+{
+	struct udevice *dev;
+	int chksum;
+	int i, ret;
+	ofnode node;
+
+	/* find eeprom dev */
+	node = ofnode_find_subnode(fsa_get_ofnode(fsa), "eeprom@54");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+	ret = device_get_global_by_ofnode(node, &dev);
+	if (ret)
+		return ret;
+
+	/* read eeprom */
+	ret = dm_i2c_read(dev, 0, (uint8_t *)info, sizeof(*info));
+	if (ret) {
+		dev_err(dev, "read failed: %d\n", ret);
+		return ret;
+	}
+
+	/* validate checksum */
+	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
+		chksum += ((unsigned char *)info)[i];
+	if ((info->chksum[0] != ((chksum >> 8) & 0xff)) ||
+	    (info->chksum[1] != (chksum & 0xff))) {
+		dev_err(dev, "FSA%d EEPROM: Invalid User Config Checksum\n", fsa);
+		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, info, sizeof(*info));
+		memset(info, 0, sizeof(*info));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int fsa_read_user_config(int fsa, struct fsa_user_info *info)
+{
+	struct udevice *dev;
+	int chksum;
+	int i, ret;
+	ofnode node;
+
+	/* find eeprom dev */
+	node = ofnode_find_subnode(fsa_get_ofnode(fsa), "eeprom@55");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+	ret = device_get_global_by_ofnode(node, &dev);
+	if (ret)
+		return ret;
+
+	/* read eeprom */
+	ret = dm_i2c_read(dev, 0, (uint8_t *)info, sizeof(*info));
+	if (ret) {
+		dev_err(dev, "read failed: %d\n", ret);
+		return ret;
+	}
+
+	/* validate checksum */
+	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
+		chksum += ((unsigned char *)info)[i];
+	if ((info->chksum[0] != ((chksum >> 8) & 0xff)) ||
+	    (info->chksum[1] != (chksum & 0xff))) {
+		dev_err(dev, "FSA%d EEPROM: Invalid User Config Checksum\n", fsa);
+		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, info, sizeof(*info));
+		memset(info, 0, sizeof(*info));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int fsa_write_user_config(int fsa, struct fsa_user_info *info)
+{
+	struct udevice *bus, *dev;
+	int i, n, chunk, slave, base, ret;
+	ofnode node;
+	int chksum;
+
+	/* create checksum */
+	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
+		chksum += ((unsigned char *)info)[i];
+	info->chksum[0] = chksum >> 8;
+	info->chksum[1] = chksum & 0xff;
+
+	/* find eeprom dev */
+	node = ofnode_find_subnode(fsa_get_ofnode(fsa), "eeprom@55");
+	ret = device_get_global_by_ofnode(node, &dev);
+	if (ret)
+		return ret;
+	bus = dev->parent;
+	base = dev_read_addr(dev);
+
+	/* write in 16byte chunks (multi-byte writes fail larger than that) */
+	chunk = 16;
+	slave = -1;
+	for (i = 0; i < sizeof(*info); i += chunk) {
+		/* select device based on offset */
+		if ((base + (i / 256)) != slave) {
+			slave = base + (i / 256);
+			ret = i2c_get_chip(bus, slave, 1, &dev);
+			if (ret) {
+				dev_err(bus, "failed to get eeprom@0x%02x: %d\n", slave, ret);
+				return ret;
+			}
+		}
+		/* select byte count */
+		n = sizeof(*info) - i;
+		if (n > chunk)
+			n = chunk;
+		ret = dm_i2c_write(dev, i % 256, (uint8_t *)info + i, n);
+		if (ret) {
+			dev_err(dev, "write failed: %d\n", ret);
+			return ret;
+		}
+		mdelay(11);
+	}
+
+	return ret;
+}
+
+static int fsa_detect(int fsa, struct fsa_board_info *board_info, struct fsa_user_info *user_info,
+		      bool gpio)
+{
+	int ret;
+
+	ret = fsa_read_board_config(fsa, board_info);
+	if (ret)
+		return ret;
+	if (user_info) {
+		ret = fsa_read_user_config(fsa, user_info);
+		if (ret)
+			return ret;
+		/* detect port expander */
+		if (gpio && !fsa_get_gpiodev(fsa, 0x20, &fsa_gpiodevs[fsa]))
+			fsa_config_gpios(fsa, user_info,
+					 board_info->sockgpios + board_info->ioexpgpios,
+					 fsa_gpiodevs[fsa]);
+	}
+
+	return ret;
+}
+
+static int ft_fixup_stringlist_elem(void *fdt, int offset, const char *prop, int elem,
+				    const char *val)
+{
+	const char *list, *end;
+	char *new, *buf;
+	int length;
+	int sz = 0;
+	int i = 0;
+	int ret;
+
+	if (offset < 0 || elem < 0 || !val) {
+		printf("%s -EINVAL\n", __func__);
+		return -EINVAL;
+	}
+
+	list = fdt_getprop(fdt, offset, prop, &length);
+
+	/* no property or invalid params */
+	if (!list || length < 0) {
+		printf("%s failed - no property\n", __func__);
+		return -EINVAL;
+	}
+
+	/* create new buffer with enough space */
+	buf = calloc(1, length + strlen(val));
+	new = buf;
+
+	/* iterate over current stringlist and build new list into buf */
+	end = list + length;
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+		sz += length;
+		/* insert new value into buf */
+		if (elem == i) {
+			strcpy(new, val);
+			new += strlen(val) + 1;
+		} else {
+			strcpy(new, list);
+			new += length;
+		}
+		list += length;
+		i++;
+	}
+	length = new - buf;
+	ret = fdt_setprop(fdt, offset, prop, buf, length);
+	free(buf);
+	if (ret)
+		printf("%s failed %d\n", __func__, ret);
+
+	return ret;
+}
+
+static int ft_fixup_fsa_gpio_name(void *fdt, int offset, int fsa, int gpio, const char *name)
+{
+	const char *prop = "gpio-line-names";
+	char str[32];
+
+	sprintf(str, "fsa%d_%s", fsa, name);
+
+	if (!fdt_getprop(fdt, offset, prop, NULL)) {
+		char buf[16] = { 0 };
+
+		fdt_setprop(fdt, offset, prop, &buf, sizeof(buf));
+	}
+
+	return ft_fixup_stringlist_elem(fdt, offset, prop, gpio, str);
+}
+
+static void fsa_show_details(int fsa, struct fsa_board_info *board, struct fsa_user_info *user)
+{
+	printf("FSA%d: %s\n", fsa, board->model);
+	printf("description: %s\n", user->desc);
+	printf("overlay: %s\n", user->overlay);
+	fsa_show_gpio_descs("\t", fsa, board, user);
+}
+
+int fsa_init(void)
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+	int fsa, ret;
+
+	for (fsa = 1; fsa < FSA_MAX; fsa++) {
+		ret = fsa_detect(fsa, &board_info, &user_info, true);
+		if (!ret)
+			printf("FSA%d:  %s %s\n", fsa, board_info.model, user_info.desc);
+	}
+
+	return 0;
+}
+
+int fsa_show(void)
+{
+	struct fsa_board_info board_info;
+	int fsa, ret;
+
+	for (fsa = 1; fsa < FSA_MAX; fsa++) {
+		ret = fsa_detect(fsa, &board_info, NULL, false);
+		if (!ret) {
+			printf("FSA%d    : %s %d %02x-%02x-%02x%02x\n", fsa,
+			       board_info.model, board_info.serial,
+			       board_info.mfgdate[0], board_info.mfgdate[1],
+			       board_info.mfgdate[2], board_info.mfgdate[3]);
+		}
+	}
+	return 0;
+}
+
+/* fixup gpio line names for fsa gpios */
+int fsa_ft_fixup(void *fdt)
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+	int fsa, i, ret;
+	char path[128];
+	char str[32];
+	ofnode node;
+	int off;
+
+	/* iterate over FSA's and rename gpio's */
+	for (fsa = 1; fsa < FSA_MAX; fsa++) {
+		/* disable FSA ioexp node if disabled in controlling dt */
+		off = fdt_subnode_offset(fdt, fsa_get_dtnode(fdt, fsa), "gpio@20");
+		if (off >= 0) {
+			if (!fdt_get_path(fdt, off, path, sizeof(path))) {
+				node = ofnode_path(path);
+				if (ofnode_valid(node) && !ofnode_is_enabled(node))
+					fdt_setprop_string(fdt, off, "status", "disabled");
+			}
+		}
+
+		/* detect FSA eeprom */
+		if (fsa_detect(fsa, &board_info, &user_info, false))
+			continue;
+
+		/* configure GPIO's */
+		for (i = 0; i < board_info.sockgpios + board_info.ioexpgpios; i++) {
+			if (user_info.gpios[i].config < FSA_GPIO_INPUT)
+				continue;
+
+			if (user_info.gpios[i].source == 0xff) {
+				/* Board specific IMX8M GPIO's */
+				for (off = fdt_node_offset_by_prop_value(fdt, 0,
+									 "gpio-controller", NULL,
+									 0);
+				     off >= 0;
+				     off = fdt_node_offset_by_prop_value(fdt, off,
+									 "gpio-controller", NULL,
+									 0)
+				    ) {
+					sprintf(str, "fsa%d_gpio%d", fsa,
+						user_info.gpios[i].offset + 1);
+					ret = fdt_stringlist_search(fdt, off, "gpio-line-names",
+								    str);
+					if (ret >= 0) {
+						ft_fixup_fsa_gpio_name(fdt, off, fsa, ret,
+								       user_info.gpios[i].name);
+						break;
+					}
+				}
+			} else {
+				/* port expander GPIOs */
+				off = fdt_subnode_offset(fdt, fsa_get_dtnode(fdt, fsa), "gpio@20");
+				ft_fixup_fsa_gpio_name(fdt, off, fsa, user_info.gpios[i].offset,
+						       user_info.gpios[i].name);
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int do_fsa_dev(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+	int i;
+
+	if (argc < 2) {
+		/* list FSAs */
+		printf("detecting FSA Adapters:\n");
+		for (i = 1; i < FSA_MAX; i++) {
+			if (!fsa_read_board_config(i, &board_info) &&
+			    !fsa_read_user_config(i, &user_info))
+				printf("FSA%d    : %s %s\n", i, board_info.model, user_info.desc);
+		}
+	} else {
+		/* select FSA */
+		fsa = simple_strtoul(argv[1], NULL, 10);
+	}
+
+	if (fsa) {
+		/* read FSA */
+		if (!fsa_read_board_config(fsa, &board_info) &&
+		    !fsa_read_user_config(fsa, &user_info)) {
+			printf("selected:\n");
+			fsa_show_details(fsa, &board_info, &user_info);
+		} else {
+			printf("FSA%d not detected\n", fsa);
+			fsa = 0;
+		}
+	} else {
+		printf("no FSA currently selected\n");
+	}
+
+	return 0;
+}
+
+static int do_fsa_desc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+
+	/* strip off leading cmd arg */
+	argc--;
+	argv++;
+
+	if (!fsa) {
+		printf("No FSA selected\n");
+		return CMD_RET_USAGE;
+	}
+
+	if (fsa_read_board_config(fsa, &board_info) || fsa_read_user_config(fsa, &user_info)) {
+		printf("can't detect FSA%d\n", fsa);
+		return CMD_RET_USAGE;
+	}
+
+	/* set */
+	if (argc) {
+		strlcpy(user_info.desc, argv[0], sizeof(user_info.desc));
+		if (fsa_write_user_config(fsa, &user_info))
+			return CMD_RET_FAILURE;
+	}
+
+	/* show */
+	fsa_show_details(fsa, &board_info, &user_info);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_fsa_overlay(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+
+	/* strip off leading cmd arg */
+	argc--;
+	argv++;
+
+	if (!fsa) {
+		printf("No FSA selected\n");
+		return CMD_RET_USAGE;
+	}
+
+	if (fsa_read_board_config(fsa, &board_info) || fsa_read_user_config(fsa, &user_info)) {
+		printf("can't detect FSA%d\n", fsa);
+		return CMD_RET_USAGE;
+	}
+
+	/* set */
+	if (argc) {
+		strlcpy(user_info.overlay, argv[0], sizeof(user_info.overlay));
+		if (fsa_write_user_config(fsa, &user_info))
+			return CMD_RET_FAILURE;
+	}
+
+	/* show */
+	fsa_show_details(fsa, &board_info, &user_info);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_fsa_gpio(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct fsa_board_info board_info;
+	struct fsa_user_info user_info;
+	struct fsa_gpio_desc desc;
+	char str[64];
+	int i, j;
+
+	/* strip off leading cmd arg */
+	argc--;
+	argv++;
+
+	if (!fsa) {
+		printf("No FSA selected\n");
+		return CMD_RET_USAGE;
+	}
+
+	if (fsa_read_board_config(fsa, &board_info) || fsa_read_user_config(fsa, &user_info)) {
+		printf("can't detect FSA%d\n", fsa);
+		return CMD_RET_USAGE;
+	}
+
+	if (!argc) {
+		/* show all gpios */
+		fsa_show_gpio_descs("\t", fsa, &board_info, &user_info);
+		return CMD_RET_SUCCESS;
+	}
+
+	if (!isdigit(argv[0][0])) {
+		printf("invalid gpio offset: %s\n", argv[0]);
+		return CMD_RET_USAGE;
+	}
+
+	memset(&desc, 0, sizeof(desc));
+	i = simple_strtoul(argv[0], NULL, 10);
+
+	if (i >= 0 && i < board_info.sockgpios) {
+		desc.offset = i;
+		desc.source = 0xff;
+	} else if (i >= board_info.sockgpios &&
+		 i < (board_info.sockgpios + board_info.ioexpgpios) &&
+		 fsa_gpiodevs[fsa]) {
+		desc.offset = i - board_info.sockgpios;
+		desc.source = 0x20;
+	} else {
+		printf("invalid index %d", i);
+		return CMD_RET_FAILURE;
+	}
+
+	if (argc > 1) {
+		if (user_info.gpios[i].config == FSA_GPIO_NC) {
+			printf("can not alter NC gpio\n");
+			return CMD_RET_FAILURE;
+		}
+		strlcpy(desc.name, argv[1], sizeof(desc.name));
+		if (!*desc.name) {
+			printf("FSA%d %s erasing gpio %d\n", fsa, board_info.model, i);
+			memset(&user_info.gpios[i], 0, sizeof(desc));
+			if (fsa_write_user_config(fsa, &user_info))
+				return CMD_RET_FAILURE;
+			return CMD_RET_SUCCESS;
+		}
+	}
+	if (argc > 2) {
+		if (user_info.gpios[i].config == FSA_GPIO_NC) {
+			printf("can not alter NC gpio\n");
+			return CMD_RET_FAILURE;
+		}
+		for (j = 1; j < ARRAY_SIZE(fsa_gpio_config_names); j++) {
+			if (!strcasecmp(argv[2], fsa_gpio_config_names[j])) {
+				desc.config = j;
+				break;
+			}
+		};
+		if (j >= ARRAY_SIZE(fsa_gpio_config_names)) {
+			printf("invalid config type '%s\n", argv[2]);
+			return CMD_RET_FAILURE;
+		}
+	}
+
+	/* show a specific gpio */
+	if (argc == 1) {
+		printf("FSA%d %s showing gpio %d\n", fsa, board_info.model, i);
+		printf("%s\n", fsa_get_gpio_desc(&user_info.gpios[i], str, sizeof(str)));
+		return CMD_RET_SUCCESS;
+	}
+
+	/* set a specific gpio */
+	else if (argc == 3) {
+		printf("FSA%d %s updating gpio %d\n", fsa, board_info.model, i);
+		memcpy(&user_info.gpios[i], &desc, sizeof(desc));
+		if (fsa_write_user_config(fsa, &user_info))
+			return CMD_RET_FAILURE;
+		return CMD_RET_SUCCESS;
+	}
+
+	return CMD_RET_USAGE;
+}
+
+static struct cmd_tbl cmd_fsa_sub[] = {
+	U_BOOT_CMD_MKENT(dev, 1, 1, do_fsa_dev, "", ""),
+	U_BOOT_CMD_MKENT(gpio, 4, 1, do_fsa_gpio, "", ""),
+	U_BOOT_CMD_MKENT(description, 1, 1, do_fsa_desc, "", ""),
+	U_BOOT_CMD_MKENT(overlay, 1, 1, do_fsa_overlay, "", ""),
+};
+
+static int do_fsa(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct cmd_tbl *c;
+
+	/* strip off leading fsa arg */
+	argc--;
+	argv++;
+
+	c = find_cmd_tbl(argv[0], cmd_fsa_sub, ARRAY_SIZE(cmd_fsa_sub));
+	if (c)
+		return c->cmd(cmdtp, flag, argc, argv);
+	return CMD_RET_USAGE;
+}
+
+U_BOOT_LONGHELP(fsa,
+		"dev [dev] - show or set current FSA adapter\n"
+		"fsa gpio - show current gpio descriptors\n"
+		"fsa gpio [<offset>]|[<offset> <source>] - show a specific gpio descriptor\n"
+		"fsa gpio [<offset> <name> <input|output-low|output-high> [source]] - set a gpio descriptor\n"
+		"fsa description [description] - show or set the FSA user description string\n"
+		"fsa overlay [overlay] - show or set the FSA overlay string\n"
+);
+
+U_BOOT_CMD(fsa, 6, 1, do_fsa,
+	   "Flexible Socket Adapter",
+	   fsa_help_text
+);
diff --git a/board/gateworks/fsa.h b/board/gateworks/fsa.h
new file mode 100644
index 000000000000..ddb64499d780
--- /dev/null
+++ b/board/gateworks/fsa.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2025 Gateworks Corporation
+ */
+
+#ifndef _FSA_H_
+#define _FSA_H_
+
+#define FSA_MAX	5
+
+enum fsa_gpio_cfg {
+	FSA_GPIO_NC,
+	FSA_GPIO_UNCONFIGURED,
+	FSA_GPIO_INPUT,
+	FSA_GPIO_OUTPUT_LOW,
+	FSA_GPIO_OUTPUT_HIGH,
+};
+
+struct fsa_gpio_desc {
+	u8 offset;
+	u8 config;
+	u8 source;
+	char name[13];
+};
+
+struct fsa_board_info {
+	char model[16];			/* 0x00: model string */
+	u8 mac[6];			/* 0x10: MAC base */
+	u8 macno;			/* 0x16: number of mac addrs */
+	u8 resv1;			/* 0x17: reserved */
+	u32 serial;			/* 0x18: Serial Number */
+	u8 mfgdate[4];			/* 0x1c: MFG date */
+	u8 sockgpios;			/* 0x20: number of socket gpio descriptors */
+	u8 ioexpgpios;			/* 0x21: number of io expander gpio descriptors */
+	u8 resv2[220];			/* 0x22: reserved */
+	u8 chksum[2];			/* 0xfe: */
+};
+
+struct fsa_user_info {
+	char desc[32];			/* 0x000: user description */
+	char overlay[16];		/* 0x020: dt-overlay suffice */
+	struct fsa_gpio_desc gpios[20];	/* 0x030: gpio descriptors */
+	u8 reserved[398];		/* 0x170: reserved */
+	u8 chksum[2];			/* 0x2fe: */
+};
+
+int fsa_init(void);
+int fsa_show(void);
+int fsa_ft_fixup(void *fdt);
+
+#endif // _FSA_H_
diff --git a/board/gateworks/venice/Makefile b/board/gateworks/venice/Makefile
index ab69e07ba7bb..1aaf0295d5c9 100644
--- a/board/gateworks/venice/Makefile
+++ b/board/gateworks/venice/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-y += venice.o eeprom.o
+obj-y += ../fsa.o
 
 ifdef CONFIG_XPL_BUILD
 obj-y += spl.o
diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index 41f620c90e72..49b1ad34b148 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -9,6 +9,7 @@
 #include <dm/uclass.h>
 
 #include "eeprom.h"
+#include "../fsa.h"
 
 /* I2C */
 #define SOM_EEPROM_BUSNO		0
@@ -300,6 +301,8 @@ static int eeprom_info(bool verbose)
 		       base_info.mfgdate[0], base_info.mfgdate[1],
 		       base_info.mfgdate[2], base_info.mfgdate[3]);
 	}
+	if (verbose)
+		fsa_show();
 
 	return 0;
 }
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index 98b33624f041..9491cbd3ac22 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -14,6 +14,7 @@
 #include <asm/mach-imx/boot_mode.h>
 
 #include "eeprom.h"
+#include "../fsa.h"
 
 int board_phys_sdram_size(phys_size_t *size)
 {
@@ -75,6 +76,9 @@ int board_init(void)
 {
 	venice_eeprom_init(1);
 
+	/* detect and configure FSA adapters */
+	fsa_init();
+
 	return 0;
 }
 
@@ -221,6 +225,9 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
 	/* set board model dt prop */
 	fdt_setprop_string(fdt, 0, "board", eeprom_get_model());
 
+	/* fixups for FSA adapters */
+	fsa_ft_fixup(fdt);
+
 	if (!strncmp(base_model, "GW73", 4)) {
 		pcbrev = get_pcb_rev(base_model);
 		path = fdt_get_alias(fdt, "ethernet1");
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 0f263a3ecb80..cc7dfcb1400e 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -86,6 +86,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_LIST="freescale/imx8mm-venice-gw71xx-0x freescale/imx8mm-venice-gw72xx-0x freescale/imx8mm-venice-gw73xx-0x freescale/imx8mm-venice-gw7901 freescale/imx8mm-venice-gw7902 freescale/imx8mm-venice-gw7903 freescale/imx8mm-venice-gw7904 freescale/imx8mm-venice-gw75xx-0x"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -106,10 +107,14 @@ CONFIG_CLK_IMX8MM=y
 CONFIG_GPIO_HOG=y
 CONFIG_DM_GPIO_LOOKUP_LABEL=y
 CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_I2C_EEPROM=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_SPL_MMC_IO_VOLTAGE=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 4fc8e146b06d..a7a838b61bb1 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -86,6 +86,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_MMC_ENV_DEV=2
@@ -103,10 +104,14 @@ CONFIG_CLK_IMX8MN=y
 CONFIG_GPIO_HOG=y
 CONFIG_DM_GPIO_LOOKUP_LABEL=y
 CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_I2C_EEPROM=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_SPL_MMC_IO_VOLTAGE=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 10eac0a0c785..2e4cacf166d8 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -88,6 +88,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_LIST="freescale/imx8mp-venice-gw71xx-2x freescale/imx8mp-venice-gw72xx-2x freescale/imx8mp-venice-gw73xx-2x freescale/imx8mp-venice-gw74xx freescale/imx8mp-venice-gw75xx-2x freescale/imx8mp-venice-gw82xx-2x"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -104,10 +105,14 @@ CONFIG_CLK_IMX8MP=y
 CONFIG_GPIO_HOG=y
 CONFIG_DM_GPIO_LOOKUP_LABEL=y
 CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
+CONFIG_I2C_EEPROM=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
-- 
2.25.1

[PATCH 11/13] board: venice: update model representation for venice-flex

[Tim Harvey]

Update the model string representation for the Venice-Flex product
family (GW8xxx).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/eeprom.c | 104 +++++++++++++++++++++++++++++++-
 1 file changed, 102 insertions(+), 2 deletions(-)

diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index 49b1ad34b148..702ab392a047 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -6,6 +6,7 @@
 #include <gsc.h>
 #include <hexdump.h>
 #include <i2c.h>
+#include <dm/device.h>
 #include <dm/uclass.h>
 
 #include "eeprom.h"
@@ -19,7 +20,7 @@
 
 struct venice_board_info som_info;
 struct venice_board_info base_info;
-char venice_model[32];
+char venice_model[64];
 char venice_som_model[32];
 char venice_baseboard_model[32];
 u32 venice_serial;
@@ -109,7 +110,7 @@ static int eeprom_read(int busno, int slave, int alen, struct venice_board_info
 	/* validate checksum */
 	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
 		chksum += buf[i];
-	if ((info->chksum[0] != chksum >> 8) ||
+	if ((info->chksum[0] != ((chksum >> 8) & 0xff)) ||
 	    (info->chksum[1] != (chksum & 0xff))) {
 		printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", busno, slave);
 		print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
@@ -128,6 +129,54 @@ static int eeprom_read(int busno, int slave, int alen, struct venice_board_info
 	return 0;
 }
 
+static int fsa_eeprom_read(const char *base, int fsa, struct fsa_board_info *info)
+{
+	int i;
+	int chksum;
+	unsigned char *buf = (unsigned char *)info;
+	struct udevice *dev, *bus;
+	int ret;
+	u8 reg;
+
+	/* probe mux */
+	ret = uclass_get_device_by_seq(UCLASS_I2C, 2, &bus);
+	if (!ret)
+		ret = dm_i2c_probe(bus, 0x70, 0, &dev);
+	if (ret)
+		return ret;
+	/* steer mux */
+	if (!strncmp(base, "GW82", 4)) {
+		if (fsa < 3)
+			reg = (fsa == 1) ? BIT(1) : BIT(0);
+		else
+			return -EINVAL;
+	}
+	dm_i2c_write(dev, 0x00, &reg, 1);
+
+	/* get eeprom */
+	ret = dm_i2c_probe(bus, 0x54, 0, &dev);
+	if (ret)
+		return ret;
+
+	/* read eeprom config section */
+	ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
+	if (ret)
+		return ret;
+
+	/* validate checksum */
+	for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
+		chksum += buf[i];
+	if ((info->chksum[0] != ((chksum >> 8) & 0xff)) ||
+	    (info->chksum[1] != (chksum & 0xff))) {
+		printf("FSA%d EEPROM (board): %s: Invalid Checksum\n", fsa, dev->name);
+		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, sizeof(*info));
+		memset(info, 0, sizeof(*info));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 /* determine BOM revision from model */
 int get_bom_rev(const char *str)
 {
@@ -352,6 +401,57 @@ int venice_eeprom_init(int quiet)
 	}
 	venice_serial = som_info.serial;
 
+	/* GW8xxx product family naming scheme */
+	if (venice_model[2] == '8') {
+		struct fsa_board_info fsa_info;
+		int i = 0;
+		int fsa;
+
+		/* baseboard */
+		if (base_info.model[0]) {
+			rev_pcb = get_pcb_rev(base_info.model);
+			rev_bom = get_bom_rev(base_info.model);
+			venice_model[i++] = 'G';
+			venice_model[i++] = 'W';
+			venice_model[i++] = base_info.model[2]; /* baseboard */
+			venice_model[i++] = base_info.model[3];
+			venice_model[i++] = base_info.model[4]; /* subload */
+			venice_model[i++] = base_info.model[5];
+			venice_model[i++] = rev_pcb;
+			if (rev_bom)
+				venice_model[i++] = rev_bom;
+			venice_model[i++] = '-';
+			venice_model[i++] = 'S';
+		} else {
+			venice_model[i++] = 'G';
+			venice_model[i++] = 'W';
+		}
+
+		/* som */
+		rev_pcb = get_pcb_rev(som_info.model);
+		rev_bom = get_bom_rev(som_info.model);
+		venice_model[i++] = som_info.model[4];
+		venice_model[i++] = som_info.model[5];
+		venice_model[i++] = rev_pcb;
+		if (rev_bom)
+			venice_model[i++] = rev_bom;
+
+		/* fsa */
+		for (fsa = 1; fsa < FSA_MAX; fsa++) {
+			if (!fsa_eeprom_read(venice_model, fsa, &fsa_info)) {
+				venice_model[i++] = '-';
+				venice_model[i++] = 'F';
+				venice_model[i++] = '0' + fsa;
+				venice_model[i++] = fsa_info.model[5];
+				venice_model[i++] = fsa_info.model[6];
+				venice_model[i++] = fsa_info.model[8];
+				if (fsa_info.model[9])
+					venice_model[i++] = fsa_info.model[9];
+			}
+		}
+		venice_model[i++] = 0;
+	}
+
 	if (!quiet)
 		eeprom_info(false);
 
-- 
2.25.1

[PATCH 12/13] board: venice: append configuration string to model

[Tim Harvey]

Append the optional board configuration string to the model info.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/venice/eeprom.c | 9 +++++++++
 board/gateworks/venice/eeprom.h | 2 +-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index 702ab392a047..d9a871934340 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -449,6 +449,15 @@ int venice_eeprom_init(int quiet)
 					venice_model[i++] = fsa_info.model[9];
 			}
 		}
+
+		/* append extra model info */
+		if (som_info.config[0] >= 32 && som_info.config[0] < 0x7f) {
+			venice_model[i++] = '-';
+			strlcpy(venice_model + i, som_info.config, (sizeof(venice_model) - i) - 1);
+			i += strlen(som_info.config);
+			if (i >= sizeof(venice_model))
+				i = sizeof(venice_model) - 1;
+		}
 		venice_model[i++] = 0;
 	}
 
diff --git a/board/gateworks/venice/eeprom.h b/board/gateworks/venice/eeprom.h
index 30cd347d9453..a0f449299aa3 100644
--- a/board/gateworks/venice/eeprom.h
+++ b/board/gateworks/venice/eeprom.h
@@ -20,7 +20,7 @@ struct venice_board_info {
 	u8 sdram_width;	/* 0x2D: (8 << n) bit */
 	u8 res3[2];	/* 0x2E */
 	char model[16];		/* 0x30: model string */
-	u8 res4[14];	/* 0x40 */
+	u8 config[14];	/* 0x40: model config */
 	u8 chksum[2];	/* 0x4E */
 };
 
-- 
2.25.1

[PATCH 13/13] imx8mp-venice-gw74xx: add w_disable2 gpio configuration

[Tim Harvey]

The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.

Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi
index a90794d8108a..95f5f15e742a 100644
--- a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi
@@ -98,6 +98,13 @@
 		gpios = <6 GPIO_ACTIVE_HIGH>;
 		line-name = "m2_rst";
 	};
+
+	m2_wdis2 {
+		gpio-hog;
+		output-high;
+		gpios = <14 GPIO_ACTIVE_HIGH>;
+		line-name = "m2_wdis2#";
+	};
 };
 
 &gpio4 {
@@ -110,11 +117,11 @@
 		line-name = "m2_off#";
 	};
 
-	m2_wdis {
+	m2_wdis1 {
 		gpio-hog;
 		output-high;
 		gpios = <18 GPIO_ACTIVE_HIGH>;
-		line-name = "m2_wdis#";
+		line-name = "m2_wdis1#";
 	};
 
 	rs485_en {
-- 
2.25.1

Re: [PATCH 13/13] imx8mp-venice-gw74xx: add w_disable2 gpio configuration

[Peng Fan]

On Fri, May 23, 2025 at 10:20:18AM -0700, Tim Harvey wrote:
>The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
>W_DISABLE2# pin of the M.2 socket.
>
>Add the iomux and a line name for this and rename the existing
>m2_wdis# signal to m2_wdis1#.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 12/13] board: venice: append configuration string to model

[Peng Fan]

On Fri, May 23, 2025 at 10:20:17AM -0700, Tim Harvey wrote:
>Append the optional board configuration string to the model info.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 11/13] board: venice: update model representation for venice-flex

[Peng Fan]

On Fri, May 23, 2025 at 10:20:16AM -0700, Tim Harvey wrote:
>Update the model string representation for the Venice-Flex product
>family (GW8xxx).
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 10/13] board: venice: add FSA support

[Peng Fan]

On Fri, May 23, 2025 at 10:20:15AM -0700, Tim Harvey wrote:
>The Gateworks Flexible Socket Adapters adapt common
>busses such as SDIO/UART/USB/PCI to various connectors
>such as M.2 B-Key, M.2 E-Key, M.2 M-Key, and MiniPCIe.
>
>Each FSA has an EEPROM onboard describing its details as well as an
>optional port-expander for configurable GPIO's.
>
>Add support for identifying the FSA's and configuring their
>details such as user description and GPIO's:
> - enable pca953x, pca954x and eeprom support for communicating
>   with the I2C eeprom and gpio port expander on the FSA
> - add FSA detection support
> - add FSA gpio configuration support
>
>Each FSA is identified in the device-tree by an alias to it's I2C
>bus where an eeprom@54 node must exist as well as an gpio@20 node
>for an io-expander. These nodes must be enabled so that
>they can be probed to determine if they are actually present in
>the system. If not present or not enabled the gpio expander can
>not be used. This also requires livetree as the gpio expander
>node if not present must be disabled.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 09/13] board: venice: add imx8mp-gw82xx support

[Peng Fan]

On Fri, May 23, 2025 at 10:20:14AM -0700, Tim Harvey wrote:
>The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
>comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
>baseboard featuring:
> - i.MX8M Plus SoC
> - LPDDR4 DRAM
> - eMMC FLASH
> - Gateworks System Controller (GSC)
> - microSD (1.8V/3.3V Capable)
> - panel status bi-color LED
> - pushbutton switch
> - fan controller with tachometer
> - USB Type-C connector
> - PCIe switch
> - 2x GbE RJ45 connectors
> - multi-protocol RS232/RS485/RS422 Serial ports
> - 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
>   (for M.2 and miniPCIe expansion)
> - 2x isolated CAN
> - GPS
> - accelerometer
> - magnetometer
> - off-board connectors for: SPI, GPIO, I2C, ADC
> - Wide range DC power input
> - support for 802.3at PoE (via adapter)
>
>Add support for it by providing its device-tree.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 08/13] board: venice: flip logic for GSC supervisor enable

[Peng Fan]

On Fri, May 23, 2025 at 10:20:13AM -0700, Tim Harvey wrote:
>Flip the logic used to determine if a board has the proper hardware to
>support enabling the GSC voltage supervisor so that we do not need to
>keep adding new models to the list.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 07/13] board: venice: use SOM model for PMIC adjustment on SOM

[Peng Fan]

On Fri, May 23, 2025 at 10:20:12AM -0700, Tim Harvey wrote:
>Use the SOM model to adjust PMIC settings on SOM's.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 06/13] board: venice: use baseboard model for family

[Peng Fan]

On Fri, May 23, 2025 at 10:20:11AM -0700, Tim Harvey wrote:
>The venice family of baseboards which is normally GW7xxx
>is being expanded to GW8xxx so we need to use the baseboard
>number instead of the som.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 05/13] board: venice: fix dram size for GW7901-SP486

[Peng Fan]

On Fri, May 23, 2025 at 10:20:10AM -0700, Tim Harvey wrote:
>The GW7901-SP486 with the exception of the -C revision has 2GB DRAM
>loaded but incorrectly specifies 1GB in the EEPROM. Adjust the DRAM size
>to account for this.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 04/13] board: venice: fix dram bus config for GW7902/GW7903/GW7904

[Peng Fan]

On Fri, May 23, 2025 at 10:20:09AM -0700, Tim Harvey wrote:
>The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
>of the DDRC and DDR PHY registers.
>
>The 512MB configuration used this alternate bus layout. Change
>the 512MB config to the standard bus configuration and add a generic
>function to patch the DDRC/PHY configs for the alternate bus layout.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 03/13] board: venice: move soc-specific dram config into soc-specific files

[Peng Fan]

On Fri, May 23, 2025 at 10:20:08AM -0700, Tim Harvey wrote:
>Move the determination of the dram timings into the soc-specific files.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 02/13] configs: imx8m*_venice: enable GPT support

[Peng Fan]

On Fri, May 23, 2025 at 10:20:07AM -0700, Tim Harvey wrote:
>Enable support for working with General Partition Tables via the 'gpt'
>command. Also enable support for generating random UUID's for GPT.
>
>See: doc/README.gpt for examples
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 01/13] configs: imx8m*_venice: enable several commands useful for scripting

[Peng Fan]

On Fri, May 23, 2025 at 10:20:06AM -0700, Tim Harvey wrote:
>enable cat, xxd, and the ability for setexpr to return values in
>variables which are all useful for scripting.
>
>Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 01/13] configs: imx8m*_venice: enable several commands useful for scripting

[Fabio Estevam]

On Fri, May 23, 2025 at 2:20 PM Tim Harvey <tharvey@gateworks.com> wrote:
>
> enable cat, xxd, and the ability for setexpr to return values in
> variables which are all useful for scripting.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Applied the series to u-boot-imx/next, thanks.