[PATCH 2/2] target/riscv: disarm timer when writing past value

["Radim Krčmář" <rkrcmar@ventanamicro.com>]

There is no need to keep the timer running when writing a past value to
the *stimecmp.  The behavior was correct before, but I think it makes a
bit more sense like this.

Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
 target/riscv/time_helper.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/riscv/time_helper.c b/target/riscv/time_helper.c
index 8198a2d8d92d..81a6a6394502 100644
--- a/target/riscv/time_helper.c
+++ b/target/riscv/time_helper.c
@@ -64,6 +64,8 @@ void riscv_timer_write_timecmp(CPURISCVState *env, QEMUTimer *timer,
          * If we're setting an stimecmp value in the "past",
          * immediately raise the timer interrupt
          */
+        timer_del(timer);
+
         if (timer_irq == MIP_VSTIP) {
             env->vstime_irq = 1;
             riscv_cpu_update_mip(env, 0, BOOL_TO_MASK(1));
-- 
2.49.0