Re: [PATCH v17 22/22] sfc: support pio mapping based on cxl

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Tue, 24 Jun 2025 15:13:55 +0100
alejandro.lucero-palau@amd.com wrote:

> From: Alejandro Lucero <alucerop@amd.com>
> 
> A PIO buffer is a region of device memory to which the driver can write a
> packet for TX, with the device handling the transmit doorbell without
> requiring a DMA for getting the packet data, which helps reducing latency
> in certain exchanges. With CXL mem protocol this latency can be lowered
> further.
> 
> With a device supporting CXL and successfully initialised, use the cxl
> region to map the memory range and use this mapping for PIO buffers.
> 
> Add the disabling of those CXL-based PIO buffers if the callback for
> potential cxl endpoint removal by the CXL code happens.
> 
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
There is quite a bit of ifdef magic in here.  If there is any way
to push that to stubs in headers, it would probably improved code
readability.


I was expecting to at somepoint see handling of the CXL code being
called returning EPROBE_DEFER but that's not here so I don't
understand exactly how that is supposed to work if the CXL infrastructure
hasn't arrived at time of first probe.

Otherwise, main overall concern is that lifetimes are (I think) more
complex than they need to be.  I suggest a solution in an earlier patch (and
in reply to previous version)  Devres groups are really handy for wrapping
up a bunch of devm calls with the option to unwind them all on error or at
a specific point in the remove() path for a driver.  That should resolve
most of my concerns as you'll have something closely approximating a non devm flow.

Jonathan