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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Alejandro Lucero Palau <alucerop@amd.com>
Cc: <alejandro.lucero-palau@amd.com>, <linux-cxl@vger.kernel.org>,
	<netdev@vger.kernel.org>, <dan.j.williams@intel.com>,
	<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
	<pabeni@redhat.com>, <edumazet@google.com>,
	<dave.jiang@intel.com>, "Edward Cree" <ecree.xilinx@gmail.com>,
	Alison Schofield <alison.schofield@intel.com>
Subject: Re: [PATCH v17 02/22] sfc: add cxl support
Date: Mon, 30 Jun 2025 17:07:13 +0100	[thread overview]
Message-ID: <20250630170713.00001f72@huawei.com> (raw)
In-Reply-To: <f56886cd-ca42-459a-87d7-eb3f472e88b4@amd.com>

On Mon, 30 Jun 2025 15:55:39 +0100
Alejandro Lucero Palau <alucerop@amd.com> wrote:

> On 6/30/25 15:52, Alejandro Lucero Palau wrote:
> >
> > On 6/25/25 17:37, Jonathan Cameron wrote:  
> >> On Tue, 24 Jun 2025 15:13:35 +0100
> >> <alejandro.lucero-palau@amd.com> wrote:
> >>  
> >>> From: Alejandro Lucero <alucerop@amd.com>
> >>>
> >>> Add CXL initialization based on new CXL API for accel drivers and make
> >>> it dependent on kernel CXL configuration.
> >>>
> >>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> >>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >>> Acked-by: Edward Cree <ecree.xilinx@gmail.com>
> >>> Reviewed-by: Alison Schofield <alison.schofield@intel.com>  
> >> Hi Alejandro,
> >>
> >> I think I'm missing something with respect to the relative life times.
> >> Throwing one devm_ call into the middle of a probe is normally a recipe
> >> for at least hard to read code, if not actual bugs.  It should be done
> >> with care and accompanied by at least a comment.  
> >
> >
> > Hi Jonathan,
> >
> >
> > I agree devm_* being harder in general and prone to some subtle 
> > problems, but I can not see an issue here apart from the objects kept 
> > until device unbinding. But I think adding some comment can help.
> >
> >
> > <snip>
> >  
> >> +
> >> +    dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
> >> +                      CXL_DVSEC_PCIE_DEVICE);
> >> +    if (!dvsec)
> >> +        return 0;
> >> +
> >> +    pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
> >> +
> >> +    /* Create a cxl_dev_state embedded in the cxl struct using cxl 
> >> core api
> >> +     * specifying no mbox available.
> >> +     */
> >> +    cxl = devm_cxl_dev_state_create(&pci_dev->dev, CXL_DEVTYPE_DEVMEM,
> >> +                    pci_dev->dev.id, dvsec, struct efx_cxl,
> >> +                    cxlds, false);
> >> The life time of this will outlast everything else in the efx driver.
> >> Is that definitely safe to do?  Mostly from a reviewability and 
> >> difficulty
> >> of reasoning we avoid such late releasing of resources.
> >>
> >> Perhaps add to the comment before this call what you are doing to 
> >> ensure that
> >> it is fine to release this after everything in efx_pci_remove()
> >>
> >> Or wrap it up in a devres group and release that group in 
> >> efx_cxl_exit().
> >>
> >> See devres_open_group(), devres_release_group()
> >>
> >>  
> >
> > As I said above, I can not see a problem here, but maybe to explicitly 
> > managed those resources with a devres group makes it simpler, so I 
> > think it is a good advice to follow.
> >
> >
> > Thanks!
> >
> >  
> 
> FWIW, I just want to add that although I agree with this, it is somehow 
> counterintuitive to me as the goal of devm is to avoid to care about 
> when to release those allocations.

In my view not quite.  It's to enforce that those allocations are released
in the reverse order of the devm setup calls - which is almost always
the right thing to do as long as whole driver is using devm.

There are uses like you describe though so it's not a universal case
of one or the other.  One advantage of the devres group thing is that
folk who are not keen on devm can effectively have normal manual release
flows.

Jonathan




  reply	other threads:[~2025-06-30 16:07 UTC|newest]

Thread overview: 115+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-24 14:13 [PATCH v17 00/22] Type2 device basic support alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 01/22] cxl: Add type2 " alejandro.lucero-palau
2025-06-25 14:06   ` Jonathan Cameron
2025-06-30 14:38     ` Alejandro Lucero Palau
2025-07-25 21:46   ` dan.j.williams
2025-08-05 10:45     ` Alejandro Lucero Palau
2025-08-05 15:14       ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 02/22] sfc: add cxl support alejandro.lucero-palau
2025-06-25 16:37   ` Jonathan Cameron
2025-06-30 14:52     ` Alejandro Lucero Palau
2025-06-30 14:55       ` Alejandro Lucero Palau
2025-06-30 16:07         ` Jonathan Cameron [this message]
2025-07-25 22:16   ` dan.j.williams
2025-08-06  8:37     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 03/22] cxl: Move pci generic code alejandro.lucero-palau
2025-07-25 22:41   ` dan.j.williams
2025-08-06  8:46     ` Alejandro Lucero Palau
2025-08-06  9:31       ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 04/22] cxl: allow Type2 drivers to map cxl component regs alejandro.lucero-palau
2025-06-27  8:27   ` Jonathan Cameron
2025-07-25 22:55   ` dan.j.williams
2025-07-28 16:23     ` Dave Jiang
2025-08-06  9:43       ` Alejandro Lucero Palau
2025-08-06  9:41     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 05/22] sfc: setup cxl component regs and set media ready alejandro.lucero-palau
2025-06-27  8:39   ` Jonathan Cameron
2025-06-30 15:57     ` Alejandro Lucero Palau
2025-08-08 13:11       ` Alejandro Lucero Palau
2025-06-27  8:45   ` Jonathan Cameron
2025-08-08 13:14     ` Alejandro Lucero Palau
2025-07-25 23:04   ` dan.j.williams
2025-06-24 14:13 ` [PATCH v17 06/22] cxl: Support dpa initialization without a mailbox alejandro.lucero-palau
2025-06-27  8:42   ` Jonathan Cameron
2025-06-27 16:43     ` Dave Jiang
2025-07-01 15:23     ` Alejandro Lucero Palau
2025-06-27  8:43   ` Jonathan Cameron
2025-07-01 15:25     ` Alejandro Lucero Palau
2025-07-26  0:54   ` dan.j.williams
2025-06-24 14:13 ` [PATCH v17 07/22] sfc: initialize dpa alejandro.lucero-palau
2025-07-26  0:55   ` dan.j.williams
2025-08-08 16:59     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 08/22] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-07-26  1:05   ` dan.j.williams
2025-08-08 17:01     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 09/22] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-06-27  8:51   ` Jonathan Cameron
2025-07-01 15:30     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 10/22] cx/memdev: Indicate probe deferral alejandro.lucero-palau
2025-06-27  8:59   ` Jonathan Cameron
2025-06-27  9:42   ` Jonathan Cameron
2025-07-01 15:30     ` Alejandro Lucero Palau
2025-06-27 18:17   ` Dave Jiang
2025-06-30 16:20     ` Jonathan Cameron
2025-07-01 16:07       ` Alejandro Lucero Palau
2025-07-01 16:25         ` Dave Jiang
2025-07-01 16:44           ` Jonathan Cameron
2025-07-01 16:02     ` Alejandro Lucero Palau
2025-07-28 17:45       ` dan.j.williams
2025-07-30  3:46         ` dan.j.williams
2025-08-09 11:24         ` Alejandro Lucero Palau
2025-07-16 22:52   ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 11/22] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-06-27 22:42   ` Dave Jiang
2025-07-04 14:45     ` Alejandro Lucero Palau
2025-08-05 16:14   ` dan.j.williams
2025-08-11 12:04     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 12/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-06-27  9:10   ` Jonathan Cameron
2025-07-04 14:51     ` Alejandro Lucero Palau
2025-07-28 16:30   ` dan.j.williams
2025-08-11 14:24     ` Alejandro Lucero Palau
2025-09-02  7:11       ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 13/22] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-06-27  9:06   ` Jonathan Cameron
2025-07-04 15:18     ` Alejandro Lucero Palau
2025-06-27 20:46   ` Dave Jiang
2025-07-04 15:21     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 14/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-06-27  9:11   ` Jonathan Cameron
2025-07-07 11:24     ` Alejandro Lucero Palau
2025-07-16 23:48   ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 15/22] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-09-03 17:20   ` Davidlohr Bueso
2025-06-24 14:13 ` [PATCH v17 16/22] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-06-27  9:13   ` Jonathan Cameron
2025-06-27 23:05     ` Dave Jiang
2025-06-30 16:20       ` Jonathan Cameron
2025-06-30 16:34         ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 17/22] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 18/22] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-06-27  9:32   ` Jonathan Cameron
2025-07-07 11:31     ` Alejandro Lucero Palau
2025-08-05 16:33   ` dan.j.williams
2025-08-11 14:45     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 19/22] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-06-27  9:33   ` Jonathan Cameron
2025-09-03 17:24   ` Davidlohr Bueso
2025-06-24 14:13 ` [PATCH v17 20/22] sfc: create cxl region alejandro.lucero-palau
2025-06-27  9:38   ` Jonathan Cameron
2025-07-07 11:37     ` Alejandro Lucero Palau
2025-07-28 16:20   ` dan.j.williams
2025-08-11 14:38     ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 21/22] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 22/22] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-06-27  9:46   ` Jonathan Cameron
2025-07-07 12:06     ` Alejandro Lucero Palau
2025-08-27 17:26   ` ALOK TIWARI
2025-07-25 20:51 ` [PATCH v17 00/22] Type2 device basic support dan.j.williams
2025-07-25 21:11   ` dan.j.williams
2025-08-27 16:48 ` PJ Waskiewicz
2025-08-28  8:02   ` Alejandro Lucero Palau
2025-09-04 17:48     ` PJ Waskiewicz
2025-09-08 11:48       ` Alejandro Lucero Palau
2025-09-05 23:23     ` PJ Waskiewicz
2025-09-08 12:03       ` Alejandro Lucero Palau

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