From: Yulin Lu <luyulin@eswincomputing.com>
To: dlemoal@kernel.org, cassel@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, vkoul@kernel.org,
kishon@kernel.org, linux-phy@lists.infradead.org
Cc: ningyu@eswincomputing.com, zhengyu@eswincomputing.com,
linmin@eswincomputing.com, huangyifeng@eswincomputing.com,
fenglin@eswincomputing.com, lianghujun@eswincomputing.com,
Yulin Lu <luyulin@eswincomputing.com>
Subject: [PATCH v4 1/3] Document the EIC7700 SoC sata ahci
Date: Mon, 15 Sep 2025 21:01:35 +0800 [thread overview]
Message-ID: <20250915130135.1497-1-luyulin@eswincomputing.com> (raw)
In-Reply-To: <20250915125902.375-1-luyulin@eswincomputing.com>
Document the SATA AHCI controller on the EIC7700 SoC platform,
including descriptions of its hardware configurations.
Retains the "ports-implemented" property in the DTS, because
removing it and relying only on the firmware register causes
problems. If the property is not present and we remove the
module using `rmmod`, a reset is triggered that clears the
register. As a result, inserting module again using `insmod`
will lead to errors.
The detailed reasons are that the ports-implemented register is
configured by the firmware (U-Boot on the HiFive Premier P550 board)
before kernel entry and correctly set to 0x1. During probe,
ahci_platform_enable_resources() -> ahci_platform_deassert_rsts() is
called, and when the driver is removed,
ahci_platform_disable_resources() -> ahci_platform_assert_rsts() is
called. This reset clears the register, which is defined by the IP
databook to reset to 0.
Signed-off-by: Yulin Lu <luyulin@eswincomputing.com>
---
.../bindings/ata/eswin,eic7700-ahci.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
diff --git a/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
new file mode 100644
index 000000000000..40c44f0705ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 SoC SATA Controller
+
+maintainers:
+ - Yulin Lu <luyulin@eswincomputing.com>
+ - Huan He <hehuan1@eswincomputing.com>
+
+description:
+ AHCI SATA controller embedded into the EIC7700 SoC
+ is based on the DWC AHCI SATA v5.00a IP core.
+
+select:
+ properties:
+ compatible:
+ const: eswin,eic7700-ahci
+ required:
+ - compatible
+
+allOf:
+ - $ref: snps,dwc-ahci-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: eswin,eic7700-ahci
+ - const: snps,dwc-ahci
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: aclk
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: arst
+
+ ports-implemented:
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - phys
+ - phy-names
+ - ports-implemented
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ sata@50420000 {
+ compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
+ reg = <0x50420000 0x10000>;
+ interrupt-parent = <&plic>;
+ interrupts = <58>;
+ clocks = <&clock 171>, <&clock 186>;
+ clock-names = "pclk", "aclk";
+ phys = <&sata_phy>;
+ phy-names = "sata-phy";
+ ports-implemented = <0x1>;
+ resets = <&reset 96>;
+ reset-names = "arst";
+ };
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Yulin Lu <luyulin@eswincomputing.com>
To: dlemoal@kernel.org, cassel@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, vkoul@kernel.org,
kishon@kernel.org, linux-phy@lists.infradead.org
Cc: ningyu@eswincomputing.com, zhengyu@eswincomputing.com,
linmin@eswincomputing.com, huangyifeng@eswincomputing.com,
fenglin@eswincomputing.com, lianghujun@eswincomputing.com,
Yulin Lu <luyulin@eswincomputing.com>
Subject: [PATCH v4 1/3] Document the EIC7700 SoC sata ahci
Date: Mon, 15 Sep 2025 21:01:35 +0800 [thread overview]
Message-ID: <20250915130135.1497-1-luyulin@eswincomputing.com> (raw)
In-Reply-To: <20250915125902.375-1-luyulin@eswincomputing.com>
Document the SATA AHCI controller on the EIC7700 SoC platform,
including descriptions of its hardware configurations.
Retains the "ports-implemented" property in the DTS, because
removing it and relying only on the firmware register causes
problems. If the property is not present and we remove the
module using `rmmod`, a reset is triggered that clears the
register. As a result, inserting module again using `insmod`
will lead to errors.
The detailed reasons are that the ports-implemented register is
configured by the firmware (U-Boot on the HiFive Premier P550 board)
before kernel entry and correctly set to 0x1. During probe,
ahci_platform_enable_resources() -> ahci_platform_deassert_rsts() is
called, and when the driver is removed,
ahci_platform_disable_resources() -> ahci_platform_assert_rsts() is
called. This reset clears the register, which is defined by the IP
databook to reset to 0.
Signed-off-by: Yulin Lu <luyulin@eswincomputing.com>
---
.../bindings/ata/eswin,eic7700-ahci.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
diff --git a/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
new file mode 100644
index 000000000000..40c44f0705ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 SoC SATA Controller
+
+maintainers:
+ - Yulin Lu <luyulin@eswincomputing.com>
+ - Huan He <hehuan1@eswincomputing.com>
+
+description:
+ AHCI SATA controller embedded into the EIC7700 SoC
+ is based on the DWC AHCI SATA v5.00a IP core.
+
+select:
+ properties:
+ compatible:
+ const: eswin,eic7700-ahci
+ required:
+ - compatible
+
+allOf:
+ - $ref: snps,dwc-ahci-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: eswin,eic7700-ahci
+ - const: snps,dwc-ahci
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: aclk
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: arst
+
+ ports-implemented:
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - phys
+ - phy-names
+ - ports-implemented
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ sata@50420000 {
+ compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
+ reg = <0x50420000 0x10000>;
+ interrupt-parent = <&plic>;
+ interrupts = <58>;
+ clocks = <&clock 171>, <&clock 186>;
+ clock-names = "pclk", "aclk";
+ phys = <&sata_phy>;
+ phy-names = "sata-phy";
+ ports-implemented = <0x1>;
+ resets = <&reset 96>;
+ reset-names = "arst";
+ };
--
2.25.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2025-09-15 13:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-15 12:59 [PATCH v4 0/3] Add driver support for Eswin EIC7700 SoC SATA Controller and PHY Yulin Lu
2025-09-15 12:59 ` Yulin Lu
2025-09-15 13:01 ` Yulin Lu [this message]
2025-09-15 13:01 ` [PATCH v4 1/3] Document the EIC7700 SoC sata ahci Yulin Lu
2025-09-22 16:11 ` Rob Herring
2025-09-22 16:11 ` Rob Herring
2025-09-23 3:08 ` luyulin
2025-09-23 3:08 ` luyulin
2025-09-15 13:03 ` [PATCH v4 2/3] dt-bindings: phy: eswin: Document the EIC7700 SoC SATA PHY Yulin Lu
2025-09-15 13:03 ` Yulin Lu
2025-09-15 13:03 ` [PATCH v4 3/3] phy: eswin: Create eswin directory and add EIC7700 SATA PHY driver Yulin Lu
2025-09-15 13:03 ` Yulin Lu
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