Re: [PATCH v4 1/3] Document the EIC7700 SoC sata ahci

[Rob Herring <robh@kernel.org>]

On Mon, Sep 15, 2025 at 09:01:35PM +0800, Yulin Lu wrote:
> Document the SATA AHCI controller on the EIC7700 SoC platform,
> including descriptions of its hardware configurations.

Please fix the subject: "dt-bindings: ata: ..."

> 
> Retains the "ports-implemented" property in the DTS, because
> removing it and relying only on the firmware register causes
> problems. If the property is not present and we remove the
> module using `rmmod`, a reset is triggered that clears the
> register. As a result, inserting module again using `insmod`
> will lead to errors.
> 
> The detailed reasons are that the ports-implemented register is
> configured by the firmware (U-Boot on the HiFive Premier P550 board)
> before kernel entry and correctly set to 0x1. During probe,
> ahci_platform_enable_resources() -> ahci_platform_deassert_rsts() is
> called, and when the driver is removed,
> ahci_platform_disable_resources() -> ahci_platform_assert_rsts() is
> called. This reset clears the register, which is defined by the IP
> databook to reset to 0.
> 
> Signed-off-by: Yulin Lu <luyulin@eswincomputing.com>
> ---
>  .../bindings/ata/eswin,eic7700-ahci.yaml      | 79 +++++++++++++++++++
>  1 file changed, 79 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
> 
> diff --git a/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
> new file mode 100644
> index 000000000000..40c44f0705ba
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 SoC SATA Controller
> +
> +maintainers:
> +  - Yulin Lu <luyulin@eswincomputing.com>
> +  - Huan He <hehuan1@eswincomputing.com>
> +
> +description:
> +  AHCI SATA controller embedded into the EIC7700 SoC
> +  is based on the DWC AHCI SATA v5.00a IP core.

Wrap at 80 chars.

> +
> +select:
> +  properties:
> +    compatible:
> +      const: eswin,eic7700-ahci
> +  required:
> +    - compatible
> +
> +allOf:
> +  - $ref: snps,dwc-ahci-common.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: eswin,eic7700-ahci
> +      - const: snps,dwc-ahci
> +
> +  clocks:
> +    minItems: 2
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: aclk
> +
> +  resets:
> +    maxItems: 1
> +
> +  reset-names:
> +    const: arst
> +
> +  ports-implemented:
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +  - phys
> +  - phy-names
> +  - ports-implemented
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    sata@50420000 {
> +        compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
> +        reg = <0x50420000 0x10000>;
> +        interrupt-parent = <&plic>;
> +        interrupts = <58>;
> +        clocks = <&clock 171>, <&clock 186>;
> +        clock-names = "pclk", "aclk";
> +        phys = <&sata_phy>;
> +        phy-names = "sata-phy";
> +        ports-implemented = <0x1>;
> +        resets = <&reset 96>;
> +        reset-names = "arst";
> +    };
> -- 
> 2.25.1
>