From: Jason Gunthorpe <jgg@nvidia.com>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Kevin Tian <kevin.tian@intel.com>,
patches@lists.linux.dev, Tina Zhang <tina.zhang@intel.com>,
Wei Wang <wei.w.wang@intel.com>
Subject: Re: [PATCH v2 01/10] iommu/pages: Add support for a incoherent IOMMU page walker
Date: Mon, 22 Sep 2025 13:32:44 -0300 [thread overview]
Message-ID: <20250922163244.GH2132010@nvidia.com> (raw)
In-Reply-To: <debe1f51-e070-4efe-b88d-5111df9c9874@linux.intel.com>
On Sun, Sep 21, 2025 at 05:54:01PM +0800, Baolu Lu wrote:
> On 8/27/2025 1:26 AM, Jason Gunthorpe wrote:
> > Some IOMMU HW cannot snoop the CPU cache when it walks the IO page tables.
> > The CPU is required to flush the cache to make changes visible to the HW.
> >
> nit: how about make the subject like this,
>
> iommu/pages: Add support for incoherent IOMMU page walkers
Yep
Thanks,
Jason
next prev parent reply other threads:[~2025-09-22 17:48 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-26 17:26 [PATCH v2 00/10] Convert Intel VT-D to use the generic iommu page table Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 01/10] iommu/pages: Add support for a incoherent IOMMU page walker Jason Gunthorpe
2025-09-21 9:54 ` Baolu Lu
2025-09-22 16:32 ` Jason Gunthorpe [this message]
2025-10-14 7:41 ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 02/10] iommupt: Add basic support for SW bits in the page table Jason Gunthorpe
2025-09-21 10:21 ` Baolu Lu
2025-10-14 7:45 ` Tian, Kevin
2025-10-21 13:18 ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 03/10] iommupt: Use the incoherent start/stop functions for PT_FEAT_DMA_INCOHERENT Jason Gunthorpe
2025-09-21 13:29 ` Baolu Lu
2025-10-14 7:51 ` Tian, Kevin
2025-10-21 13:20 ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 04/10] iommupt: Flush the CPU cache after any writes to the page table Jason Gunthorpe
2025-09-22 2:12 ` Baolu Lu
2025-09-22 14:42 ` Jason Gunthorpe
2025-09-23 2:17 ` Baolu Lu
2025-09-23 14:10 ` Jason Gunthorpe
2025-09-24 2:30 ` Baolu Lu
2025-09-22 2:31 ` Baolu Lu
2025-09-22 14:44 ` Jason Gunthorpe
2025-09-23 2:29 ` Baolu Lu
2025-09-23 14:13 ` Jason Gunthorpe
2025-09-24 3:05 ` Baolu Lu
2025-10-14 7:53 ` Tian, Kevin
2025-10-21 13:50 ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 05/10] iommupt: Add the Intel VT-D second stage page table format Jason Gunthorpe
2025-09-22 3:06 ` Baolu Lu
2025-10-14 7:54 ` Tian, Kevin
2025-10-21 13:58 ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 06/10] iommupt/x86: Set the dirty bit only for writable PTEs Jason Gunthorpe
2025-10-14 7:55 ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 07/10] iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT Jason Gunthorpe
2025-10-14 7:55 ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 08/10] iommu/vt-d: Use the generic iommu page table Jason Gunthorpe
2025-09-22 11:17 ` Baolu Lu
2025-10-14 7:55 ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 09/10] iommu/vt-d: Follow PT_FEAT_DMA_INCOHERENT into the PASID entry Jason Gunthorpe
2025-09-22 13:00 ` Baolu Lu
2025-10-14 7:58 ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 10/10] iommupt: Add a kunit test for the SW bits Jason Gunthorpe
2025-10-14 7:58 ` Tian, Kevin
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