From: Herve Codina <herve.codina@bootlin.com>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: "Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Pascal Eberhard" <pascal.eberhard@se.com>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 1/4] dt-bindings: iio: adc: Add the Renesas RZ/N1 ADC
Date: Fri, 17 Oct 2025 09:07:42 +0200 [thread overview]
Message-ID: <20251017090742.49f2d628@bootlin.com> (raw)
In-Reply-To: <aPEoqkdatl4G82co@shikoro>
On Thu, 16 Oct 2025 19:17:30 +0200
Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:
> > +description:
> > + The Renesas RZ/N1 ADC controller available in the Renesas RZ/N1 SoCs family
> > + can use up to two internal ACD cores (ADC1 and ADC2) those internal cores are
>
> ADC cores?
Sure, will be fixed.
>
> > + handled through ADC controller virtual channels.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - renesas,r9a06g032-adc # RZ/N1D
> > + - const: renesas,rzn1-adc
>
> Do you know of other SoCs with this IP core? If it is only RZ/N for now,
> we could go with const for N1D. All other N1 variants cannot run Linux
> because of no SDRAM controller.
>
I know only about RZ/N1 family.
I will keep only "renesas,r9a06g032-adc" in the next iteration.
Best regards,
Hervé
next prev parent reply other threads:[~2025-10-17 7:07 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 14:28 [PATCH 0/4] Add support for the Renesas RZ/N1 ADC Herve Codina (Schneider Electric)
2025-10-15 14:28 ` [PATCH 1/4] dt-bindings: iio: adc: Add " Herve Codina (Schneider Electric)
2025-10-16 15:49 ` Krzysztof Kozlowski
2025-10-17 7:20 ` Herve Codina
2025-10-16 17:17 ` Wolfram Sang
2025-10-17 7:07 ` Herve Codina [this message]
2025-10-23 8:55 ` Herve Codina
2025-10-23 8:57 ` Wolfram Sang
2025-10-15 14:28 ` [PATCH 2/4] iio: adc: Add support for " Herve Codina (Schneider Electric)
2025-10-15 14:55 ` Andy Shevchenko
2025-10-15 15:21 ` Nuno Sá
2025-10-15 19:14 ` Herve Codina
2025-10-16 9:24 ` Nuno Sá
2025-10-16 14:02 ` Herve Codina
2025-10-16 15:26 ` Nuno Sá
2025-10-17 6:59 ` Herve Codina
2025-10-17 8:26 ` Nuno Sá
2025-10-17 15:43 ` Herve Codina
2025-10-17 16:29 ` Nuno Sá
2025-10-18 18:31 ` Jonathan Cameron
2025-10-16 13:13 ` kernel test robot
2025-10-16 14:47 ` kernel test robot
2025-10-17 6:28 ` Wolfram Sang
2025-10-17 7:36 ` Herve Codina
2025-10-17 7:40 ` Geert Uytterhoeven
2025-10-17 7:59 ` Herve Codina
2025-10-17 9:03 ` Wolfram Sang
2025-10-17 9:11 ` Wolfram Sang
2025-10-17 15:00 ` Herve Codina
2025-10-17 15:14 ` Wolfram Sang
2025-10-18 19:10 ` Jonathan Cameron
2025-10-15 14:28 ` [PATCH 3/4] ARM: dts: renesas: r9a06g032: Add the ADC device Herve Codina (Schneider Electric)
2025-10-17 6:36 ` Wolfram Sang
2025-10-15 14:28 ` [PATCH 4/4] MAINTAINERS: Add the Renesas RZ/N1 ADC driver entry Herve Codina (Schneider Electric)
2025-10-17 6:30 ` Wolfram Sang
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