From: Herve Codina <herve.codina@bootlin.com>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: "Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Pascal Eberhard" <pascal.eberhard@se.com>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 2/4] iio: adc: Add support for the Renesas RZ/N1 ADC
Date: Fri, 17 Oct 2025 17:00:54 +0200 [thread overview]
Message-ID: <20251017170054.7a7a6d5f@bootlin.com> (raw)
In-Reply-To: <aPIIVUlHnvi0BXtN@shikoro>
Hi Wolfram,
On Fri, 17 Oct 2025 11:11:49 +0200
Wolfram Sang <wsa+renesas@sang-engineering.com> wrote:
> > +static int rzn1_adc_read_raw_ch(struct rzn1_adc *rzn1_adc, unsigned int chan, int *val)
> > +{
> > + u32 *adc1_data, *adc2_data;
> > + int adc1_ch, adc2_ch;
> > + u32 adc_data;
> > + int ret;
> > +
> > + if (chan < 8) {
> > + /* chan 0..7 used to get ADC1 ch 0..7 */
> > + adc1_ch = chan;
> > + adc1_data = &adc_data;
> > + adc2_ch = -1;
> > + adc2_data = NULL;
> > + } else if (chan < 16) {
> > + /* chan 8..15 used to get ADC2 ch 0..7 */
> > + adc1_ch = -1;
> > + adc1_data = NULL;
> > + adc2_ch = chan - 8;
> > + adc2_data = &adc_data;
> > + } else {
> > + return -EINVAL;
> > + }
>
> How about putting part of the logic into the setup function? So, here
> only:
>
> if (chan >= 16)
> return -EINVAL
>
> > +
> > + ret = pm_runtime_resume_and_get(rzn1_adc->dev);
> > + if (ret < 0)
> > + return ret;
> > +
> > + mutex_lock(&rzn1_adc->lock);
> > +
> > + rzn1_adc_vc_setup_conversion(rzn1_adc, chan, adc1_ch, adc2_ch);
>
> rzn1_adc_vc_setup_conversion(rzn1_adc, chan);
>
> And in that function:
>
> > +static void rzn1_adc_vc_setup_conversion(struct rzn1_adc *rzn1_adc, u32 ch,
> > + int adc1_ch, int adc2_ch)
> > +{
> > + u32 vc = 0;
> > +
> > + if (adc1_ch != -1)
> > + vc |= RZN1_ADC_VC_ADC1_ENABLE | RZN1_ADC_VC_ADC1_CHANNEL_SEL(adc1_ch);
> > +
> > + if (adc2_ch != -1)
> > + vc |= RZN1_ADC_VC_ADC2_ENABLE | RZN1_ADC_VC_ADC2_CHANNEL_SEL(adc2_ch);
> > +
> > + writel(vc, rzn1_adc->regs + RZN1_ADC_VC_REG(ch));
> > +}
>
> if (ch < 8)
> vc |= RZN1_ADC_VC_ADC1_ENABLE | RZN1_ADC_VC_ADC1_CHANNEL_SEL(ch);
> else
> vc |= RZN1_ADC_VC_ADC2_ENABLE | RZN1_ADC_VC_ADC2_CHANNEL_SEL(ch - 8);
>
> And a similar simplification for rzn1_adc_vc_wait_conversion().
>
> Should work and the code is even more readable, I'd say. And has less
> lines.
>
That was what I did on my first driver draft before sending this first
iteration. I moved to adc1 and adc2 channel numbers in parameters to avoid
adding this logic here.
I think it was better to decouple the IIO chan number from the adc core
channel used.
I don't know if it will be relevant but we can image a future improvement
where new IIO chans use both the ADC core 1 and 2. It could make sense.
IMHO, I think the solution you proposed is similar in term of complexity
to the RZN1_ADC_NO_CHANNEL approach. On my side, I would prefer the
RZN1_ADC_NO_CHANNEL approach to keep the decoupling between IIO chan and
ADC core chans.
That's said, I am still open to move in your direction if you still think
it is more relevant than the RZN1_ADC_NO_CHANNEL approach. Just tell me.
Best regards,
Hervé
next prev parent reply other threads:[~2025-10-17 15:01 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 14:28 [PATCH 0/4] Add support for the Renesas RZ/N1 ADC Herve Codina (Schneider Electric)
2025-10-15 14:28 ` [PATCH 1/4] dt-bindings: iio: adc: Add " Herve Codina (Schneider Electric)
2025-10-16 15:49 ` Krzysztof Kozlowski
2025-10-17 7:20 ` Herve Codina
2025-10-16 17:17 ` Wolfram Sang
2025-10-17 7:07 ` Herve Codina
2025-10-23 8:55 ` Herve Codina
2025-10-23 8:57 ` Wolfram Sang
2025-10-15 14:28 ` [PATCH 2/4] iio: adc: Add support for " Herve Codina (Schneider Electric)
2025-10-15 14:55 ` Andy Shevchenko
2025-10-15 15:21 ` Nuno Sá
2025-10-15 19:14 ` Herve Codina
2025-10-16 9:24 ` Nuno Sá
2025-10-16 14:02 ` Herve Codina
2025-10-16 15:26 ` Nuno Sá
2025-10-17 6:59 ` Herve Codina
2025-10-17 8:26 ` Nuno Sá
2025-10-17 15:43 ` Herve Codina
2025-10-17 16:29 ` Nuno Sá
2025-10-18 18:31 ` Jonathan Cameron
2025-10-16 13:13 ` kernel test robot
2025-10-16 14:47 ` kernel test robot
2025-10-17 6:28 ` Wolfram Sang
2025-10-17 7:36 ` Herve Codina
2025-10-17 7:40 ` Geert Uytterhoeven
2025-10-17 7:59 ` Herve Codina
2025-10-17 9:03 ` Wolfram Sang
2025-10-17 9:11 ` Wolfram Sang
2025-10-17 15:00 ` Herve Codina [this message]
2025-10-17 15:14 ` Wolfram Sang
2025-10-18 19:10 ` Jonathan Cameron
2025-10-15 14:28 ` [PATCH 3/4] ARM: dts: renesas: r9a06g032: Add the ADC device Herve Codina (Schneider Electric)
2025-10-17 6:36 ` Wolfram Sang
2025-10-15 14:28 ` [PATCH 4/4] MAINTAINERS: Add the Renesas RZ/N1 ADC driver entry Herve Codina (Schneider Electric)
2025-10-17 6:30 ` Wolfram Sang
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