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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
	pekka.paalanen@collabora.com, contact@emersion.fr,
	harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
	sebastian.wick@redhat.com, swati2.sharma@intel.com,
	alex.hung@amd.com, jani.nikula@intel.com,
	suraj.kandpal@intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: [v7 02/15] drm/i915: Add intel_color_op
Date: Mon,  1 Dec 2025 12:16:42 +0530	[thread overview]
Message-ID: <20251201064655.3579280-3-uma.shankar@intel.com> (raw)
In-Reply-To: <20251201064655.3579280-1-uma.shankar@intel.com>

From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Add data structure to store intel specific details of colorop

v2:
 - Remove dead code
 - Convert macro to function (Jani)
 - Remove colorop state as it is not being used
 - Refactor to separate file

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/Makefile                      |  1 +
 drivers/gpu/drm/i915/display/intel_colorop.c       | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_colorop.h       | 13 +++++++++++++
 drivers/gpu/drm/i915/display/intel_display_types.h |  5 +++++
 drivers/gpu/drm/xe/Makefile                        |  1 +
 5 files changed, 30 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/display/intel_colorop.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_colorop.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b2250432ae98..7c19d5345d88 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -240,6 +240,7 @@ i915-y += \
 	display/intel_cdclk.o \
 	display/intel_cmtg.o \
 	display/intel_color.o \
+	display/intel_colorop.o \
 	display/intel_combo_phy.o \
 	display/intel_connector.o \
 	display/intel_crtc.o \
diff --git a/drivers/gpu/drm/i915/display/intel_colorop.c b/drivers/gpu/drm/i915/display/intel_colorop.c
new file mode 100644
index 000000000000..eaab50d2d126
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_colorop.c
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+#include "intel_colorop.h"
+
+struct intel_colorop *to_intel_colorop(struct drm_colorop *colorop)
+{
+	return container_of(colorop, struct intel_colorop, base);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_colorop.h b/drivers/gpu/drm/i915/display/intel_colorop.h
new file mode 100644
index 000000000000..23a29a565949
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_colorop.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __INTEL_COLOROP_H__
+#define __INTEL_COLOROP_H__
+
+#include "intel_display_types.h"
+
+struct intel_colorop *to_intel_colorop(struct drm_colorop *colorop);
+
+#endif /* __INTEL_COLOROP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 38702a9e0f50..bb8b8466235a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1985,6 +1985,11 @@ struct intel_dp_mst_encoder {
 	struct intel_connector *connector;
 };
 
+struct intel_colorop {
+	struct drm_colorop base;
+	enum intel_color_block id;
+};
+
 static inline struct intel_encoder *
 intel_attached_encoder(struct intel_connector *connector)
 {
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a7e13a676f7d..3420725c4ba8 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -234,6 +234,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_cdclk.o \
 	i915-display/intel_cmtg.o \
 	i915-display/intel_color.o \
+	i915-display/intel_colorop.o \
 	i915-display/intel_combo_phy.o \
 	i915-display/intel_connector.o \
 	i915-display/intel_crtc.o \
-- 
2.50.1


  parent reply	other threads:[~2025-12-01  6:36 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01  6:46 [v7 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-01  6:46 ` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks Uma Shankar
2025-12-02  7:42   ` [v7, " Murthy, Arun R
2025-12-02  8:04     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` Uma Shankar [this message]
2025-12-01 14:21   ` [v7 02/15] drm/i915: Add intel_color_op kernel test robot
2025-12-01  6:46 ` [v7 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-01  6:46 ` [v7 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-01  9:02   ` Kandpal, Suraj
2025-12-01 15:55   ` kernel test robot
2025-12-02  7:56   ` [v7,04/15] " Murthy, Arun R
2025-12-02  8:20     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-01  9:05   ` Kandpal, Suraj
2025-12-01 15:45   ` kernel test robot
2025-12-01  6:46 ` [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-12-01  6:46 ` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-01  9:16   ` Kandpal, Suraj
2025-12-01 18:13   ` kernel test robot
2025-12-01  6:46 ` [v7 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-01  9:18   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-01  9:21   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-12-01  9:23   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-01  9:24   ` Kandpal, Suraj
2025-12-02  8:24     ` Shankar, Uma
2025-12-02 16:00       ` Kandpal, Suraj
2025-12-01 19:28   ` kernel test robot
2025-12-01  6:46 ` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-12-02 15:32   ` Kandpal, Suraj
2025-12-02 16:10     ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 13/15] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-12-01  9:26   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-02 15:42   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-01 21:14   ` kernel test robot
2025-12-01  6:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  6:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-01  7:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01  7:48 ` ✓ i915.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-01  7:50 ` ✓ Xe.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  8:41 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-01  9:11 ` ✗ i915.CI.Full: failure for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-02  5:06 ` ✓ i915.CI.Full: success " Patchwork

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