From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
pekka.paalanen@collabora.com, contact@emersion.fr,
harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
sebastian.wick@redhat.com, swati2.sharma@intel.com,
alex.hung@amd.com, jani.nikula@intel.com,
suraj.kandpal@intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero
Date: Mon, 1 Dec 2025 12:16:46 +0530 [thread overview]
Message-ID: <20251201064655.3579280-7-uma.shankar@intel.com> (raw)
In-Reply-To: <20251201064655.3579280-1-uma.shankar@intel.com>
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
When int_bits == 0, we lose the sign bit when we do the range check
and apply the mask.
Fix this by ensuring a minimum of one integer bit, which guarantees space
for the sign bit in fully fractional representations (e.g. S0.12)
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 33fe5c9b4663..81b87fed8878 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -613,6 +613,8 @@ static u16 ctm_to_twos_complement(u64 coeff, int int_bits, int frac_bits)
if (CTM_COEFF_NEGATIVE(coeff))
c = -c;
+ int_bits = max(int_bits, 1);
+
c = clamp(c, -(s64)BIT(int_bits + frac_bits - 1),
(s64)(BIT(int_bits + frac_bits - 1) - 1));
--
2.50.1
next prev parent reply other threads:[~2025-12-01 6:36 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 6:46 [v7 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-01 6:46 ` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks Uma Shankar
2025-12-02 7:42 ` [v7, " Murthy, Arun R
2025-12-02 8:04 ` Borah, Chaitanya Kumar
2025-12-01 6:46 ` [v7 02/15] drm/i915: Add intel_color_op Uma Shankar
2025-12-01 14:21 ` kernel test robot
2025-12-01 6:46 ` [v7 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-01 6:46 ` [v7 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-01 9:02 ` Kandpal, Suraj
2025-12-01 15:55 ` kernel test robot
2025-12-02 7:56 ` [v7,04/15] " Murthy, Arun R
2025-12-02 8:20 ` Borah, Chaitanya Kumar
2025-12-01 6:46 ` [v7 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-01 9:05 ` Kandpal, Suraj
2025-12-01 15:45 ` kernel test robot
2025-12-01 6:46 ` Uma Shankar [this message]
2025-12-01 6:46 ` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-01 9:16 ` Kandpal, Suraj
2025-12-01 18:13 ` kernel test robot
2025-12-01 6:46 ` [v7 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-01 9:18 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-01 9:21 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-12-01 9:23 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-01 9:24 ` Kandpal, Suraj
2025-12-02 8:24 ` Shankar, Uma
2025-12-02 16:00 ` Kandpal, Suraj
2025-12-01 19:28 ` kernel test robot
2025-12-01 6:46 ` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-12-02 15:32 ` Kandpal, Suraj
2025-12-02 16:10 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 13/15] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-12-01 9:26 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-02 15:42 ` Kandpal, Suraj
2025-12-01 6:46 ` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-01 21:14 ` kernel test robot
2025-12-01 6:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01 6:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-01 7:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01 7:48 ` ✓ i915.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-01 7:50 ` ✓ Xe.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01 8:41 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-01 9:11 ` ✗ i915.CI.Full: failure for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-02 5:06 ` ✓ i915.CI.Full: success " Patchwork
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