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From: kernel test robot <lkp@intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: oe-kbuild-all@lists.linux.dev, chaitanya.kumar.borah@intel.com,
	ville.syrjala@linux.intel.com, pekka.paalanen@collabora.com,
	contact@emersion.fr, harry.wentland@amd.com, mwen@igalia.com,
	jadahl@redhat.com, sebastian.wick@redhat.com,
	swati2.sharma@intel.com, alex.hung@amd.com,
	jani.nikula@intel.com, suraj.kandpal@intel.com,
	Uma Shankar <uma.shankar@intel.com>
Subject: Re: [v7 04/15] drm/i915/color: Create a transfer function color pipeline
Date: Mon, 1 Dec 2025 23:55:38 +0800	[thread overview]
Message-ID: <202512012314.C2mdxzIy-lkp@intel.com> (raw)
In-Reply-To: <20251201064655.3579280-5-uma.shankar@intel.com>

Hi Uma,

kernel test robot noticed the following build errors:

[auto build test ERROR on next-20251201]
[also build test ERROR on linus/master v6.18]
[cannot apply to drm-xe/drm-xe-next drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.18 v6.18-rc7 v6.18-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Uma-Shankar/drm-i915-display-Add-identifiers-for-driver-specific-blocks/20251201-150245
base:   next-20251201
patch link:    https://lore.kernel.org/r/20251201064655.3579280-5-uma.shankar%40intel.com
patch subject: [v7 04/15] drm/i915/color: Create a transfer function color pipeline
config: i386-buildonly-randconfig-006-20251201 (https://download.01.org/0day-ci/archive/20251201/202512012314.C2mdxzIy-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251201/202512012314.C2mdxzIy-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512012314.C2mdxzIy-lkp@intel.com/

All errors (new ones prefixed by >>):

   In file included from drivers/gpu/drm/i915/display/intel_colorop.h:9,
                    from drivers/gpu/drm/i915/display/intel_color_pipeline.c:5:
   drivers/gpu/drm/i915/display/intel_display_types.h:1989:28: error: field 'base' has incomplete type
    1989 |         struct drm_colorop base;
         |                            ^~~~
   drivers/gpu/drm/i915/display/intel_color_pipeline.c: In function '_intel_color_pipeline_plane_init':
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:25:15: error: implicit declaration of function 'drm_plane_colorop_curve_1d_lut_init' [-Wimplicit-function-declaration]
      25 |         ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,
         |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:27:51: error: 'DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR' undeclared (first use in this function)
      27 |                                                   DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_color_pipeline.c:27:51: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:28:51: error: 'DRM_COLOROP_FLAG_ALLOW_BYPASS' undeclared (first use in this function)
      28 |                                                   DRM_COLOROP_FLAG_ALLOW_BYPASS);
         |                                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:40:15: error: implicit declaration of function 'drm_plane_colorop_ctm_3x4_init' [-Wimplicit-function-declaration]
      40 |         ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane,
         |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:45:9: error: implicit declaration of function 'drm_colorop_set_next_property'; did you mean 'drm_connector_set_tile_property'? [-Wimplicit-function-declaration]
      45 |         drm_colorop_set_next_property(prev_op, &colorop->base);
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         |         drm_connector_set_tile_property
   drivers/gpu/drm/i915/display/intel_color_pipeline.c: In function 'intel_color_pipeline_plane_init':
>> drivers/gpu/drm/i915/display/intel_color_pipeline.c:92:16: error: 'struct drm_plane' has no member named 'color_pipeline_property'; did you mean 'color_encoding_property'?
      92 |         plane->color_pipeline_property = prop;
         |                ^~~~~~~~~~~~~~~~~~~~~~~
         |                color_encoding_property


vim +/drm_plane_colorop_curve_1d_lut_init +25 drivers/gpu/drm/i915/display/intel_color_pipeline.c

   > 5	#include "intel_colorop.h"
     6	#include "intel_color_pipeline.h"
     7	#include "intel_de.h"
     8	#include "intel_display_types.h"
     9	#include "skl_universal_plane.h"
    10	
    11	#define MAX_COLOR_PIPELINES 2
    12	#define PLANE_DEGAMMA_SIZE 128
    13	#define PLANE_GAMMA_SIZE 32
    14	
    15	static
    16	int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_enum_list *list)
    17	{
    18		struct intel_colorop *colorop;
    19		struct drm_device *dev = plane->dev;
    20		int ret;
    21		struct drm_colorop *prev_op;
    22	
    23		colorop = intel_colorop_create(INTEL_PLANE_CB_PRE_CSC_LUT);
    24	
  > 25		ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,
    26							  PLANE_DEGAMMA_SIZE,
  > 27							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
  > 28							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
    29	
    30		if (ret)
    31			return ret;
    32	
    33		list->type = colorop->base.base.id;
    34		list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", colorop->base.base.id);
    35	
    36		/* TODO: handle failures and clean up */
    37		prev_op = &colorop->base;
    38	
    39		colorop = intel_colorop_create(INTEL_PLANE_CB_CSC);
  > 40		ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane,
    41						     DRM_COLOROP_FLAG_ALLOW_BYPASS);
    42		if (ret)
    43			return ret;
    44	
  > 45		drm_colorop_set_next_property(prev_op, &colorop->base);
    46		prev_op = &colorop->base;
    47	
    48		colorop = intel_colorop_create(INTEL_PLANE_CB_POST_CSC_LUT);
    49		ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,
    50							  PLANE_GAMMA_SIZE,
    51							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
    52							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
    53		if (ret)
    54			return ret;
    55	
    56		drm_colorop_set_next_property(prev_op, &colorop->base);
    57	
    58		return 0;
    59	}
    60	
    61	int intel_color_pipeline_plane_init(struct drm_plane *plane)
    62	{
    63		struct drm_device *dev = plane->dev;
    64		struct intel_display *display = to_intel_display(dev);
    65		struct drm_property *prop;
    66		struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES];
    67		int len = 0;
    68		int ret;
    69	
    70		/* Currently expose pipeline only for HDR planes */
    71		if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
    72			return 0;
    73	
    74		/* Add "Bypass" (i.e. NULL) pipeline */
    75		pipelines[len].type = 0;
    76		pipelines[len].name = "Bypass";
    77		len++;
    78	
    79		/* Add pipeline consisting of transfer functions */
    80		ret = _intel_color_pipeline_plane_init(plane, &pipelines[len]);
    81		if (ret)
    82			return ret;
    83		len++;
    84	
    85		/* Create COLOR_PIPELINE property and attach */
    86		prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC,
    87						"COLOR_PIPELINE",
    88						pipelines, len);
    89		if (!prop)
    90			return -ENOMEM;
    91	
  > 92		plane->color_pipeline_property = prop;

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

  parent reply	other threads:[~2025-12-01 15:56 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01  6:46 [v7 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-01  6:46 ` [v7 01/15] drm/i915/display: Add identifiers for driver specific blocks Uma Shankar
2025-12-02  7:42   ` [v7, " Murthy, Arun R
2025-12-02  8:04     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 02/15] drm/i915: Add intel_color_op Uma Shankar
2025-12-01 14:21   ` kernel test robot
2025-12-01  6:46 ` [v7 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-01  6:46 ` [v7 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-01  9:02   ` Kandpal, Suraj
2025-12-01 15:55   ` kernel test robot [this message]
2025-12-02  7:56   ` [v7,04/15] " Murthy, Arun R
2025-12-02  8:20     ` Borah, Chaitanya Kumar
2025-12-01  6:46 ` [v7 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-01  9:05   ` Kandpal, Suraj
2025-12-01 15:45   ` kernel test robot
2025-12-01  6:46 ` [v7 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-12-01  6:46 ` [v7 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-01  9:16   ` Kandpal, Suraj
2025-12-01 18:13   ` kernel test robot
2025-12-01  6:46 ` [v7 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-01  9:18   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-01  9:21   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-12-01  9:23   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-01  9:24   ` Kandpal, Suraj
2025-12-02  8:24     ` Shankar, Uma
2025-12-02 16:00       ` Kandpal, Suraj
2025-12-01 19:28   ` kernel test robot
2025-12-01  6:46 ` [v7 12/15] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-12-02 15:32   ` Kandpal, Suraj
2025-12-02 16:10     ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 13/15] drm/i915/display: Add registers for 3D LUT Uma Shankar
2025-12-01  9:26   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-02 15:42   ` Kandpal, Suraj
2025-12-01  6:46 ` [v7 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-01 21:14   ` kernel test robot
2025-12-01  6:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  6:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-01  7:03 ` ✗ CI.checksparse: warning " Patchwork
2025-12-01  7:48 ` ✓ i915.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-01  7:50 ` ✓ Xe.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev6) Patchwork
2025-12-01  8:41 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-01  9:11 ` ✗ i915.CI.Full: failure for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-02  5:06 ` ✓ i915.CI.Full: success " Patchwork

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