From: FUKAUMI Naoki <naoki@radxa.com>
To: heiko@sntech.de
Cc: joseph.kogut@gmail.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, quentin.schulz@cherry.de, jonas@kwiboo.se,
kever.yang@rock-chips.com, i@next.chainsx.cn,
honyuenkwun@gmail.com, inindev@gmail.com,
michael.opdenacker@rootcommit.com, dsimic@manjaro.org,
pbrobinson@gmail.com, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org,
FUKAUMI Naoki <naoki@radxa.com>
Subject: [RESEND PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5
Date: Tue, 2 Dec 2025 05:27:01 +0000 [thread overview]
Message-ID: <20251202052702.155523-3-naoki@radxa.com> (raw)
In-Reply-To: <20251202052702.155523-1-naoki@radxa.com>
From: Joseph Kogut <joseph.kogut@gmail.com>
From: Joseph Kogut <joseph.kogut@gmail.com>
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
proprietary connector.
Specification:
- Rockchip RK3588
- Up to 32 GB LPDDR4X
- Up to 128 GB eMMC
- 1x HDMI TX up to 8k@60 hz
- 1x eDP TX up to 4k@60 hz
- Gigabit Ethernet PHY
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
.../boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 ++++++++++++++++++
1 file changed, 135 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
new file mode 100644
index 000000000000..6410ea5255dc
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 data sheet
+ * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ compatible = "radxa,cm5", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&pd_gpu {
+ domain-supply = <&vdd_gpu_s0>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
--
2.43.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: FUKAUMI Naoki <naoki@radxa.com>
To: heiko@sntech.de
Cc: joseph.kogut@gmail.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, quentin.schulz@cherry.de, jonas@kwiboo.se,
kever.yang@rock-chips.com, i@next.chainsx.cn,
honyuenkwun@gmail.com, inindev@gmail.com,
michael.opdenacker@rootcommit.com, dsimic@manjaro.org,
pbrobinson@gmail.com, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org,
FUKAUMI Naoki <naoki@radxa.com>
Subject: [RESEND PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5
Date: Tue, 2 Dec 2025 05:27:01 +0000 [thread overview]
Message-ID: <20251202052702.155523-3-naoki@radxa.com> (raw)
In-Reply-To: <20251202052702.155523-1-naoki@radxa.com>
From: Joseph Kogut <joseph.kogut@gmail.com>
From: Joseph Kogut <joseph.kogut@gmail.com>
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
proprietary connector.
Specification:
- Rockchip RK3588
- Up to 32 GB LPDDR4X
- Up to 128 GB eMMC
- 1x HDMI TX up to 8k@60 hz
- 1x eDP TX up to 4k@60 hz
- Gigabit Ethernet PHY
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
.../boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 135 ++++++++++++++++++
1 file changed, 135 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
new file mode 100644
index 000000000000..6410ea5255dc
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 data sheet
+ * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ compatible = "radxa,cm5", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&pd_gpu {
+ domain-supply = <&vdd_gpu_s0>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
--
2.43.0
next prev parent reply other threads:[~2025-12-02 5:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-02 5:26 [RESEND PATCH v5 0/3] Add Radxa CM5 module and IO board dts FUKAUMI Naoki
2025-12-02 5:26 ` FUKAUMI Naoki
2025-12-02 5:27 ` [RESEND PATCH v5 1/3] dt-bindings: arm: rockchip: Add Radxa CM5 IO board FUKAUMI Naoki
2025-12-02 5:27 ` FUKAUMI Naoki
2025-12-02 7:45 ` Krzysztof Kozlowski
2025-12-02 7:45 ` Krzysztof Kozlowski
2025-12-02 8:33 ` FUKAUMI Naoki
2025-12-02 8:33 ` FUKAUMI Naoki
2025-12-02 10:54 ` Krzysztof Kozlowski
2025-12-02 10:54 ` Krzysztof Kozlowski
2025-12-02 11:03 ` FUKAUMI Naoki
2025-12-02 11:03 ` FUKAUMI Naoki
2025-12-02 5:27 ` FUKAUMI Naoki [this message]
2025-12-02 5:27 ` [RESEND PATCH v5 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 FUKAUMI Naoki
2025-12-02 5:27 ` [RESEND PATCH v5 3/3] arm64: dts: rockchip: Add support for CM5 IO carrier FUKAUMI Naoki
2025-12-02 5:27 ` FUKAUMI Naoki
2025-12-02 8:30 ` Michael Opdenacker
2025-12-02 8:30 ` Michael Opdenacker
2025-12-02 8:37 ` FUKAUMI Naoki
2025-12-02 8:37 ` FUKAUMI Naoki
2025-12-02 5:33 ` [RESEND PATCH v5 0/3] Add Radxa CM5 module and IO board dts FUKAUMI Naoki
2025-12-02 5:33 ` FUKAUMI Naoki
2025-12-02 5:48 ` FUKAUMI Naoki
2025-12-02 5:48 ` FUKAUMI Naoki
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