[RFC PATCH 15/25] target/riscv/debug: Insert breakpoints after migration

[Nicholas Piggin <npiggin@gmail.com>]

After migration, TCG breakpoints should be re-established based
on debug register state.

icount trigger timer in the icount_enabled() path is also missing,
but that path will be removed subsequently so don't bother to fix
it.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 target/riscv/debug.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/target/riscv/debug.c b/target/riscv/debug.c
index 24161fd46b..a30b345b25 100644
--- a/target/riscv/debug.c
+++ b/target/riscv/debug.c
@@ -1126,6 +1126,20 @@ void riscv_cpu_debug_change_priv(CPURISCVState *env)
 
 void riscv_cpu_debug_post_load(CPURISCVState *env)
 {
+    for (int i = 0; i < RV_MAX_TRIGGERS; i++) {
+        int trigger_type = get_trigger_type(env, i);
+
+        switch (trigger_type) {
+        case TRIGGER_TYPE_AD_MATCH:
+            type2_breakpoint_insert(env, i);
+            break;
+        case TRIGGER_TYPE_AD_MATCH6:
+            type6_breakpoint_insert(env, i);
+            break;
+        default:
+            break;
+        }
+    }
     if (!icount_enabled()) {
         env->itrigger_enabled = riscv_itrigger_enabled(env);
     }
-- 
2.51.0