* [PATCH v2 01/11] hw/misc/aspeed_scu: Remove unused SoC silicon revision definitions
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 5:10 ` [PATCH v2 02/11] hw/misc/aspeed_scu: Add AST2700 A2 silicon revisions Jamin Lin
` (9 subsequent siblings)
10 siblings, 0 replies; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com,
Cédric Le Goater
Several legacy Aspeed SoC silicon revision definitions are no longer
used by any machine models or runtime logic.
Remove unused silicon revision macros and corresponding entries from
the silicon revision table to reduce dead code and improve
maintainability.
No functional change intended.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/misc/aspeed_scu.h | 10 ----------
hw/misc/aspeed_scu.c | 10 ----------
2 files changed, 20 deletions(-)
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 9e28bd4d2e..313a79f2f7 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -41,22 +41,12 @@ struct AspeedSCUState {
uint32_t hw_prot_key;
};
-#define AST2400_A0_SILICON_REV 0x02000303U
#define AST2400_A1_SILICON_REV 0x02010303U
-#define AST2500_A0_SILICON_REV 0x04000303U
#define AST2500_A1_SILICON_REV 0x04010303U
-#define AST2600_A0_SILICON_REV 0x05000303U
-#define AST2600_A1_SILICON_REV 0x05010303U
-#define AST2600_A2_SILICON_REV 0x05020303U
#define AST2600_A3_SILICON_REV 0x05030303U
-#define AST1030_A0_SILICON_REV 0x80000000U
#define AST1030_A1_SILICON_REV 0x80010000U
#define AST1060_A2_SILICON_REV 0xA0030000U
-#define AST2700_A0_SILICON_REV 0x06000103U
-#define AST2720_A0_SILICON_REV 0x06000203U
-#define AST2750_A0_SILICON_REV 0x06000003U
#define AST2700_A1_SILICON_REV 0x06010103U
-#define AST2750_A1_SILICON_REV 0x06010003U
#define ASPEED_IS_AST2500(si_rev) ((((si_rev) >> 24) & 0xff) == 0x04)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 6829efa2dc..0edf9c1b16 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -555,22 +555,12 @@ static void aspeed_scu_reset(DeviceState *dev)
}
static uint32_t aspeed_silicon_revs[] = {
- AST2400_A0_SILICON_REV,
AST2400_A1_SILICON_REV,
- AST2500_A0_SILICON_REV,
AST2500_A1_SILICON_REV,
- AST2600_A0_SILICON_REV,
- AST2600_A1_SILICON_REV,
- AST2600_A2_SILICON_REV,
AST2600_A3_SILICON_REV,
- AST1030_A0_SILICON_REV,
AST1030_A1_SILICON_REV,
AST1060_A2_SILICON_REV,
- AST2700_A0_SILICON_REV,
- AST2720_A0_SILICON_REV,
- AST2750_A0_SILICON_REV,
AST2700_A1_SILICON_REV,
- AST2750_A1_SILICON_REV,
};
bool is_supported_silicon_rev(uint32_t silicon_rev)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 02/11] hw/misc/aspeed_scu: Add AST2700 A2 silicon revisions
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
2026-02-10 5:10 ` [PATCH v2 01/11] hw/misc/aspeed_scu: Remove unused SoC silicon revision definitions Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 5:10 ` [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support Jamin Lin
` (8 subsequent siblings)
10 siblings, 0 replies; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com,
Cédric Le Goater
Add silicon revision definitions for AST2700 A2, and include
them in the list of supported Aspeed silicon revisions.
This allows newer AST27x0 A2 silicon to be correctly identified via
the SCU silicon revision register.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/misc/aspeed_scu.h | 1 +
hw/misc/aspeed_scu.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 313a79f2f7..d003955428 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -47,6 +47,7 @@ struct AspeedSCUState {
#define AST1030_A1_SILICON_REV 0x80010000U
#define AST1060_A2_SILICON_REV 0xA0030000U
#define AST2700_A1_SILICON_REV 0x06010103U
+#define AST2700_A2_SILICON_REV 0x06020103U
#define ASPEED_IS_AST2500(si_rev) ((((si_rev) >> 24) & 0xff) == 0x04)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 0edf9c1b16..e4160356e4 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -561,6 +561,7 @@ static uint32_t aspeed_silicon_revs[] = {
AST1030_A1_SILICON_REV,
AST1060_A2_SILICON_REV,
AST2700_A1_SILICON_REV,
+ AST2700_A2_SILICON_REV,
};
bool is_supported_silicon_rev(uint32_t silicon_rev)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
2026-02-10 5:10 ` [PATCH v2 01/11] hw/misc/aspeed_scu: Remove unused SoC silicon revision definitions Jamin Lin
2026-02-10 5:10 ` [PATCH v2 02/11] hw/misc/aspeed_scu: Add AST2700 A2 silicon revisions Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 7:14 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 04/11] hw/arm/aspeed_ast27x0_evb: Add AST2700 A2 EVB machine Jamin Lin
` (7 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
AST2700 A2 is functionally identical to AST2700 A1.
There are no changes to the IRQ layout, memory map, or peripheral
configuration. The only difference is the silicon revision.
This commit introduces a dedicated AST2700 A2 SoC type by reusing
the existing AST2700 A1 implementation and setting the A2 silicon
revision accordingly.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 61790ea1cc..87dcb82e1b 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -1166,6 +1166,36 @@ static void aspeed_soc_ast2700a1_class_init(ObjectClass *oc, const void *data)
sc->memmap = aspeed_soc_ast2700_memmap;
}
+static void aspeed_soc_ast2700a2_class_init(ObjectClass *oc, const void *data)
+{
+ static const char * const valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a35"),
+ NULL
+ };
+ DeviceClass *dc = DEVICE_CLASS(oc);
+ AspeedSoCClass *sc = ASPEED_SOC_CLASS(oc);
+
+ /* Reason: The Aspeed SoC can only be instantiated from a board */
+ dc->user_creatable = false;
+ dc->realize = aspeed_soc_ast2700_realize;
+
+ sc->valid_cpu_types = valid_cpu_types;
+ sc->silicon_rev = AST2700_A2_SILICON_REV;
+ sc->sram_size = 0x20000;
+ sc->pcie_num = 3;
+ sc->spis_num = 3;
+ sc->sgpio_num = 2;
+ sc->ehcis_num = 4;
+ sc->wdts_num = 8;
+ sc->macs_num = 3;
+ sc->uarts_num = 13;
+ sc->num_cpus = 4;
+ sc->ioexp_num = 2;
+ sc->uarts_base = ASPEED_DEV_UART0;
+ sc->irqmap = aspeed_soc_ast2700a1_irqmap;
+ sc->memmap = aspeed_soc_ast2700_memmap;
+}
+
static const TypeInfo aspeed_soc_ast27x0_types[] = {
{
.name = TYPE_ASPEED27X0_SOC,
@@ -1179,6 +1209,12 @@ static const TypeInfo aspeed_soc_ast27x0_types[] = {
.instance_init = aspeed_soc_ast2700_init,
.class_init = aspeed_soc_ast2700a1_class_init,
},
+ {
+ .name = "ast2700-a2",
+ .parent = TYPE_ASPEED27X0_SOC,
+ .instance_init = aspeed_soc_ast2700_init,
+ .class_init = aspeed_soc_ast2700a2_class_init,
+ },
};
DEFINE_TYPES(aspeed_soc_ast27x0_types)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support
2026-02-10 5:10 ` [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support Jamin Lin
@ 2026-02-10 7:14 ` Cédric Le Goater
2026-02-10 19:25 ` Nabih Estefan
0 siblings, 1 reply; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 7:14 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> AST2700 A2 is functionally identical to AST2700 A1.
> There are no changes to the IRQ layout, memory map, or peripheral
> configuration. The only difference is the silicon revision.
>
> This commit introduces a dedicated AST2700 A2 SoC type by reusing
> the existing AST2700 A1 implementation and setting the A2 silicon
> revision accordingly.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0.c | 36 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 61790ea1cc..87dcb82e1b 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -1166,6 +1166,36 @@ static void aspeed_soc_ast2700a1_class_init(ObjectClass *oc, const void *data)
> sc->memmap = aspeed_soc_ast2700_memmap;
> }
>
> +static void aspeed_soc_ast2700a2_class_init(ObjectClass *oc, const void *data)
> +{
> + static const char * const valid_cpu_types[] = {
> + ARM_CPU_TYPE_NAME("cortex-a35"),
> + NULL
> + };
> + DeviceClass *dc = DEVICE_CLASS(oc);
> + AspeedSoCClass *sc = ASPEED_SOC_CLASS(oc);
> +
> + /* Reason: The Aspeed SoC can only be instantiated from a board */
> + dc->user_creatable = false;
> + dc->realize = aspeed_soc_ast2700_realize;
> +
> + sc->valid_cpu_types = valid_cpu_types;
> + sc->silicon_rev = AST2700_A2_SILICON_REV;
> + sc->sram_size = 0x20000;
> + sc->pcie_num = 3;
> + sc->spis_num = 3;
> + sc->sgpio_num = 2;
> + sc->ehcis_num = 4;
> + sc->wdts_num = 8;
> + sc->macs_num = 3;
> + sc->uarts_num = 13;
> + sc->num_cpus = 4;
> + sc->ioexp_num = 2;
> + sc->uarts_base = ASPEED_DEV_UART0;
> + sc->irqmap = aspeed_soc_ast2700a1_irqmap;
> + sc->memmap = aspeed_soc_ast2700_memmap;
> +}
> +
> static const TypeInfo aspeed_soc_ast27x0_types[] = {
> {
> .name = TYPE_ASPEED27X0_SOC,
> @@ -1179,6 +1209,12 @@ static const TypeInfo aspeed_soc_ast27x0_types[] = {
> .instance_init = aspeed_soc_ast2700_init,
> .class_init = aspeed_soc_ast2700a1_class_init,
> },
> + {
> + .name = "ast2700-a2",
> + .parent = TYPE_ASPEED27X0_SOC,
> + .instance_init = aspeed_soc_ast2700_init,
> + .class_init = aspeed_soc_ast2700a2_class_init,
> + },
> };
>
> DEFINE_TYPES(aspeed_soc_ast27x0_types)
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support
2026-02-10 7:14 ` Cédric Le Goater
@ 2026-02-10 19:25 ` Nabih Estefan
0 siblings, 0 replies; 21+ messages in thread
From: Nabih Estefan @ 2026-02-10 19:25 UTC (permalink / raw)
To: Cédric Le Goater
Cc: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here, Troy Lee,
Kane Chen
On Mon, Feb 9, 2026 at 11:14 PM Cédric Le Goater <clg@kaod.org> wrote:
>
> On 2/10/26 06:10, Jamin Lin wrote:
> > AST2700 A2 is functionally identical to AST2700 A1.
> > There are no changes to the IRQ layout, memory map, or peripheral
> > configuration. The only difference is the silicon revision.
> >
> > This commit introduces a dedicated AST2700 A2 SoC type by reusing
> > the existing AST2700 A1 implementation and setting the A2 silicon
> > revision accordingly.
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> > hw/arm/aspeed_ast27x0.c | 36 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> > index 61790ea1cc..87dcb82e1b 100644
> > --- a/hw/arm/aspeed_ast27x0.c
> > +++ b/hw/arm/aspeed_ast27x0.c
> > @@ -1166,6 +1166,36 @@ static void aspeed_soc_ast2700a1_class_init(ObjectClass *oc, const void *data)
> > sc->memmap = aspeed_soc_ast2700_memmap;
> > }
> >
> > +static void aspeed_soc_ast2700a2_class_init(ObjectClass *oc, const void *data)
> > +{
> > + static const char * const valid_cpu_types[] = {
> > + ARM_CPU_TYPE_NAME("cortex-a35"),
> > + NULL
> > + };
> > + DeviceClass *dc = DEVICE_CLASS(oc);
> > + AspeedSoCClass *sc = ASPEED_SOC_CLASS(oc);
> > +
> > + /* Reason: The Aspeed SoC can only be instantiated from a board */
> > + dc->user_creatable = false;
> > + dc->realize = aspeed_soc_ast2700_realize;
> > +
> > + sc->valid_cpu_types = valid_cpu_types;
> > + sc->silicon_rev = AST2700_A2_SILICON_REV;
> > + sc->sram_size = 0x20000;
> > + sc->pcie_num = 3;
> > + sc->spis_num = 3;
> > + sc->sgpio_num = 2;
> > + sc->ehcis_num = 4;
> > + sc->wdts_num = 8;
> > + sc->macs_num = 3;
> > + sc->uarts_num = 13;
> > + sc->num_cpus = 4;
> > + sc->ioexp_num = 2;
> > + sc->uarts_base = ASPEED_DEV_UART0;
> > + sc->irqmap = aspeed_soc_ast2700a1_irqmap;
> > + sc->memmap = aspeed_soc_ast2700_memmap;
> > +}
> > +
> > static const TypeInfo aspeed_soc_ast27x0_types[] = {
> > {
> > .name = TYPE_ASPEED27X0_SOC,
> > @@ -1179,6 +1209,12 @@ static const TypeInfo aspeed_soc_ast27x0_types[] = {
> > .instance_init = aspeed_soc_ast2700_init,
> > .class_init = aspeed_soc_ast2700a1_class_init,
> > },
> > + {
> > + .name = "ast2700-a2",
> > + .parent = TYPE_ASPEED27X0_SOC,
> > + .instance_init = aspeed_soc_ast2700_init,
> > + .class_init = aspeed_soc_ast2700a2_class_init,
> > + },
> > };
> >
> > DEFINE_TYPES(aspeed_soc_ast27x0_types)
>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>
> Thanks,
>
> C.
>
>
Technically applies to the whole patchset, but specifically pointing
our internal machines to use this SoC so sending it to the relevant
patch.
Machines boot and work as intended once the SoC is updated, thank you Jamin!
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Thanks,
Nabih
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 04/11] hw/arm/aspeed_ast27x0_evb: Add AST2700 A2 EVB machine
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (2 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 03/11] hw/arm/aspeed_ast27x0: Add AST2700 A2 SoC support Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 7:15 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 05/11] hw/arm/aspeed_ast27x0_evb: Move ast2700-evb alias to AST2700 A2 EVB Jamin Lin
` (6 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
Add a new AST2700 A2 EVB machine to model the newer A2 silicon.
The ast2700a2-evb machine is largely identical to ast2700a1-evb.
The only difference is the default DRAM size, which is increased
to 2 GB.
This change adds a dedicated ast2700a2-evb machine by copying the
existing ast2700a1-evb configuration and updating the DRAM size
accordingly.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0_evb.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
index 31f7d61117..32d944848e 100644
--- a/hw/arm/aspeed_ast27x0_evb.c
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -50,12 +50,39 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
+static void aspeed_machine_ast2700a2_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2700 A2 EVB (Cortex-A35)";
+ amc->soc_name = "ast2700-a2";
+ amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
+ amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
+ amc->fmc_model = "w25q01jvq";
+ amc->spi_model = "w25q512jv";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
+ amc->uart_default = ASPEED_DEV_UART12;
+ amc->i2c_init = ast2700_evb_i2c_init;
+ amc->vbootrom = true;
+ mc->default_ram_size = 2 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
static const TypeInfo aspeed_ast27x0_evb_types[] = {
{
.name = MACHINE_TYPE_NAME("ast2700a1-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a1_evb_class_init,
.interfaces = aarch64_machine_interfaces,
+ },
+ {
+ .name = MACHINE_TYPE_NAME("ast2700a2-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2700a2_evb_class_init,
+ .interfaces = aarch64_machine_interfaces,
}
};
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 04/11] hw/arm/aspeed_ast27x0_evb: Add AST2700 A2 EVB machine
2026-02-10 5:10 ` [PATCH v2 04/11] hw/arm/aspeed_ast27x0_evb: Add AST2700 A2 EVB machine Jamin Lin
@ 2026-02-10 7:15 ` Cédric Le Goater
0 siblings, 0 replies; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 7:15 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> Add a new AST2700 A2 EVB machine to model the newer A2 silicon.
>
> The ast2700a2-evb machine is largely identical to ast2700a1-evb.
> The only difference is the default DRAM size, which is increased
> to 2 GB.
>
> This change adds a dedicated ast2700a2-evb machine by copying the
> existing ast2700a1-evb configuration and updating the DRAM size
> accordingly.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0_evb.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
> index 31f7d61117..32d944848e 100644
> --- a/hw/arm/aspeed_ast27x0_evb.c
> +++ b/hw/arm/aspeed_ast27x0_evb.c
> @@ -50,12 +50,39 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
> aspeed_machine_class_init_cpus_defaults(mc);
> }
>
> +static void aspeed_machine_ast2700a2_evb_class_init(ObjectClass *oc,
> + const void *data)
> +{
> + MachineClass *mc = MACHINE_CLASS(oc);
> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> + mc->desc = "Aspeed AST2700 A2 EVB (Cortex-A35)";
> + amc->soc_name = "ast2700-a2";
> + amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
> + amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
> + amc->fmc_model = "w25q01jvq";
> + amc->spi_model = "w25q512jv";
> + amc->num_cs = 2;
> + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
> + amc->uart_default = ASPEED_DEV_UART12;
> + amc->i2c_init = ast2700_evb_i2c_init;
> + amc->vbootrom = true;
> + mc->default_ram_size = 2 * GiB;
> + aspeed_machine_class_init_cpus_defaults(mc);
> +}
> +
> static const TypeInfo aspeed_ast27x0_evb_types[] = {
> {
> .name = MACHINE_TYPE_NAME("ast2700a1-evb"),
> .parent = TYPE_ASPEED_MACHINE,
> .class_init = aspeed_machine_ast2700a1_evb_class_init,
> .interfaces = aarch64_machine_interfaces,
> + },
> + {
> + .name = MACHINE_TYPE_NAME("ast2700a2-evb"),
> + .parent = TYPE_ASPEED_MACHINE,
> + .class_init = aspeed_machine_ast2700a2_evb_class_init,
> + .interfaces = aarch64_machine_interfaces,
> }
> };
>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 05/11] hw/arm/aspeed_ast27x0_evb: Move ast2700-evb alias to AST2700 A2 EVB
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (3 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 04/11] hw/arm/aspeed_ast27x0_evb: Add AST2700 A2 EVB machine Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 15:11 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 06/11] tests/qtest/ast2700-hace-test: Use ast2700-evb alias for AST2700 HACE tests Jamin Lin
` (5 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
Make AST2700 A2 EVB the default ast2700-evb machine.
The "ast2700-evb" machine alias is moved from the AST2700 A1 EVB
to the AST2700 A2 EVB, making A2 the default evaluation board
for AST2700.
This ensures that users selecting "ast2700-evb" will run on the
latest AST2700 silicon revision. The AST2700 A1 EVB machine
remains available explicitly as "ast2700a1-evb".
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0_evb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
index 32d944848e..0ff1bebeb0 100644
--- a/hw/arm/aspeed_ast27x0_evb.c
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -34,7 +34,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
MachineClass *mc = MACHINE_CLASS(oc);
AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
- mc->alias = "ast2700-evb";
mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)";
amc->soc_name = "ast2700-a1";
amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
@@ -56,6 +55,7 @@ static void aspeed_machine_ast2700a2_evb_class_init(ObjectClass *oc,
MachineClass *mc = MACHINE_CLASS(oc);
AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+ mc->alias = "ast2700-evb";
mc->desc = "Aspeed AST2700 A2 EVB (Cortex-A35)";
amc->soc_name = "ast2700-a2";
amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 05/11] hw/arm/aspeed_ast27x0_evb: Move ast2700-evb alias to AST2700 A2 EVB
2026-02-10 5:10 ` [PATCH v2 05/11] hw/arm/aspeed_ast27x0_evb: Move ast2700-evb alias to AST2700 A2 EVB Jamin Lin
@ 2026-02-10 15:11 ` Cédric Le Goater
0 siblings, 0 replies; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 15:11 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> Make AST2700 A2 EVB the default ast2700-evb machine.
>
> The "ast2700-evb" machine alias is moved from the AST2700 A1 EVB
> to the AST2700 A2 EVB, making A2 the default evaluation board
> for AST2700.
>
> This ensures that users selecting "ast2700-evb" will run on the
> latest AST2700 silicon revision. The AST2700 A1 EVB machine
> remains available explicitly as "ast2700a1-evb".
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0_evb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
> index 32d944848e..0ff1bebeb0 100644
> --- a/hw/arm/aspeed_ast27x0_evb.c
> +++ b/hw/arm/aspeed_ast27x0_evb.c
> @@ -34,7 +34,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
> MachineClass *mc = MACHINE_CLASS(oc);
> AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>
> - mc->alias = "ast2700-evb";
> mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)";
> amc->soc_name = "ast2700-a1";
> amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
> @@ -56,6 +55,7 @@ static void aspeed_machine_ast2700a2_evb_class_init(ObjectClass *oc,
> MachineClass *mc = MACHINE_CLASS(oc);
> AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>
> + mc->alias = "ast2700-evb";
> mc->desc = "Aspeed AST2700 A2 EVB (Cortex-A35)";
> amc->soc_name = "ast2700-a2";
> amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 06/11] tests/qtest/ast2700-hace-test: Use ast2700-evb alias for AST2700 HACE tests
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (4 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 05/11] hw/arm/aspeed_ast27x0_evb: Move ast2700-evb alias to AST2700 A2 EVB Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 5:10 ` [PATCH v2 07/11] tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime Jamin Lin
` (4 subsequent siblings)
10 siblings, 0 replies; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com,
Cédric Le Goater
Update AST2700 HACE qtests to use the "ast2700-evb" machine alias
instead of a specific silicon revision.
The AST2700 A1 and A2 revisions are compatible for the HACE model, so
the tests do not depend on a particular EVB revision. Using the
"ast2700-evb" alias ensures the tests always run the latest
supported AST2700 silicon revision.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
tests/qtest/ast2700-hace-test.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/tests/qtest/ast2700-hace-test.c b/tests/qtest/ast2700-hace-test.c
index a400e2962b..508a34dd6c 100644
--- a/tests/qtest/ast2700-hace-test.c
+++ b/tests/qtest/ast2700-hace-test.c
@@ -23,57 +23,57 @@ static const struct AspeedMasks as2700_masks = {
/* ast2700 */
static void test_md5_ast2700(void)
{
- aspeed_test_md5("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_md5("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha256_ast2700(void)
{
- aspeed_test_sha256("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha256("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha256_sg_ast2700(void)
{
- aspeed_test_sha256_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha256_sg("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha384_ast2700(void)
{
- aspeed_test_sha384("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha384("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha384_sg_ast2700(void)
{
- aspeed_test_sha384_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha384_sg("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha512_ast2700(void)
{
- aspeed_test_sha512("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha512("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha512_sg_ast2700(void)
{
- aspeed_test_sha512_sg("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha512_sg("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha256_accum_ast2700(void)
{
- aspeed_test_sha256_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha256_accum("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha384_accum_ast2700(void)
{
- aspeed_test_sha384_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha384_accum("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_sha512_accum_ast2700(void)
{
- aspeed_test_sha512_accum("-machine ast2700a1-evb", 0x12070000, 0x400000000);
+ aspeed_test_sha512_accum("-machine ast2700-evb", 0x12070000, 0x400000000);
}
static void test_addresses_ast2700(void)
{
- aspeed_test_addresses("-machine ast2700a1-evb", 0x12070000, &as2700_masks);
+ aspeed_test_addresses("-machine ast2700-evb", 0x12070000, &as2700_masks);
}
int main(int argc, char **argv)
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v2 07/11] tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (5 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 06/11] tests/qtest/ast2700-hace-test: Use ast2700-evb alias for AST2700 HACE tests Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 7:15 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests Jamin Lin
` (3 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
Adding additional test cases to test_aspeed_ast2700.py makes the test
suite significantly larger and increases the overall test runtime.
To keep testing efficient and better scoped, rename the existing test
to test_aspeed_ast2700a1.py and dedicate it to AST2700 A1 specific tests.
A new test_aspeed_ast2700.py will be introduced later to always cover
the latest revision of the AST2700 SoC.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/aarch64/meson.build | 4 ++--
.../{test_aspeed_ast2700.py => test_aspeed_ast2700a1.py} | 0
2 files changed, 2 insertions(+), 2 deletions(-)
rename tests/functional/aarch64/{test_aspeed_ast2700.py => test_aspeed_ast2700a1.py} (100%)
diff --git a/tests/functional/aarch64/meson.build b/tests/functional/aarch64/meson.build
index 5ad52f93e1..b5dd674bac 100644
--- a/tests/functional/aarch64/meson.build
+++ b/tests/functional/aarch64/meson.build
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later
test_aarch64_timeouts = {
- 'aspeed_ast2700' : 600,
+ 'aspeed_ast2700a1' : 600,
'aspeed_ast2700fc' : 600,
'device_passthrough' : 720,
'imx8mp_evk' : 240,
@@ -23,7 +23,7 @@ tests_aarch64_system_quick = [
]
tests_aarch64_system_thorough = [
- 'aspeed_ast2700',
+ 'aspeed_ast2700a1',
'aspeed_ast2700fc',
'device_passthrough',
'hotplug_pci',
diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py b/tests/functional/aarch64/test_aspeed_ast2700a1.py
similarity index 100%
rename from tests/functional/aarch64/test_aspeed_ast2700.py
rename to tests/functional/aarch64/test_aspeed_ast2700a1.py
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 07/11] tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime
2026-02-10 5:10 ` [PATCH v2 07/11] tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime Jamin Lin
@ 2026-02-10 7:15 ` Cédric Le Goater
0 siblings, 0 replies; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 7:15 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> Adding additional test cases to test_aspeed_ast2700.py makes the test
> suite significantly larger and increases the overall test runtime.
>
> To keep testing efficient and better scoped, rename the existing test
> to test_aspeed_ast2700a1.py and dedicate it to AST2700 A1 specific tests.
>
> A new test_aspeed_ast2700.py will be introduced later to always cover
> the latest revision of the AST2700 SoC.
>
> No functional change.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/functional/aarch64/meson.build | 4 ++--
> .../{test_aspeed_ast2700.py => test_aspeed_ast2700a1.py} | 0
> 2 files changed, 2 insertions(+), 2 deletions(-)
> rename tests/functional/aarch64/{test_aspeed_ast2700.py => test_aspeed_ast2700a1.py} (100%)
>
> diff --git a/tests/functional/aarch64/meson.build b/tests/functional/aarch64/meson.build
> index 5ad52f93e1..b5dd674bac 100644
> --- a/tests/functional/aarch64/meson.build
> +++ b/tests/functional/aarch64/meson.build
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0-or-later
>
> test_aarch64_timeouts = {
> - 'aspeed_ast2700' : 600,
> + 'aspeed_ast2700a1' : 600,
> 'aspeed_ast2700fc' : 600,
> 'device_passthrough' : 720,
> 'imx8mp_evk' : 240,
> @@ -23,7 +23,7 @@ tests_aarch64_system_quick = [
> ]
>
> tests_aarch64_system_thorough = [
> - 'aspeed_ast2700',
> + 'aspeed_ast2700a1',
> 'aspeed_ast2700fc',
> 'device_passthrough',
> 'hotplug_pci',
> diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py b/tests/functional/aarch64/test_aspeed_ast2700a1.py
> similarity index 100%
> rename from tests/functional/aarch64/test_aspeed_ast2700.py
> rename to tests/functional/aarch64/test_aspeed_ast2700a1.py
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (6 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 07/11] tests/functional/aarch64/test_aspeed_ast2700: Rename AST2700 A1 test to reduce test runtime Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 15:15 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 09/11] hw/arm/aspeed_ast27x0-fc: Switch AST2700 FC machine to A2 SoC Jamin Lin
` (2 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
Add functional coverage for the AST2700 A2 EVB machine by introducing
test cases that boot and validate an OpenBMC SDK v11.00 image on
"ast2700a2-evb".
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/aarch64/meson.build | 2 +
.../functional/aarch64/test_aspeed_ast2700.py | 190 ++++++++++++++++++
2 files changed, 192 insertions(+)
create mode 100644 tests/functional/aarch64/test_aspeed_ast2700.py
diff --git a/tests/functional/aarch64/meson.build b/tests/functional/aarch64/meson.build
index b5dd674bac..1bf0a30a9b 100644
--- a/tests/functional/aarch64/meson.build
+++ b/tests/functional/aarch64/meson.build
@@ -3,6 +3,7 @@
test_aarch64_timeouts = {
'aspeed_ast2700a1' : 600,
'aspeed_ast2700fc' : 600,
+ 'aspeed_ast2700' : 600,
'device_passthrough' : 720,
'imx8mp_evk' : 240,
'raspi4' : 480,
@@ -25,6 +26,7 @@ tests_aarch64_system_quick = [
tests_aarch64_system_thorough = [
'aspeed_ast2700a1',
'aspeed_ast2700fc',
+ 'aspeed_ast2700',
'device_passthrough',
'hotplug_pci',
'imx8mp_evk',
diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py b/tests/functional/aarch64/test_aspeed_ast2700.py
new file mode 100644
index 0000000000..64f0a5abe4
--- /dev/null
+++ b/tests/functional/aarch64/test_aspeed_ast2700.py
@@ -0,0 +1,190 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots the ASPEED SoCs with firmware
+#
+# Copyright (C) 2022 ASPEED Technology Inc
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+import os
+
+from qemu_test import QemuSystemTest, Asset
+from qemu_test import wait_for_console_pattern, exec_command
+from qemu_test import exec_command_and_wait_for_pattern
+
+
+class AST2x00MachineSDK(QemuSystemTest):
+
+ def do_test_aarch64_aspeed_sdk_start(self, image, bus_id):
+ bus_str = str(bus_id)
+ self.require_netdev('user')
+ self.vm.set_console()
+ self.vm.add_args(
+ '-device',
+ f'tmp105,'
+ f'bus=aspeed.i2c.bus.{bus_str},'
+ f'address=0x4d,'
+ f'id=tmp-test-{bus_str}'
+ )
+ self.vm.add_args('-drive', 'file=' + image + ',if=mtd,format=raw',
+ '-net', 'nic', '-net', 'user', '-snapshot')
+
+ self.vm.launch()
+
+ def verify_vbootrom_firmware_flow(self):
+ wait_for_console_pattern(self, 'Found valid caliptra flash image')
+ wait_for_console_pattern(self, 'Check flash image checksum')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Read abb header')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Read soc manifest')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Load atf image')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Load optee image')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Load uboot image')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Load ssp image')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Load tsp image')
+ wait_for_console_pattern(self, 'pass')
+ wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
+
+ def enable_ast2700_pcie2(self):
+ wait_for_console_pattern(self, 'Hit any key to stop autoboot')
+ exec_command_and_wait_for_pattern(self, '\012', '=>')
+ exec_command_and_wait_for_pattern(self,
+ 'cp 100420000 403000000 900000', '=>')
+ exec_command_and_wait_for_pattern(self,
+ 'bootm start 403000000', '=>')
+ exec_command_and_wait_for_pattern(self, 'bootm loados', '=>')
+ exec_command_and_wait_for_pattern(self, 'bootm ramdisk', '=>')
+ exec_command_and_wait_for_pattern(self, 'bootm prep', '=>')
+ exec_command_and_wait_for_pattern(self,
+ 'fdt set /soc@14000000/pcie@140d0000 status "okay"', '=>')
+ exec_command(self, 'bootm go')
+
+ def verify_openbmc_boot_start(self, enable_pcie=True):
+ wait_for_console_pattern(self, 'U-Boot 2023.10')
+ if enable_pcie:
+ self.enable_ast2700_pcie2()
+ wait_for_console_pattern(self, 'Linux version ')
+
+ def verify_openbmc_boot_and_login(self, name, enable_pcie=True):
+ self.verify_openbmc_boot_start(enable_pcie)
+
+ wait_for_console_pattern(self, f'{name} login:')
+ exec_command_and_wait_for_pattern(self, 'root', 'Password:')
+ exec_command_and_wait_for_pattern(self, '0penBmc', f'root@{name}:~#')
+
+ ASSET_SDK_V1100_AST2700 = Asset(
+ 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-default-obmc.tar.gz',
+ 'e2b8f043fe8063dd3b6ded93422e38bd41914dc9c3202199507652df024de4dc')
+
+ ASSET_SDK_V1100_AST2700_DCSCM = Asset(
+ 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-dcscm-obmc.tar.gz',
+ '0e93f7976139da71fab9df7952a58bdd80650e23e7abf5853b0eb6695deb02d0')
+
+ def do_ast2700_i2c_test(self, bus_id):
+ bus_str = str(bus_id)
+ exec_command_and_wait_for_pattern(self,
+ 'echo lm75 0x4d > '
+ f'/sys/class/i2c-dev/i2c-{bus_str}/device/new_device ',
+ f'i2c i2c-{bus_str}: new_device: Instantiated device lm75 at 0x4d')
+ exec_command_and_wait_for_pattern(self,
+ f'cat /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
+ '0')
+ self.vm.cmd('qom-set', path=f'/machine/peripheral/tmp-test-{bus_str}',
+ property='temperature', value=18000)
+ exec_command_and_wait_for_pattern(self,
+ f'cat /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
+ '18000')
+
+ def do_ast2700_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 0002:00:00.0',
+ '0002:00:00.0 PCI bridge: '
+ 'ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 0002:01:00.0',
+ '0002:01:00.0 Ethernet controller: '
+ 'Intel Corporation 82574L Gigabit Network Connection')
+ exec_command_and_wait_for_pattern(self,
+ 'ip addr show dev eth2',
+ 'inet 10.0.2.15/24')
+
+ def start_ast2700_test(self, name, bus_id):
+ num_cpu = 4
+ load_images_list = [
+ {
+ 'addr': '0x400000000',
+ 'file': self.scratch_file(name, 'u-boot.bin')
+ },
+ {
+ 'addr': '0x430000000',
+ 'file': self.scratch_file(name, 'bl31.bin')
+ },
+ {
+ 'addr': '0x430080000',
+ 'file': self.scratch_file(name, 'optee', 'tee-raw.bin')
+ }
+ ]
+
+ for load_image in load_images_list:
+ addr = load_image['addr']
+ file = load_image['file']
+ self.vm.add_args('-device',
+ f'loader,force-raw=on,addr={addr},file={file}')
+
+ for i in range(num_cpu):
+ self.vm.add_args('-device',
+ f'loader,addr=0x430000000,cpu-num={i}')
+
+ self.vm.add_args('-smp', str(num_cpu))
+ self.do_test_aarch64_aspeed_sdk_start(
+ self.scratch_file(name, 'image-bmc'), bus_id)
+
+ def start_ast2700_test_vbootrom(self, name, bus_id):
+ self.vm.add_args('-bios', 'ast27x0_bootrom.bin')
+ self.do_test_aarch64_aspeed_sdk_start(
+ self.scratch_file(name, 'image-bmc'), bus_id)
+
+ def test_aarch64_ast2700_evb_sdk_v11_00(self):
+ self.set_machine('ast2700a2-evb')
+ self.require_netdev('user')
+
+ self.archive_extract(self.ASSET_SDK_V1100_AST2700)
+ self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
+ self.vm.add_args('-netdev', 'user,id=net1')
+ self.start_ast2700_test('ast2700-default', 1)
+ self.verify_openbmc_boot_and_login('ast2700-default')
+ self.do_ast2700_i2c_test(1)
+ self.do_ast2700_pcie_test()
+
+ def test_aarch64_ast2700_evb_sdk_vbootrom_v11_00(self):
+ self.set_machine('ast2700a2-evb')
+ self.require_netdev('user')
+
+ self.archive_extract(self.ASSET_SDK_V1100_AST2700)
+ self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
+ self.vm.add_args('-netdev', 'user,id=net1')
+ self.start_ast2700_test_vbootrom('ast2700-default', 1)
+ self.verify_vbootrom_firmware_flow()
+ self.verify_openbmc_boot_start()
+
+ def test_aarch64_ast2700_evb_ioexp_v11_00(self):
+ self.set_machine('ast2700a2-evb')
+ self.require_netdev('user')
+
+ self.archive_extract(self.ASSET_SDK_V1100_AST2700_DCSCM)
+ self.vm.set_machine('ast2700a2-evb,fmc-model=w25q512jv')
+ self.vm.add_args('-device',
+ 'tmp105,bus=ioexp0.0,address=0x4d,id=tmp-test-16')
+ self.start_ast2700_test('ast2700-dcscm', 8)
+ self.verify_openbmc_boot_and_login('ast2700-dcscm', False)
+ self.do_ast2700_i2c_test(8)
+ self.do_ast2700_i2c_test(16)
+
+if __name__ == '__main__':
+ QemuSystemTest.main()
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests
2026-02-10 5:10 ` [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests Jamin Lin
@ 2026-02-10 15:15 ` Cédric Le Goater
2026-02-11 1:59 ` Jamin Lin
0 siblings, 1 reply; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 15:15 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> Add functional coverage for the AST2700 A2 EVB machine by introducing
> test cases that boot and validate an OpenBMC SDK v11.00 image on
> "ast2700a2-evb".
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/functional/aarch64/meson.build | 2 +
> .../functional/aarch64/test_aspeed_ast2700.py | 190 ++++++++++++++++++
> 2 files changed, 192 insertions(+)
> create mode 100644 tests/functional/aarch64/test_aspeed_ast2700.py
>
> diff --git a/tests/functional/aarch64/meson.build b/tests/functional/aarch64/meson.build
> index b5dd674bac..1bf0a30a9b 100644
> --- a/tests/functional/aarch64/meson.build
> +++ b/tests/functional/aarch64/meson.build
> @@ -3,6 +3,7 @@
> test_aarch64_timeouts = {
> 'aspeed_ast2700a1' : 600,
> 'aspeed_ast2700fc' : 600,
> + 'aspeed_ast2700' : 600,
> 'device_passthrough' : 720,
> 'imx8mp_evk' : 240,
> 'raspi4' : 480,
> @@ -25,6 +26,7 @@ tests_aarch64_system_quick = [
> tests_aarch64_system_thorough = [
> 'aspeed_ast2700a1',
> 'aspeed_ast2700fc',
> + 'aspeed_ast2700',
> 'device_passthrough',
> 'hotplug_pci',
> 'imx8mp_evk',
> diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py b/tests/functional/aarch64/test_aspeed_ast2700.py
> new file mode 100644
> index 0000000000..64f0a5abe4
> --- /dev/null
> +++ b/tests/functional/aarch64/test_aspeed_ast2700.py
Since this test file is only referring to the ast2700a2-evb machine,
you might as well rename it to "test_aspeed_ast2700a2.py".
Thanks,
C.
> @@ -0,0 +1,190 @@
> +#!/usr/bin/env python3
> +#
> +# Functional test that boots the ASPEED SoCs with firmware
> +#
> +# Copyright (C) 2022 ASPEED Technology Inc
> +#
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +import os
> +
> +from qemu_test import QemuSystemTest, Asset
> +from qemu_test import wait_for_console_pattern, exec_command
> +from qemu_test import exec_command_and_wait_for_pattern
> +
> +
> +class AST2x00MachineSDK(QemuSystemTest):
> +
> + def do_test_aarch64_aspeed_sdk_start(self, image, bus_id):
> + bus_str = str(bus_id)
> + self.require_netdev('user')
> + self.vm.set_console()
> + self.vm.add_args(
> + '-device',
> + f'tmp105,'
> + f'bus=aspeed.i2c.bus.{bus_str},'
> + f'address=0x4d,'
> + f'id=tmp-test-{bus_str}'
> + )
> + self.vm.add_args('-drive', 'file=' + image + ',if=mtd,format=raw',
> + '-net', 'nic', '-net', 'user', '-snapshot')
> +
> + self.vm.launch()
> +
> + def verify_vbootrom_firmware_flow(self):
> + wait_for_console_pattern(self, 'Found valid caliptra flash image')
> + wait_for_console_pattern(self, 'Check flash image checksum')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Read abb header')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Read soc manifest')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Load atf image')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Load optee image')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Load uboot image')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Load ssp image')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Load tsp image')
> + wait_for_console_pattern(self, 'pass')
> + wait_for_console_pattern(self, 'Jumping to BL31 (Trusted Firmware-A)')
> +
> + def enable_ast2700_pcie2(self):
> + wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> + exec_command_and_wait_for_pattern(self, '\012', '=>')
> + exec_command_and_wait_for_pattern(self,
> + 'cp 100420000 403000000 900000', '=>')
> + exec_command_and_wait_for_pattern(self,
> + 'bootm start 403000000', '=>')
> + exec_command_and_wait_for_pattern(self, 'bootm loados', '=>')
> + exec_command_and_wait_for_pattern(self, 'bootm ramdisk', '=>')
> + exec_command_and_wait_for_pattern(self, 'bootm prep', '=>')
> + exec_command_and_wait_for_pattern(self,
> + 'fdt set /soc@14000000/pcie@140d0000 status "okay"', '=>')
> + exec_command(self, 'bootm go')
> +
> + def verify_openbmc_boot_start(self, enable_pcie=True):
> + wait_for_console_pattern(self, 'U-Boot 2023.10')
> + if enable_pcie:
> + self.enable_ast2700_pcie2()
> + wait_for_console_pattern(self, 'Linux version ')
> +
> + def verify_openbmc_boot_and_login(self, name, enable_pcie=True):
> + self.verify_openbmc_boot_start(enable_pcie)
> +
> + wait_for_console_pattern(self, f'{name} login:')
> + exec_command_and_wait_for_pattern(self, 'root', 'Password:')
> + exec_command_and_wait_for_pattern(self, '0penBmc', f'root@{name}:~#')
> +
> + ASSET_SDK_V1100_AST2700 = Asset(
> + 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-default-obmc.tar.gz',
> + 'e2b8f043fe8063dd3b6ded93422e38bd41914dc9c3202199507652df024de4dc')
> +
> + ASSET_SDK_V1100_AST2700_DCSCM = Asset(
> + 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-dcscm-obmc.tar.gz',
> + '0e93f7976139da71fab9df7952a58bdd80650e23e7abf5853b0eb6695deb02d0')
> +
> + def do_ast2700_i2c_test(self, bus_id):
> + bus_str = str(bus_id)
> + exec_command_and_wait_for_pattern(self,
> + 'echo lm75 0x4d > '
> + f'/sys/class/i2c-dev/i2c-{bus_str}/device/new_device ',
> + f'i2c i2c-{bus_str}: new_device: Instantiated device lm75 at 0x4d')
> + exec_command_and_wait_for_pattern(self,
> + f'cat /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
> + '0')
> + self.vm.cmd('qom-set', path=f'/machine/peripheral/tmp-test-{bus_str}',
> + property='temperature', value=18000)
> + exec_command_and_wait_for_pattern(self,
> + f'cat /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
> + '18000')
> +
> + def do_ast2700_pcie_test(self):
> + exec_command_and_wait_for_pattern(self,
> + 'lspci -s 0002:00:00.0',
> + '0002:00:00.0 PCI bridge: '
> + 'ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
> + exec_command_and_wait_for_pattern(self,
> + 'lspci -s 0002:01:00.0',
> + '0002:01:00.0 Ethernet controller: '
> + 'Intel Corporation 82574L Gigabit Network Connection')
> + exec_command_and_wait_for_pattern(self,
> + 'ip addr show dev eth2',
> + 'inet 10.0.2.15/24')
> +
> + def start_ast2700_test(self, name, bus_id):
> + num_cpu = 4
> + load_images_list = [
> + {
> + 'addr': '0x400000000',
> + 'file': self.scratch_file(name, 'u-boot.bin')
> + },
> + {
> + 'addr': '0x430000000',
> + 'file': self.scratch_file(name, 'bl31.bin')
> + },
> + {
> + 'addr': '0x430080000',
> + 'file': self.scratch_file(name, 'optee', 'tee-raw.bin')
> + }
> + ]
> +
> + for load_image in load_images_list:
> + addr = load_image['addr']
> + file = load_image['file']
> + self.vm.add_args('-device',
> + f'loader,force-raw=on,addr={addr},file={file}')
> +
> + for i in range(num_cpu):
> + self.vm.add_args('-device',
> + f'loader,addr=0x430000000,cpu-num={i}')
> +
> + self.vm.add_args('-smp', str(num_cpu))
> + self.do_test_aarch64_aspeed_sdk_start(
> + self.scratch_file(name, 'image-bmc'), bus_id)
> +
> + def start_ast2700_test_vbootrom(self, name, bus_id):
> + self.vm.add_args('-bios', 'ast27x0_bootrom.bin')
> + self.do_test_aarch64_aspeed_sdk_start(
> + self.scratch_file(name, 'image-bmc'), bus_id)
> +
> + def test_aarch64_ast2700_evb_sdk_v11_00(self):
> + self.set_machine('ast2700a2-evb')
> + self.require_netdev('user')
> +
> + self.archive_extract(self.ASSET_SDK_V1100_AST2700)
> + self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
> + self.vm.add_args('-netdev', 'user,id=net1')
> + self.start_ast2700_test('ast2700-default', 1)
> + self.verify_openbmc_boot_and_login('ast2700-default')
> + self.do_ast2700_i2c_test(1)
> + self.do_ast2700_pcie_test()
> +
> + def test_aarch64_ast2700_evb_sdk_vbootrom_v11_00(self):
> + self.set_machine('ast2700a2-evb')
> + self.require_netdev('user')
> +
> + self.archive_extract(self.ASSET_SDK_V1100_AST2700)
> + self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
> + self.vm.add_args('-netdev', 'user,id=net1')
> + self.start_ast2700_test_vbootrom('ast2700-default', 1)
> + self.verify_vbootrom_firmware_flow()
> + self.verify_openbmc_boot_start()
> +
> + def test_aarch64_ast2700_evb_ioexp_v11_00(self):
> + self.set_machine('ast2700a2-evb')
> + self.require_netdev('user')
> +
> + self.archive_extract(self.ASSET_SDK_V1100_AST2700_DCSCM)
> + self.vm.set_machine('ast2700a2-evb,fmc-model=w25q512jv')
> + self.vm.add_args('-device',
> + 'tmp105,bus=ioexp0.0,address=0x4d,id=tmp-test-16')
> + self.start_ast2700_test('ast2700-dcscm', 8)
> + self.verify_openbmc_boot_and_login('ast2700-dcscm', False)
> + self.do_ast2700_i2c_test(8)
> + self.do_ast2700_i2c_test(16)
> +
> +if __name__ == '__main__':
> + QemuSystemTest.main()
^ permalink raw reply [flat|nested] 21+ messages in thread* RE: [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests
2026-02-10 15:15 ` Cédric Le Goater
@ 2026-02-11 1:59 ` Jamin Lin
0 siblings, 0 replies; 21+ messages in thread
From: Jamin Lin @ 2026-02-11 1:59 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
Hi Cédric,
> Subject: Re: [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700:
> Add AST2700 A2 EVB functional tests
>
> On 2/10/26 06:10, Jamin Lin wrote:
> > Add functional coverage for the AST2700 A2 EVB machine by introducing
> > test cases that boot and validate an OpenBMC SDK v11.00 image on
> > "ast2700a2-evb".
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> > tests/functional/aarch64/meson.build | 2 +
> > .../functional/aarch64/test_aspeed_ast2700.py | 190
> ++++++++++++++++++
> > 2 files changed, 192 insertions(+)
> > create mode 100644 tests/functional/aarch64/test_aspeed_ast2700.py
> >
> > diff --git a/tests/functional/aarch64/meson.build
> > b/tests/functional/aarch64/meson.build
> > index b5dd674bac..1bf0a30a9b 100644
> > --- a/tests/functional/aarch64/meson.build
> > +++ b/tests/functional/aarch64/meson.build
> > @@ -3,6 +3,7 @@
> > test_aarch64_timeouts = {
> > 'aspeed_ast2700a1' : 600,
> > 'aspeed_ast2700fc' : 600,
> > + 'aspeed_ast2700' : 600,
> > 'device_passthrough' : 720,
> > 'imx8mp_evk' : 240,
> > 'raspi4' : 480,
> > @@ -25,6 +26,7 @@ tests_aarch64_system_quick = [
> > tests_aarch64_system_thorough = [
> > 'aspeed_ast2700a1',
> > 'aspeed_ast2700fc',
> > + 'aspeed_ast2700',
> > 'device_passthrough',
> > 'hotplug_pci',
> > 'imx8mp_evk',
> > diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py
> > b/tests/functional/aarch64/test_aspeed_ast2700.py
> > new file mode 100644
> > index 0000000000..64f0a5abe4
> > --- /dev/null
> > +++ b/tests/functional/aarch64/test_aspeed_ast2700.py
>
>
> Since this test file is only referring to the ast2700a2-evb machine, you might as
> well rename it to "test_aspeed_ast2700a2.py".
>
Thanks for the review and suggestion.
Will update it in v3.
Thanks,
Jamin
>
>
>
>
>
> Thanks,
>
> C.
>
>
>
> > @@ -0,0 +1,190 @@
> > +#!/usr/bin/env python3
> > +#
> > +# Functional test that boots the ASPEED SoCs with firmware # #
> > +Copyright (C) 2022 ASPEED Technology Inc # # SPDX-License-Identifier:
> > +GPL-2.0-or-later
> > +
> > +import os
> > +
> > +from qemu_test import QemuSystemTest, Asset from qemu_test import
> > +wait_for_console_pattern, exec_command from qemu_test import
> > +exec_command_and_wait_for_pattern
> > +
> > +
> > +class AST2x00MachineSDK(QemuSystemTest):
> > +
> > + def do_test_aarch64_aspeed_sdk_start(self, image, bus_id):
> > + bus_str = str(bus_id)
> > + self.require_netdev('user')
> > + self.vm.set_console()
> > + self.vm.add_args(
> > + '-device',
> > + f'tmp105,'
> > + f'bus=aspeed.i2c.bus.{bus_str},'
> > + f'address=0x4d,'
> > + f'id=tmp-test-{bus_str}'
> > + )
> > + self.vm.add_args('-drive', 'file=' + image + ',if=mtd,format=raw',
> > + '-net', 'nic', '-net', 'user', '-snapshot')
> > +
> > + self.vm.launch()
> > +
> > + def verify_vbootrom_firmware_flow(self):
> > + wait_for_console_pattern(self, 'Found valid caliptra flash image')
> > + wait_for_console_pattern(self, 'Check flash image checksum')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Read abb header')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Read soc manifest')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Load atf image')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Load optee image')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Load uboot image')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Load ssp image')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Load tsp image')
> > + wait_for_console_pattern(self, 'pass')
> > + wait_for_console_pattern(self, 'Jumping to BL31 (Trusted
> > + Firmware-A)')
> > +
> > + def enable_ast2700_pcie2(self):
> > + wait_for_console_pattern(self, 'Hit any key to stop autoboot')
> > + exec_command_and_wait_for_pattern(self, '\012', '=>')
> > + exec_command_and_wait_for_pattern(self,
> > + 'cp 100420000 403000000 900000', '=>')
> > + exec_command_and_wait_for_pattern(self,
> > + 'bootm start 403000000', '=>')
> > + exec_command_and_wait_for_pattern(self, 'bootm loados', '=>')
> > + exec_command_and_wait_for_pattern(self, 'bootm ramdisk',
> '=>')
> > + exec_command_and_wait_for_pattern(self, 'bootm prep', '=>')
> > + exec_command_and_wait_for_pattern(self,
> > + 'fdt set /soc@14000000/pcie@140d0000 status "okay"', '=>')
> > + exec_command(self, 'bootm go')
> > +
> > + def verify_openbmc_boot_start(self, enable_pcie=True):
> > + wait_for_console_pattern(self, 'U-Boot 2023.10')
> > + if enable_pcie:
> > + self.enable_ast2700_pcie2()
> > + wait_for_console_pattern(self, 'Linux version ')
> > +
> > + def verify_openbmc_boot_and_login(self, name, enable_pcie=True):
> > + self.verify_openbmc_boot_start(enable_pcie)
> > +
> > + wait_for_console_pattern(self, f'{name} login:')
> > + exec_command_and_wait_for_pattern(self, 'root', 'Password:')
> > + exec_command_and_wait_for_pattern(self, '0penBmc',
> > + f'root@{name}:~#')
> > +
> > + ASSET_SDK_V1100_AST2700 = Asset(
> > +
> 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast
> 2700-default-obmc.tar.gz',
> > +
> > +
> 'e2b8f043fe8063dd3b6ded93422e38bd41914dc9c3202199507652df024de4dc')
> > +
> > + ASSET_SDK_V1100_AST2700_DCSCM = Asset(
> > +
> 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast
> 2700-dcscm-obmc.tar.gz',
> > +
> > +
> '0e93f7976139da71fab9df7952a58bdd80650e23e7abf5853b0eb6695deb02d0')
> > +
> > + def do_ast2700_i2c_test(self, bus_id):
> > + bus_str = str(bus_id)
> > + exec_command_and_wait_for_pattern(self,
> > + 'echo lm75 0x4d > '
> > + f'/sys/class/i2c-dev/i2c-{bus_str}/device/new_device ',
> > + f'i2c i2c-{bus_str}: new_device: Instantiated device lm75 at
> 0x4d')
> > + exec_command_and_wait_for_pattern(self,
> > + f'cat
> /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
> > + '0')
> > + self.vm.cmd('qom-set',
> path=f'/machine/peripheral/tmp-test-{bus_str}',
> > + property='temperature', value=18000)
> > + exec_command_and_wait_for_pattern(self,
> > + f'cat
> /sys/bus/i2c/devices/{bus_str}-004d/hwmon/hwmon*/temp1_input',
> > + '18000')
> > +
> > + def do_ast2700_pcie_test(self):
> > + exec_command_and_wait_for_pattern(self,
> > + 'lspci -s 0002:00:00.0',
> > + '0002:00:00.0 PCI bridge: '
> > + 'ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
> > + exec_command_and_wait_for_pattern(self,
> > + 'lspci -s 0002:01:00.0',
> > + '0002:01:00.0 Ethernet controller: '
> > + 'Intel Corporation 82574L Gigabit Network Connection')
> > + exec_command_and_wait_for_pattern(self,
> > + 'ip addr show dev eth2',
> > + 'inet 10.0.2.15/24')
> > +
> > + def start_ast2700_test(self, name, bus_id):
> > + num_cpu = 4
> > + load_images_list = [
> > + {
> > + 'addr': '0x400000000',
> > + 'file': self.scratch_file(name, 'u-boot.bin')
> > + },
> > + {
> > + 'addr': '0x430000000',
> > + 'file': self.scratch_file(name, 'bl31.bin')
> > + },
> > + {
> > + 'addr': '0x430080000',
> > + 'file': self.scratch_file(name, 'optee', 'tee-raw.bin')
> > + }
> > + ]
> > +
> > + for load_image in load_images_list:
> > + addr = load_image['addr']
> > + file = load_image['file']
> > + self.vm.add_args('-device',
> > +
> > + f'loader,force-raw=on,addr={addr},file={file}')
> > +
> > + for i in range(num_cpu):
> > + self.vm.add_args('-device',
> > +
> f'loader,addr=0x430000000,cpu-num={i}')
> > +
> > + self.vm.add_args('-smp', str(num_cpu))
> > + self.do_test_aarch64_aspeed_sdk_start(
> > + self.scratch_file(name, 'image-bmc'), bus_id)
> > +
> > + def start_ast2700_test_vbootrom(self, name, bus_id):
> > + self.vm.add_args('-bios', 'ast27x0_bootrom.bin')
> > + self.do_test_aarch64_aspeed_sdk_start(
> > + self.scratch_file(name, 'image-bmc'), bus_id)
> > +
> > + def test_aarch64_ast2700_evb_sdk_v11_00(self):
> > + self.set_machine('ast2700a2-evb')
> > + self.require_netdev('user')
> > +
> > + self.archive_extract(self.ASSET_SDK_V1100_AST2700)
> > + self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
> > + self.vm.add_args('-netdev', 'user,id=net1')
> > + self.start_ast2700_test('ast2700-default', 1)
> > + self.verify_openbmc_boot_and_login('ast2700-default')
> > + self.do_ast2700_i2c_test(1)
> > + self.do_ast2700_pcie_test()
> > +
> > + def test_aarch64_ast2700_evb_sdk_vbootrom_v11_00(self):
> > + self.set_machine('ast2700a2-evb')
> > + self.require_netdev('user')
> > +
> > + self.archive_extract(self.ASSET_SDK_V1100_AST2700)
> > + self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.2')
> > + self.vm.add_args('-netdev', 'user,id=net1')
> > + self.start_ast2700_test_vbootrom('ast2700-default', 1)
> > + self.verify_vbootrom_firmware_flow()
> > + self.verify_openbmc_boot_start()
> > +
> > + def test_aarch64_ast2700_evb_ioexp_v11_00(self):
> > + self.set_machine('ast2700a2-evb')
> > + self.require_netdev('user')
> > +
> > + self.archive_extract(self.ASSET_SDK_V1100_AST2700_DCSCM)
> > + self.vm.set_machine('ast2700a2-evb,fmc-model=w25q512jv')
> > + self.vm.add_args('-device',
> > +
> 'tmp105,bus=ioexp0.0,address=0x4d,id=tmp-test-16')
> > + self.start_ast2700_test('ast2700-dcscm', 8)
> > + self.verify_openbmc_boot_and_login('ast2700-dcscm', False)
> > + self.do_ast2700_i2c_test(8)
> > + self.do_ast2700_i2c_test(16)
> > +
> > +if __name__ == '__main__':
> > + QemuSystemTest.main()
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 09/11] hw/arm/aspeed_ast27x0-fc: Switch AST2700 FC machine to A2 SoC
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (7 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 08/11] tests/functional/aarch64/test_aspeed_ast2700: Add AST2700 A2 EVB functional tests Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 7:16 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 10/11] hw/arm/aspeed_ast27x0-fc: Increase BMC DRAM size to 2GB for AST2700 A2 Jamin Lin
2026-02-10 5:10 ` [PATCH v2 11/11] tests/functional/aarch64/test_aspeed_ast2700fc: Use AST2700 A2 SDK image for FC tests Jamin Lin
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
Update the AST2700 FC machine to use the AST2700 A2 SoC model instead of
the A1-specific variant.
This change removes A1-specific naming and definitions from the FC
machine and aligns it with the newer AST2700 A2 silicon.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-fc.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index 0502a137f3..9b9bb2df75 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -24,8 +24,8 @@
#include "hw/arm/aspeed_coprocessor.h"
#include "hw/arm/machines-qom.h"
-#define TYPE_AST2700A1FC MACHINE_TYPE_NAME("ast2700fc")
-OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700A1FC);
+#define TYPE_AST2700FC MACHINE_TYPE_NAME("ast2700fc")
+OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700FC);
static struct arm_boot_info ast2700fc_board_info = {
.board_id = -1, /* device-tree-only board */
@@ -49,7 +49,6 @@ struct Ast2700FCState {
};
#define AST2700FC_BMC_RAM_SIZE (1 * GiB)
-#define AST2700FC_CM4_DRAM_SIZE (32 * MiB)
#define AST2700FC_HW_STRAP1 0x000000C0
#define AST2700FC_HW_STRAP2 0x00000003
@@ -58,7 +57,7 @@ struct Ast2700FCState {
static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
{
- Ast2700FCState *s = AST2700A1FC(machine);
+ Ast2700FCState *s = AST2700FC(machine);
AspeedSoCState *soc;
AspeedSoCClass *sc;
const char *bios_name = NULL;
@@ -66,7 +65,7 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
DeviceState *dev = NULL;
uint64_t rom_size;
- object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a1");
+ object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a2");
soc = ASPEED_SOC(&s->ca35);
sc = ASPEED_SOC_GET_CLASS(soc);
@@ -135,7 +134,7 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
{
- Ast2700FCState *s = AST2700A1FC(machine);
+ Ast2700FCState *s = AST2700FC(machine);
AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
s->ssp_sysclk = clock_new(OBJECT(s), "SSP_SYSCLK");
@@ -167,7 +166,7 @@ static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
static bool ast2700fc_tsp_init(MachineState *machine, Error **errp)
{
- Ast2700FCState *s = AST2700A1FC(machine);
+ Ast2700FCState *s = AST2700FC(machine);
AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
s->tsp_sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 09/11] hw/arm/aspeed_ast27x0-fc: Switch AST2700 FC machine to A2 SoC
2026-02-10 5:10 ` [PATCH v2 09/11] hw/arm/aspeed_ast27x0-fc: Switch AST2700 FC machine to A2 SoC Jamin Lin
@ 2026-02-10 7:16 ` Cédric Le Goater
0 siblings, 0 replies; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 7:16 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> Update the AST2700 FC machine to use the AST2700 A2 SoC model instead of
> the A1-specific variant.
>
> This change removes A1-specific naming and definitions from the FC
> machine and aligns it with the newer AST2700 A2 silicon.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0-fc.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
> index 0502a137f3..9b9bb2df75 100644
> --- a/hw/arm/aspeed_ast27x0-fc.c
> +++ b/hw/arm/aspeed_ast27x0-fc.c
> @@ -24,8 +24,8 @@
> #include "hw/arm/aspeed_coprocessor.h"
> #include "hw/arm/machines-qom.h"
>
> -#define TYPE_AST2700A1FC MACHINE_TYPE_NAME("ast2700fc")
> -OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700A1FC);
> +#define TYPE_AST2700FC MACHINE_TYPE_NAME("ast2700fc")
> +OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700FC);
>
> static struct arm_boot_info ast2700fc_board_info = {
> .board_id = -1, /* device-tree-only board */
> @@ -49,7 +49,6 @@ struct Ast2700FCState {
> };
>
> #define AST2700FC_BMC_RAM_SIZE (1 * GiB)
> -#define AST2700FC_CM4_DRAM_SIZE (32 * MiB)
>
> #define AST2700FC_HW_STRAP1 0x000000C0
> #define AST2700FC_HW_STRAP2 0x00000003
> @@ -58,7 +57,7 @@ struct Ast2700FCState {
>
> static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
> {
> - Ast2700FCState *s = AST2700A1FC(machine);
> + Ast2700FCState *s = AST2700FC(machine);
> AspeedSoCState *soc;
> AspeedSoCClass *sc;
> const char *bios_name = NULL;
> @@ -66,7 +65,7 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
> DeviceState *dev = NULL;
> uint64_t rom_size;
>
> - object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a1");
> + object_initialize_child(OBJECT(s), "ca35", &s->ca35, "ast2700-a2");
> soc = ASPEED_SOC(&s->ca35);
> sc = ASPEED_SOC_GET_CLASS(soc);
>
> @@ -135,7 +134,7 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
>
> static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
> {
> - Ast2700FCState *s = AST2700A1FC(machine);
> + Ast2700FCState *s = AST2700FC(machine);
> AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
>
> s->ssp_sysclk = clock_new(OBJECT(s), "SSP_SYSCLK");
> @@ -167,7 +166,7 @@ static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
>
> static bool ast2700fc_tsp_init(MachineState *machine, Error **errp)
> {
> - Ast2700FCState *s = AST2700A1FC(machine);
> + Ast2700FCState *s = AST2700FC(machine);
> AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
>
> s->tsp_sysclk = clock_new(OBJECT(s), "TSP_SYSCLK");
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 10/11] hw/arm/aspeed_ast27x0-fc: Increase BMC DRAM size to 2GB for AST2700 A2
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (8 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 09/11] hw/arm/aspeed_ast27x0-fc: Switch AST2700 FC machine to A2 SoC Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
2026-02-10 7:16 ` Cédric Le Goater
2026-02-10 5:10 ` [PATCH v2 11/11] tests/functional/aarch64/test_aspeed_ast2700fc: Use AST2700 A2 SDK image for FC tests Jamin Lin
10 siblings, 1 reply; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com
The AST2700 A1 EVB is equipped with 1GB of DRAM, while the AST2700 A2
EVB increases the DRAM size to 2GB.
The ast2700fc machine is updated to support the AST2700 A2. Increase
the BMC DRAM size to 2GB to match the hardware configuration of
AST2700 A2.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-fc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index 9b9bb2df75..5eb6680da9 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -48,7 +48,7 @@ struct Ast2700FCState {
Aspeed27x0CoprocessorState tsp;
};
-#define AST2700FC_BMC_RAM_SIZE (1 * GiB)
+#define AST2700FC_BMC_RAM_SIZE (2 * GiB)
#define AST2700FC_HW_STRAP1 0x000000C0
#define AST2700FC_HW_STRAP2 0x00000003
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v2 10/11] hw/arm/aspeed_ast27x0-fc: Increase BMC DRAM size to 2GB for AST2700 A2
2026-02-10 5:10 ` [PATCH v2 10/11] hw/arm/aspeed_ast27x0-fc: Increase BMC DRAM size to 2GB for AST2700 A2 Jamin Lin
@ 2026-02-10 7:16 ` Cédric Le Goater
0 siblings, 0 replies; 21+ messages in thread
From: Cédric Le Goater @ 2026-02-10 7:16 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, Fabiano Rosas, Laurent Vivier, Paolo Bonzini,
open list:ASPEED BMCs, open list:All patches CC here
Cc: Troy Lee, Kane Chen, nabihestefan@google.com
On 2/10/26 06:10, Jamin Lin wrote:
> The AST2700 A1 EVB is equipped with 1GB of DRAM, while the AST2700 A2
> EVB increases the DRAM size to 2GB.
>
> The ast2700fc machine is updated to support the AST2700 A2. Increase
> the BMC DRAM size to 2GB to match the hardware configuration of
> AST2700 A2.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/arm/aspeed_ast27x0-fc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
> index 9b9bb2df75..5eb6680da9 100644
> --- a/hw/arm/aspeed_ast27x0-fc.c
> +++ b/hw/arm/aspeed_ast27x0-fc.c
> @@ -48,7 +48,7 @@ struct Ast2700FCState {
> Aspeed27x0CoprocessorState tsp;
> };
>
> -#define AST2700FC_BMC_RAM_SIZE (1 * GiB)
> +#define AST2700FC_BMC_RAM_SIZE (2 * GiB)
>
> #define AST2700FC_HW_STRAP1 0x000000C0
> #define AST2700FC_HW_STRAP2 0x00000003
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 11/11] tests/functional/aarch64/test_aspeed_ast2700fc: Use AST2700 A2 SDK image for FC tests
2026-02-10 5:10 [PATCH v2 00/11] Support ASPEED AST2700 A2 Jamin Lin
` (9 preceding siblings ...)
2026-02-10 5:10 ` [PATCH v2 10/11] hw/arm/aspeed_ast27x0-fc: Increase BMC DRAM size to 2GB for AST2700 A2 Jamin Lin
@ 2026-02-10 5:10 ` Jamin Lin
10 siblings, 0 replies; 21+ messages in thread
From: Jamin Lin @ 2026-02-10 5:10 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, Fabiano Rosas, Laurent Vivier,
Paolo Bonzini, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee, Kane Chen, nabihestefan@google.com,
Cédric Le Goater
Update AST2700 FC functional tests to use the AST2700 A2 SDK v11.00 image.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
.../functional/aarch64/test_aspeed_ast2700fc.py | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py b/tests/functional/aarch64/test_aspeed_ast2700fc.py
index 47e56dcfc5..51ee8bc787 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
@@ -62,8 +62,8 @@ def load_ast2700fc_coprocessor(self, name):
f'loader,file={file},cpu-num={cpu_num}')
ASSET_SDK_V1100_AST2700 = Asset(
- 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-a1-obmc.tar.gz',
- 'd5ceed511cd0dfefbb102fff2d731159e0472948a28066dc0d90bcd54be76525')
+ 'https://github.com/AspeedTech-BMC/openbmc/releases/download/v11.00/ast2700-default-obmc.tar.gz',
+ 'e2b8f043fe8063dd3b6ded93422e38bd41914dc9c3202199507652df024de4dc')
def do_ast2700_i2c_test(self):
exec_command_and_wait_for_pattern(self,
@@ -98,7 +98,7 @@ def do_ast2700fc_ssp_test(self):
exec_command_and_wait_for_pattern(self, 'version',
'Zephyr version 3.7.1')
exec_command_and_wait_for_pattern(self, 'md 72c02000 1',
- '[72c02000] 06010103')
+ '[72c02000] 06020103')
def do_ast2700fc_tsp_test(self):
self.vm.shutdown()
@@ -109,7 +109,7 @@ def do_ast2700fc_tsp_test(self):
exec_command_and_wait_for_pattern(self, 'version',
'Zephyr version 3.7.1')
exec_command_and_wait_for_pattern(self, 'md 72c02000 1',
- '[72c02000] 06010103')
+ '[72c02000] 06020103')
def start_ast2700fc_test(self, name):
ca35_core = 4
@@ -153,8 +153,8 @@ def test_aarch64_ast2700fc_sdk_v11_00(self):
self.require_netdev('user')
self.archive_extract(self.ASSET_SDK_V1100_AST2700)
- self.start_ast2700fc_test('ast2700-a1')
- self.verify_openbmc_boot_and_login('ast2700-a1')
+ self.start_ast2700fc_test('ast2700-default')
+ self.verify_openbmc_boot_and_login('ast2700-default')
self.do_ast2700_i2c_test()
self.do_ast2700_pcie_test()
self.do_ast2700fc_ssp_test()
@@ -164,8 +164,8 @@ def test_aarch64_ast2700fc_sdk_vbootrom_v11_00(self):
self.set_machine('ast2700fc')
self.archive_extract(self.ASSET_SDK_V1100_AST2700)
- self.start_ast2700fc_test_vbootrom('ast2700-a1')
- self.verify_openbmc_boot_and_login('ast2700-a1')
+ self.start_ast2700fc_test_vbootrom('ast2700-default')
+ self.verify_openbmc_boot_and_login('ast2700-default')
self.do_ast2700fc_ssp_test()
self.do_ast2700fc_tsp_test()
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread