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* [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7
@ 2026-02-18 10:20 ` Ronald Claveau
  0 siblings, 0 replies; 17+ messages in thread
From: Ronald Claveau @ 2026-02-18 10:20 UTC (permalink / raw)
  To: linux-amlogic
  Cc: Ronald Claveau, Neil Armstrong, Kevin Hilman, Jerome Brunet,
	Martin Blumenstingl, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, linux-arm-kernel, devicetree, linux-kernel

Add fixed clock and EMMC support for Amlogic T7 SoC family dtsi.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 137 +++++++++++++++++++-
 1 file changed, 134 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
index 6510068bcff9..e5932eb3db2b 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
@@ -3,6 +3,8 @@
  * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
  */
 
+#include <dt-bindings/clock/amlogic,t7-peripherals-clkc.h>
+#include <dt-bindings/clock/amlogic,t7-pll-clkc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/amlogic,t7-pwrc.h>
 #include "amlogic-t7-reset.h"
@@ -208,12 +210,14 @@ soc {
 		ranges;
 
 		gic: interrupt-controller@fff01000 {
-			compatible = "arm,gic-400";
+			compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 			#interrupt-cells = <3>;
 			#address-cells = <0>;
 			interrupt-controller;
 			reg = <0x0 0xfff01000 0 0x1000>,
-			      <0x0 0xfff02000 0 0x0100>;
+				  <0x0 0xfff02000 0 0x2000>,
+				  <0x0 0xfff04000 0 0x2000>,
+				  <0x0 0xfff06000 0 0x2000>;
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
@@ -224,6 +228,24 @@ apb4: bus@fe000000 {
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
 
+			clkc: clock-controller@0 {
+				compatible = "amlogic,t7-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+						 <&fpll CLKID_FDIV2>,
+						 <&fpll CLKID_FDIV2P5>,
+						 <&fpll CLKID_FDIV3>,
+						 <&fpll CLKID_FDIV4>,
+						 <&fpll CLKID_FDIV5>,
+						 <&hifi_pll CLKID_HIFI_PLL>,
+						 <&mpll CLKID_MPLL2>,
+						 <&mpll CLKID_MPLL3>,
+						 <&gp0_pll CLKID_GP0_PLL>;
+				clock-names = "xtal", "fdiv2", "fdiv2p5", "fdiv3", "fdiv4",
+							  "fdiv5", "hifi", "mpll2", "mpll3", "gp0";
+			};
+
 			reset: reset-controller@2000 {
 				compatible = "amlogic,t7-reset";
 				reg = <0x0 0x2000 0x0 0x98>;
@@ -250,6 +272,68 @@ gpio: bank@4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 157>;
 				};
+
+				emmc_ctrl_pins: emmc-ctrl {
+					mux-0 {
+						groups = "emmc_cmd";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+
+					mux-1 {
+						groups = "emmc_clk";
+						function = "emmc";
+						bias-disable;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_data_4b_pins: emmc-data-4b {
+					mux-0 {
+						groups = "emmc_nand_d0",
+								 "emmc_nand_d1",
+								 "emmc_nand_d2",
+								 "emmc_nand_d3";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_data_8b_pins: emmc-data-8b {
+					mux-0 {
+						groups = "emmc_nand_d0",
+								 "emmc_nand_d1",
+								 "emmc_nand_d2",
+								 "emmc_nand_d3",
+								 "emmc_nand_d4",
+								 "emmc_nand_d5",
+								 "emmc_nand_d6",
+								 "emmc_nand_d7";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_ds_pins: emmc-ds {
+					mux {
+						groups = "emmc_nand_ds";
+						function = "emmc";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_clk_gate_pins: emmc_clk_gate {
+					mux {
+						groups = "GPIOB_8";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller@4080 {
@@ -262,8 +346,40 @@ gpio_intc: interrupt-controller@4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			fpll: clock-controller@8040 {
+				compatible = "amlogic,t7-fpll";
+				reg = <0x0 0x8040 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "xtal";
+			};
+
+			gp0_pll: clock-controller@8080 {
+				compatible = "amlogic,t7-gp0-pll";
+				reg = <0x0 0x8080 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "in0";
+			};
+
+			hifi_pll: clock-controller@8100 {
+				compatible = "amlogic,t7-hifi-pll";
+				reg = <0x0 0x8100 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "in0";
+			};
+
+			mpll: clock-controller@8180 {
+				compatible = "amlogic,t7-mpll";
+				reg = <0x0 0x8180 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&fpll CLKID_FPLL_DCO>;
+				clock-names = "in0";
+			};
+
 			uart_a: serial@78000 {
-				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";
+				compatible = "amlogic,meson-s4-uart";
 				reg = <0x0 0x78000 0x0 0x18>;
 				interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
@@ -276,6 +392,21 @@ sec_ao: ao-secure@10220 {
 				reg = <0x0 0x10220 0x0 0x140>;
 				amlogic,has-chip-id;
 			};
+
+			sd_emmc_c: mmc@8c000{
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8c000 0x0 0x800>;
+				interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+				clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
+						 <&clkc CLKID_SD_EMMC_C>,
+						 <&gp0_pll CLKID_GP0_PLL>;
+				clock-names = "core", "clkin0", "clkin1";
+				assigned-clocks = <&clkc CLKID_SD_EMMC_C_SEL>;
+				assigned-clock-parents = <&xtal>;
+				no-sdio;
+				no-sd;
+			};
 		};
 
 	};
-- 
2.49.0


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply related	[flat|nested] 17+ messages in thread
* Re: [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7
@ 2026-02-19  7:11 kernel test robot
  0 siblings, 0 replies; 17+ messages in thread
From: kernel test robot @ 2026-02-19  7:11 UTC (permalink / raw)
  To: oe-kbuild; +Cc: lkp

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260218102045.35633-1-linux-kernel-dev@aliel.fr>
References: <20260218102045.35633-1-linux-kernel-dev@aliel.fr>
TO: Ronald Claveau <linux-kernel-dev@aliel.fr>
TO: linux-amlogic@lists.infradead.org
CC: Ronald Claveau <linux-kernel-dev@aliel.fr>
CC: Neil Armstrong <neil.armstrong@linaro.org>
CC: Kevin Hilman <khilman@baylibre.com>
CC: Jerome Brunet <jbrunet@baylibre.com>
CC: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk@kernel.org>
CC: Conor Dooley <conor+dt@kernel.org>
CC: linux-arm-kernel@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org

Hi Ronald,

kernel test robot noticed the following build warnings:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on linus/master next-20260218]
[cannot apply to robh/for-next v6.19]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ronald-Claveau/dt-bindings-clk-meson-Add-Amlogic-T7-fix-pll-support/20260218-183657
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20260218102045.35633-1-linux-kernel-dev%40aliel.fr
patch subject: [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7
:::::: branch date: 21 hours ago
:::::: commit date: 21 hours ago
config: arm64-randconfig-2052-20260218 (https://download.01.org/0day-ci/archive/20260219/202602190858.SkfjjdFX-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 10.5.0
dtschema: 2025.13.dev7+gd16dc68b0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260219/202602190858.SkfjjdFX-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202602190858.SkfjjdFX-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi:261.34-337.6: Warning (unit_address_vs_reg): /soc/bus@fe000000/pinctrl@4000: node has a unit name, but no reg or ranges property
   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi:261.34-337.6: Warning (simple_bus_reg): /soc/bus@fe000000/pinctrl@4000: missing or empty reg/ranges property
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: interrupt-controller@fff01000 (arm,cortex-a15-gic): compatible: 'oneOf' conditional failed, one must be fixed:
   	['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is too long
>> 	arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: interrupt-controller@fff01000 (arm,cortex-a15-gic): compatible: 'oneOf' conditional failed, one must be fixed:
   		['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is too long
   		'nvidia,tegra210-agic' was expected
   		'arm,cortex-a15-gic' is not one of ['nvidia,tegra186-agic', 'nvidia,tegra194-agic', 'nvidia,tegra234-agic', 'nvidia,tegra264-agic']
   	'arm,gic-400' was expected
   	'arm,arm1176jzf-devchip-gic' was expected
   	'brcm,brahma-b15-gic' was expected
   	'arm,cortex-a9-gic' is not one of ['arm,cortex-a15-gic', 'arm,cortex-a7-gic']
   	'arm,arm11mp-gic' was expected
   	'arm,cortex-a15-gic' was expected
   	from schema $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:1: 'sys' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:2: 'fix' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:3: 'fdiv2' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:4: 'fdiv2p5' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:5: 'fdiv3' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:6: 'fdiv4' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:7: 'fdiv5' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:8: 'fdiv7' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:9: 'hifi' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names: ['xtal', 'fdiv2', 'fdiv2p5', 'fdiv3', 'fdiv4', 'fdiv5', 'hifi', 'mpll2', 'mpll3', 'gp0'] is too short
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clocks: [[12], [13, 3], [13, 5], [13, 7], [13, 9], [13, 11], [14, 1], [15, 6], [15, 8], [16, 1]] is too short
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dtb: clock-controller@8040 (amlogic,t7-fpll): clock-names:0: 'in0' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-pll-clkc.yaml
--
   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi:261.34-337.6: Warning (unit_address_vs_reg): /soc/bus@fe000000/pinctrl@4000: node has a unit name, but no reg or ranges property
   arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi:261.34-337.6: Warning (simple_bus_reg): /soc/bus@fe000000/pinctrl@4000: missing or empty reg/ranges property
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: interrupt-controller@fff01000 (arm,cortex-a15-gic): compatible: 'oneOf' conditional failed, one must be fixed:
   	['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is too long
>> 	arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: interrupt-controller@fff01000 (arm,cortex-a15-gic): compatible: 'oneOf' conditional failed, one must be fixed:
   		['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is too long
   		'nvidia,tegra210-agic' was expected
   		'arm,cortex-a15-gic' is not one of ['nvidia,tegra186-agic', 'nvidia,tegra194-agic', 'nvidia,tegra234-agic', 'nvidia,tegra264-agic']
   	'arm,gic-400' was expected
   	'arm,arm1176jzf-devchip-gic' was expected
   	'brcm,brahma-b15-gic' was expected
   	'arm,cortex-a9-gic' is not one of ['arm,cortex-a15-gic', 'arm,cortex-a7-gic']
   	'arm,arm11mp-gic' was expected
   	'arm,cortex-a15-gic' was expected
   	from schema $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:1: 'sys' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:2: 'fix' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:3: 'fdiv2' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:4: 'fdiv2p5' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:5: 'fdiv3' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:6: 'fdiv4' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:7: 'fdiv5' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:8: 'fdiv7' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names:9: 'hifi' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clock-names: ['xtal', 'fdiv2', 'fdiv2p5', 'fdiv3', 'fdiv4', 'fdiv5', 'hifi', 'mpll2', 'mpll3', 'gp0'] is too short
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@0 (amlogic,t7-peripherals-clkc): clocks: [[12], [13, 3], [13, 5], [13, 7], [13, 9], [13, 11], [14, 1], [15, 6], [15, 8], [16, 1]] is too short
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml
>> arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dtb: clock-controller@8040 (amlogic,t7-fpll): clock-names:0: 'in0' was expected
   	from schema $id: http://devicetree.org/schemas/clock/amlogic,t7-pll-clkc.yaml

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 1/7] drivers: clk: meson: Add Amlogic T7 fix pll support
@ 2026-02-18 10:17 Ronald Claveau
  2026-02-18 11:20   ` Ronald Claveau
  0 siblings, 1 reply; 17+ messages in thread
From: Ronald Claveau @ 2026-02-18 10:17 UTC (permalink / raw)
  To: linux-amlogic
  Cc: Ronald Claveau, Neil Armstrong, Jerome Brunet, Michael Turquette,
	Stephen Boyd, Kevin Hilman, Martin Blumenstingl, linux-clk,
	linux-arm-kernel, linux-kernel

Add PLL for the clock controller of the Amlogic T7 SoC family.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 drivers/clk/meson/t7-pll.c | 257 +++++++++++++++++++++++++++++++++++++
 1 file changed, 257 insertions(+)

diff --git a/drivers/clk/meson/t7-pll.c b/drivers/clk/meson/t7-pll.c
index 0a622f45fa36..3dd3aca50b7c 100644
--- a/drivers/clk/meson/t7-pll.c
+++ b/drivers/clk/meson/t7-pll.c
@@ -71,6 +71,15 @@
 #define MCLK_PLL_CNTL4		0x10
 #define MCLK_PLL_STS		0x14
 
+#define FPLL_CTRL0		0x00
+#define FPLL_CTRL1		0x04
+#define FPLL_CTRL2		0x08
+#define FPLL_CTRL3		0x0c
+#define FPLL_CTRL4		0x10
+#define FPLL_CTRL5		0x14
+#define FPLL_CTRL6		0x18
+#define FPLL_STS		0x1c
+
 static const struct pll_mult_range t7_media_pll_mult_range = {
 	.min = 125,
 	.max = 250,
@@ -1047,6 +1056,253 @@ static const struct meson_clkc_data t7_mclk_data = {
 	},
 };
 
+static struct clk_regmap t7_fpll_dco = {
+	.data = &(struct meson_clk_pll_data){
+		.en = {
+			.reg_off = FPLL_CTRL0,
+			.shift   = 28,
+			.width   = 1,
+		},
+		.m = {
+			.reg_off = FPLL_CTRL0,
+			.shift   = 0,
+			.width   = 8,
+		},
+		.n = {
+			.reg_off = FPLL_CTRL0,
+			.shift   = 10,
+			.width   = 5,
+		},
+		.frac = {
+			.reg_off = FPLL_CTRL1,
+			.shift   = 0,
+			.width   = 17,
+		},
+		.l = {
+			.reg_off = FPLL_CTRL0,
+			.shift   = 31,
+			.width   = 1,
+		},
+		.rst = {
+			.reg_off = FPLL_CTRL0,
+			.shift   = 29,
+			.width   = 1,
+		},
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fpll_dco",
+		.ops = &meson_clk_pll_ro_ops,
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "xtal",
+		},
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fpll = {
+	.data = &(struct clk_regmap_div_data){
+		.offset = FPLL_CTRL0,
+		.shift = 16,
+		.width = 2,
+		.flags = CLK_DIVIDER_POWER_OF_TWO,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fpll",
+		.ops = &clk_regmap_divider_ro_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fpll_dco.hw
+		},
+		.num_parents = 1,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv2_div = {
+	.mult = 1,
+	.div = 2,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv2_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) { &t7_fpll.hw },
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv2 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 24,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv2",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv2_div.hw
+		},
+		.num_parents = 1,
+		.flags = CLK_IS_CRITICAL,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv2p5_div = {
+	.mult = 2,
+	.div = 5,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv2p5_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fpll.hw
+		},
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv2p5 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 25,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv2p5",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv2p5_div.hw
+		},
+		.num_parents = 1,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv3_div = {
+	.mult = 1,
+	.div = 3,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv3_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) { &t7_fpll.hw },
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv3 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 20,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv3",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv3_div.hw
+		},
+		.num_parents = 1,
+		.flags = CLK_IS_CRITICAL,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv4_div = {
+	.mult = 1,
+	.div = 4,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv4_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) { &t7_fpll.hw },
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv4 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 21,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv4",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv4_div.hw
+		},
+		.num_parents = 1,
+		.flags = CLK_IS_CRITICAL,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv5_div = {
+	.mult = 1,
+	.div = 5,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv5_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) { &t7_fpll.hw },
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv5 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 22,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv5",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv5_div.hw
+		},
+		.num_parents = 1,
+		.flags = CLK_IS_CRITICAL,
+	},
+};
+
+static struct clk_fixed_factor t7_fdiv7_div = {
+	.mult = 1,
+	.div = 7,
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv7_div",
+		.ops = &clk_fixed_factor_ops,
+		.parent_hws = (const struct clk_hw *[]) { &t7_fpll.hw },
+		.num_parents = 1,
+	},
+};
+
+static struct clk_regmap t7_fdiv7 = {
+	.data = &(struct clk_regmap_gate_data){
+		.offset = FPLL_CTRL1,
+		.bit_idx = 23,
+	},
+	.hw.init = &(struct clk_init_data){
+		.name = "fdiv7",
+		.ops = &clk_regmap_gate_ops,
+		.parent_hws = (const struct clk_hw *[]) {
+			&t7_fdiv7_div.hw
+		},
+		.num_parents = 1,
+		.flags = CLK_IS_CRITICAL,
+	},
+};
+
+static struct clk_hw *t7_fpll_hw_clks[] = {
+	[CLKID_FPLL_DCO]	= &t7_fpll_dco.hw,
+	[CLKID_FPLL]		= &t7_fpll.hw,
+	[CLKID_FDIV2_DIV]	= &t7_fdiv2_div.hw,
+	[CLKID_FDIV2]		= &t7_fdiv2.hw,
+	[CLKID_FDIV2P5_DIV]	= &t7_fdiv2p5_div.hw,
+	[CLKID_FDIV2P5]		= &t7_fdiv2p5.hw,
+	[CLKID_FDIV3_DIV]	= &t7_fdiv3_div.hw,
+	[CLKID_FDIV3]		= &t7_fdiv3.hw,
+	[CLKID_FDIV4_DIV]	= &t7_fdiv4_div.hw,
+	[CLKID_FDIV4]		= &t7_fdiv4.hw,
+	[CLKID_FDIV5_DIV]	= &t7_fdiv5_div.hw,
+	[CLKID_FDIV5]		= &t7_fdiv5.hw,
+	[CLKID_FDIV7_DIV]	= &t7_fdiv7_div.hw,
+	[CLKID_FDIV7]		= &t7_fdiv7.hw,
+};
+
+static const struct meson_clkc_data t7_fpll_data = {
+	.hw_clks = {
+		.hws = t7_fpll_hw_clks,
+		.num = ARRAY_SIZE(t7_fpll_hw_clks),
+	},
+};
+
 static const struct of_device_id t7_pll_clkc_match_table[] = {
 	{ .compatible = "amlogic,t7-gp0-pll",	.data = &t7_gp0_data, },
 	{ .compatible = "amlogic,t7-gp1-pll",	.data = &t7_gp1_data, },
@@ -1055,6 +1311,7 @@ static const struct of_device_id t7_pll_clkc_match_table[] = {
 	{ .compatible = "amlogic,t7-mpll",	.data = &t7_mpll_data, },
 	{ .compatible = "amlogic,t7-hdmi-pll",	.data = &t7_hdmi_data, },
 	{ .compatible = "amlogic,t7-mclk-pll",	.data = &t7_mclk_data, },
+	{ .compatible = "amlogic,t7-fpll",	.data = &t7_fpll_data, },
 	{}
 };
 MODULE_DEVICE_TABLE(of, t7_pll_clkc_match_table);
-- 
2.49.0


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^ permalink raw reply related	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2026-02-19  7:12 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-18 10:20 [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7 Ronald Claveau
2026-02-18 10:20 ` Ronald Claveau
2026-02-18 10:23 ` Krzysztof Kozlowski
2026-02-18 10:23   ` Krzysztof Kozlowski
2026-02-18 16:36   ` Ronald Claveau
2026-02-18 16:36     ` Ronald Claveau
2026-02-18 16:39     ` Krzysztof Kozlowski
2026-02-18 16:39       ` Krzysztof Kozlowski
2026-02-18 17:00       ` Ronald Claveau
2026-02-18 17:00         ` Ronald Claveau
  -- strict thread matches above, loose matches on Subject: below --
2026-02-19  7:11 kernel test robot
2026-02-18 10:17 [PATCH 1/7] drivers: clk: meson: Add Amlogic T7 fix pll support Ronald Claveau
2026-02-18 11:20 ` [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7 Ronald Claveau
2026-02-18 11:20   ` Ronald Claveau
2026-02-18 18:34   ` Jerome Brunet
2026-02-18 18:34     ` Jerome Brunet
2026-02-18 19:18   ` Krzysztof Kozlowski
2026-02-18 19:18     ` Krzysztof Kozlowski

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