* [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines
@ 2026-02-26 9:07 Thomas Huth
2026-02-26 9:30 ` Peter Maydell
2026-03-03 9:58 ` [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Peter Maydell
0 siblings, 2 replies; 6+ messages in thread
From: Thomas Huth @ 2026-02-26 9:07 UTC (permalink / raw)
To: Peter Maydell, qemu-devel, Rob Herring; +Cc: qemu-arm, Pierrick Bouvier
From: Thomas Huth <thuth@redhat.com>
These machines have been marked as deprecated two releases ago,
and so far nobody complained that they are still useful, so it's
time to remove these now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
MAINTAINERS | 9 -
docs/about/deprecated.rst | 7 -
docs/about/removed-features.rst | 7 +
docs/system/arm/highbank.rst | 19 --
docs/system/target-arm.rst | 1 -
configs/devices/arm-softmmu/default.mak | 1 -
hw/arm/highbank.c | 404 ------------------------
hw/arm/Kconfig | 16 -
hw/arm/meson.build | 1 -
9 files changed, 7 insertions(+), 458 deletions(-)
delete mode 100644 docs/system/arm/highbank.rst
delete mode 100644 hw/arm/highbank.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 233d2a5e71f..c7cec413cf0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -817,15 +817,6 @@ F: include/hw/*/exynos*
F: docs/system/arm/exynos.rst
F: tests/functional/arm/test_smdkc210.py
-Calxeda Highbank
-M: Rob Herring <robh@kernel.org>
-M: Peter Maydell <peter.maydell@linaro.org>
-L: qemu-arm@nongnu.org
-S: Odd Fixes
-F: hw/arm/highbank.c
-F: hw/net/xgmac.c
-F: docs/system/arm/highbank.rst
-
Canon DIGIC
M: Antony Pavlov <antonynpavlov@gmail.com>
M: Peter Maydell <peter.maydell@linaro.org>
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 1d5c4f3707c..f95d798731f 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -293,13 +293,6 @@ they want to use and avoids confusion. Existing users of the ``spike``
machine must ensure that they're setting the ``spike`` machine in the
command line (``-M spike``).
-Arm ``highbank`` and ``midway`` machines (since 10.1)
-'''''''''''''''''''''''''''''''''''''''''''''''''''''
-
-There are no known users left for these machines (if you still use it,
-please write a mail to the qemu-devel mailing list). If you just want to
-boot a Cortex-A15 or Cortex-A9 Linux, use the ``virt`` machine instead.
-
System emulator binaries
------------------------
diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
index 41bec8b8e38..1282a82391e 100644
--- a/docs/about/removed-features.rst
+++ b/docs/about/removed-features.rst
@@ -1180,6 +1180,13 @@ and serves as the initial engineering sample rather than a production version.
A newer revision, A1, is now supported, and the ``ast2700a1-evb`` should
replace the older A0 version.
+Arm ``highbank`` and ``midway`` machines (removed in 11.0)
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+There were no known users left for these machines. If you just want to
+boot a Cortex-A15 or Cortex-A9 Linux, use the ``virt`` machine instead.
+
+
linux-user mode CPUs
--------------------
diff --git a/docs/system/arm/highbank.rst b/docs/system/arm/highbank.rst
deleted file mode 100644
index bb4965b367f..00000000000
--- a/docs/system/arm/highbank.rst
+++ /dev/null
@@ -1,19 +0,0 @@
-Calxeda Highbank and Midway (``highbank``, ``midway``)
-======================================================
-
-``highbank`` is a model of the Calxeda Highbank (ECX-1000) system,
-which has four Cortex-A9 cores.
-
-``midway`` is a model of the Calxeda Midway (ECX-2000) system,
-which has four Cortex-A15 cores.
-
-Emulated devices:
-
-- L2x0 cache controller
-- SP804 dual timer
-- PL011 UART
-- PL061 GPIOs
-- PL031 RTC
-- PL022 synchronous serial port controller
-- AHCI
-- XGMAC ethernet controllers
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index a96d1867df1..89f7b77313f 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -83,7 +83,6 @@ Board-specific documentation
arm/bananapi_m2u.rst
arm/b-l475e-iot01a.rst
arm/sabrelite
- arm/highbank
arm/digic
arm/cubieboard
arm/emcraft-sf2
diff --git a/configs/devices/arm-softmmu/default.mak b/configs/devices/arm-softmmu/default.mak
index 57ef1b8a702..71cf1645110 100644
--- a/configs/devices/arm-softmmu/default.mak
+++ b/configs/devices/arm-softmmu/default.mak
@@ -12,7 +12,6 @@
# keep out of the build.
# CONFIG_CUBIEBOARD=n
# CONFIG_EXYNOS4=n
-# CONFIG_HIGHBANK=n
# CONFIG_INTEGRATOR=n
# CONFIG_FSL_IMX31=n
# CONFIG_MUSICPAL=n
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
deleted file mode 100644
index 92d497999c0..00000000000
--- a/hw/arm/highbank.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/*
- * Calxeda Highbank SoC emulation
- *
- * Copyright (c) 2010-2012 Calxeda
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2 or later, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program. If not, see <http://www.gnu.org/licenses/>.
- *
- */
-
-#include "qemu/osdep.h"
-#include "qemu/datadir.h"
-#include "qapi/error.h"
-#include "hw/core/sysbus.h"
-#include "migration/vmstate.h"
-#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
-#include "hw/core/loader.h"
-#include "net/net.h"
-#include "system/runstate.h"
-#include "system/system.h"
-#include "hw/core/boards.h"
-#include "qemu/error-report.h"
-#include "hw/char/pl011.h"
-#include "hw/ide/ahci-sysbus.h"
-#include "hw/cpu/a9mpcore.h"
-#include "hw/cpu/a15mpcore.h"
-#include "qemu/log.h"
-#include "qom/object.h"
-#include "cpu.h"
-#include "target/arm/cpu-qom.h"
-
-#define SMP_BOOT_ADDR 0x100
-#define SMP_BOOT_REG 0x40
-#define MPCORE_PERIPHBASE 0xfff10000
-
-#define MVBAR_ADDR 0x200
-#define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
-
-#define GIC_EXT_IRQS 128 /* EnergyCore ECX-1000 & ECX-2000 */
-
-/* Board init. */
-
-#define NUM_REGS 0x200
-static void hb_regs_write(void *opaque, hwaddr offset,
- uint64_t value, unsigned size)
-{
- uint32_t *regs = opaque;
-
- if (offset == 0xf00) {
- if (value == 1 || value == 2) {
- qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
- } else if (value == 3) {
- qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
- }
- }
-
- if (offset / 4 >= NUM_REGS) {
- qemu_log_mask(LOG_GUEST_ERROR,
- "highbank: bad write offset 0x%" HWADDR_PRIx "\n", offset);
- return;
- }
- regs[offset / 4] = value;
-}
-
-static uint64_t hb_regs_read(void *opaque, hwaddr offset,
- unsigned size)
-{
- uint32_t value;
- uint32_t *regs = opaque;
-
- if (offset / 4 >= NUM_REGS) {
- qemu_log_mask(LOG_GUEST_ERROR,
- "highbank: bad read offset 0x%" HWADDR_PRIx "\n", offset);
- return 0;
- }
- value = regs[offset / 4];
-
- if ((offset == 0x100) || (offset == 0x108) || (offset == 0x10C)) {
- value |= 0x30000000;
- }
-
- return value;
-}
-
-static const MemoryRegionOps hb_mem_ops = {
- .read = hb_regs_read,
- .write = hb_regs_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
-};
-
-#define TYPE_HIGHBANK_REGISTERS "highbank-regs"
-OBJECT_DECLARE_SIMPLE_TYPE(HighbankRegsState, HIGHBANK_REGISTERS)
-
-struct HighbankRegsState {
- /*< private >*/
- SysBusDevice parent_obj;
- /*< public >*/
-
- MemoryRegion iomem;
- uint32_t regs[NUM_REGS];
-};
-
-static const VMStateDescription vmstate_highbank_regs = {
- .name = "highbank-regs",
- .version_id = 0,
- .minimum_version_id = 0,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT32_ARRAY(regs, HighbankRegsState, NUM_REGS),
- VMSTATE_END_OF_LIST(),
- },
-};
-
-static void highbank_regs_reset(DeviceState *dev)
-{
- HighbankRegsState *s = HIGHBANK_REGISTERS(dev);
-
- s->regs[0x40] = 0x05F20121;
- s->regs[0x41] = 0x2;
- s->regs[0x42] = 0x05F30121;
- s->regs[0x43] = 0x05F40121;
-}
-
-static void highbank_regs_init(Object *obj)
-{
- HighbankRegsState *s = HIGHBANK_REGISTERS(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
-
- memory_region_init_io(&s->iomem, obj, &hb_mem_ops, s->regs,
- "highbank_regs", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
-}
-
-static void highbank_regs_class_init(ObjectClass *klass, const void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
-
- dc->desc = "Calxeda Highbank registers";
- dc->vmsd = &vmstate_highbank_regs;
- device_class_set_legacy_reset(dc, highbank_regs_reset);
-}
-
-static const TypeInfo highbank_regs_info = {
- .name = TYPE_HIGHBANK_REGISTERS,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(HighbankRegsState),
- .instance_init = highbank_regs_init,
- .class_init = highbank_regs_class_init,
-};
-
-static void highbank_regs_register_types(void)
-{
- type_register_static(&highbank_regs_info);
-}
-
-type_init(highbank_regs_register_types)
-
-static struct arm_boot_info highbank_binfo;
-
-enum cxmachines {
- CALXEDA_HIGHBANK,
- CALXEDA_MIDWAY,
-};
-
-/* ram_size must be set to match the upper bound of memory in the
- * device tree (linux/arch/arm/boot/dts/highbank.dts), which is
- * normally 0xff900000 or -m 4089. When running this board on a
- * 32-bit host, set the reg value of memory to 0xf7ff00000 in the
- * device tree and pass -m 2047 to QEMU.
- */
-static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
-{
- DeviceState *dev = NULL;
- SysBusDevice *busdev;
- qemu_irq pic[GIC_EXT_IRQS];
- int n;
- unsigned int smp_cpus = machine->smp.cpus;
- qemu_irq cpu_irq[4];
- qemu_irq cpu_fiq[4];
- qemu_irq cpu_virq[4];
- qemu_irq cpu_vfiq[4];
- MemoryRegion *sysram;
- MemoryRegion *sysmem;
- char *sysboot_filename;
-
- switch (machine_id) {
- case CALXEDA_HIGHBANK:
- machine->cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
- break;
- case CALXEDA_MIDWAY:
- machine->cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
- break;
- default:
- g_assert_not_reached();
- }
-
- for (n = 0; n < smp_cpus; n++) {
- Object *cpuobj;
- ARMCPU *cpu;
-
- cpuobj = object_new(machine->cpu_type);
- cpu = ARM_CPU(cpuobj);
-
- object_property_add_child(OBJECT(machine), "cpu[*]", cpuobj);
- object_property_set_int(cpuobj, "psci-conduit", QEMU_PSCI_CONDUIT_SMC,
- &error_abort);
-
- if (object_property_find(cpuobj, "reset-cbar")) {
- object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE,
- &error_abort);
- }
- qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
- cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
- cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ);
- cpu_virq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VIRQ);
- cpu_vfiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VFIQ);
- }
-
- sysmem = get_system_memory();
- /* SDRAM at address zero. */
- memory_region_add_subregion(sysmem, 0, machine->ram);
-
- sysram = g_new(MemoryRegion, 1);
- memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000,
- &error_fatal);
- memory_region_add_subregion(sysmem, 0xfff88000, sysram);
- if (machine->firmware != NULL) {
- sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware);
- if (sysboot_filename != NULL) {
- if (load_image_targphys(sysboot_filename, 0xfff88000, 0x8000,
- NULL) < 0) {
- error_report("Unable to load %s", machine->firmware);
- exit(1);
- }
- g_free(sysboot_filename);
- } else {
- error_report("Unable to find %s", machine->firmware);
- exit(1);
- }
- }
-
- switch (machine_id) {
- case CALXEDA_HIGHBANK:
- dev = qdev_new("l2x0");
- busdev = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(busdev, &error_fatal);
- sysbus_mmio_map(busdev, 0, 0xfff12000);
-
- dev = qdev_new(TYPE_A9MPCORE_PRIV);
- break;
- case CALXEDA_MIDWAY:
- dev = qdev_new(TYPE_A15MPCORE_PRIV);
- break;
- }
- qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
- qdev_prop_set_uint32(dev, "num-irq", GIC_EXT_IRQS + GIC_INTERNAL);
- busdev = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(busdev, &error_fatal);
- sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE);
- for (n = 0; n < smp_cpus; n++) {
- sysbus_connect_irq(busdev, n, cpu_irq[n]);
- sysbus_connect_irq(busdev, n + smp_cpus, cpu_fiq[n]);
- sysbus_connect_irq(busdev, n + 2 * smp_cpus, cpu_virq[n]);
- sysbus_connect_irq(busdev, n + 3 * smp_cpus, cpu_vfiq[n]);
- }
-
- for (n = 0; n < GIC_EXT_IRQS; n++) {
- pic[n] = qdev_get_gpio_in(dev, n);
- }
-
- dev = qdev_new("sp804");
- qdev_prop_set_uint32(dev, "freq0", 150000000);
- qdev_prop_set_uint32(dev, "freq1", 150000000);
- busdev = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(busdev, &error_fatal);
- sysbus_mmio_map(busdev, 0, 0xfff34000);
- sysbus_connect_irq(busdev, 0, pic[18]);
- pl011_create(0xfff36000, pic[20], serial_hd(0));
-
- dev = qdev_new(TYPE_HIGHBANK_REGISTERS);
- busdev = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(busdev, &error_fatal);
- sysbus_mmio_map(busdev, 0, 0xfff3c000);
-
- sysbus_create_simple("pl061", 0xfff30000, pic[14]);
- sysbus_create_simple("pl061", 0xfff31000, pic[15]);
- sysbus_create_simple("pl061", 0xfff32000, pic[16]);
- sysbus_create_simple("pl061", 0xfff33000, pic[17]);
- sysbus_create_simple("pl031", 0xfff35000, pic[19]);
- sysbus_create_simple("pl022", 0xfff39000, pic[23]);
-
- sysbus_create_simple(TYPE_SYSBUS_AHCI, 0xffe08000, pic[83]);
-
- dev = qemu_create_nic_device("xgmac", true, NULL);
- if (dev) {
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[79]);
- }
-
- dev = qemu_create_nic_device("xgmac", true, NULL);
- if (dev) {
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[82]);
- }
-
- /* TODO create and connect IDE devices for ide_drive_get() */
-
- highbank_binfo.ram_size = machine->ram_size;
- /* highbank requires a dtb in order to boot, and the dtb will override
- * the board ID. The following value is ignored, so set it to -1 to be
- * clear that the value is meaningless.
- */
- highbank_binfo.board_id = -1;
- highbank_binfo.loader_start = 0;
- highbank_binfo.board_setup_addr = BOARD_SETUP_ADDR;
- highbank_binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
-
- arm_load_kernel(ARM_CPU(first_cpu), machine, &highbank_binfo);
-}
-
-static void highbank_init(MachineState *machine)
-{
- calxeda_init(machine, CALXEDA_HIGHBANK);
-}
-
-static void midway_init(MachineState *machine)
-{
- calxeda_init(machine, CALXEDA_MIDWAY);
-}
-
-static void highbank_class_init(ObjectClass *oc, const void *data)
-{
- static const char * const valid_cpu_types[] = {
- ARM_CPU_TYPE_NAME("cortex-a9"),
- NULL
- };
- MachineClass *mc = MACHINE_CLASS(oc);
-
- mc->desc = "Calxeda Highbank (ECX-1000)";
- mc->init = highbank_init;
- mc->valid_cpu_types = valid_cpu_types;
- mc->block_default_type = IF_IDE;
- mc->units_per_default_bus = 1;
- mc->max_cpus = 4;
- mc->ignore_memory_transaction_failures = true;
- mc->default_ram_id = "highbank.dram";
- mc->deprecation_reason = "no known users left for this machine";
-}
-
-static const TypeInfo highbank_type = {
- .name = MACHINE_TYPE_NAME("highbank"),
- .parent = TYPE_MACHINE,
- .class_init = highbank_class_init,
- .interfaces = arm_machine_interfaces,
-};
-
-static void midway_class_init(ObjectClass *oc, const void *data)
-{
- static const char * const valid_cpu_types[] = {
- ARM_CPU_TYPE_NAME("cortex-a15"),
- NULL
- };
- MachineClass *mc = MACHINE_CLASS(oc);
-
- mc->desc = "Calxeda Midway (ECX-2000)";
- mc->init = midway_init;
- mc->valid_cpu_types = valid_cpu_types;
- mc->block_default_type = IF_IDE;
- mc->units_per_default_bus = 1;
- mc->max_cpus = 4;
- mc->ignore_memory_transaction_failures = true;
- mc->default_ram_id = "highbank.dram";
- mc->deprecation_reason = "no known users left for this machine";
-}
-
-static const TypeInfo midway_type = {
- .name = MACHINE_TYPE_NAME("midway"),
- .parent = TYPE_MACHINE,
- .class_init = midway_class_init,
- .interfaces = arm_machine_interfaces,
-};
-
-static void calxeda_machines_init(void)
-{
- type_register_static(&highbank_type);
- type_register_static(&midway_type);
-}
-
-type_init(calxeda_machines_init)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index c66c452737e..45fe8575fb8 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -64,22 +64,6 @@ config EXYNOS4
select USB_EHCI_SYSBUS
select OR_IRQ
-config HIGHBANK
- bool
- default y
- depends on TCG && ARM
- select A9MPCORE
- select A15MPCORE
- select AHCI_SYSBUS
- select ARM_TIMER # sp804
- select ARM_V7M
- select PL011 # UART
- select PL022 # SPI
- select PL031 # RTC
- select PL061 # GPIO
- select PL310 # cache controller
- select XGMAC # ethernet
-
config INTEGRATOR
bool
default y
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 47cdc51d135..b187b946f04 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -4,7 +4,6 @@ arm_common_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_common_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
arm_common_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c'))
-arm_common_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c'))
arm_common_ss.add(when: 'CONFIG_INTEGRATOR', if_true: files('integratorcp.c'))
arm_common_ss.add(when: 'CONFIG_MICROBIT', if_true: files('microbit.c'))
arm_common_ss.add(when: 'CONFIG_MPS3R', if_true: files('mps3r.c'))
--
2.53.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines
2026-02-26 9:07 [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Thomas Huth
@ 2026-02-26 9:30 ` Peter Maydell
2026-02-26 9:50 ` Thomas Huth
2026-02-26 10:58 ` [PATCH 2/1] hw/net: Remove the xgmac device Thomas Huth
2026-03-03 9:58 ` [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Peter Maydell
1 sibling, 2 replies; 6+ messages in thread
From: Peter Maydell @ 2026-02-26 9:30 UTC (permalink / raw)
To: Thomas Huth; +Cc: qemu-devel, Rob Herring, qemu-arm, Pierrick Bouvier
On Thu, 26 Feb 2026 at 09:07, Thomas Huth <thuth@redhat.com> wrote:
>
> From: Thomas Huth <thuth@redhat.com>
>
> These machines have been marked as deprecated two releases ago,
> and so far nobody complained that they are still useful, so it's
> time to remove these now.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> -Calxeda Highbank
> -M: Rob Herring <robh@kernel.org>
> -M: Peter Maydell <peter.maydell@linaro.org>
> -L: qemu-arm@nongnu.org
> -S: Odd Fixes
> -F: hw/arm/highbank.c
> -F: hw/net/xgmac.c
> -F: docs/system/arm/highbank.rst
The xgmac ethernet device (hw/net/xgmac.c) is used only by
these boards, so it can also be removed now. I think that's better
done with a patch after this one, so for this board removal patch
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines
2026-02-26 9:30 ` Peter Maydell
@ 2026-02-26 9:50 ` Thomas Huth
2026-02-26 10:58 ` [PATCH 2/1] hw/net: Remove the xgmac device Thomas Huth
1 sibling, 0 replies; 6+ messages in thread
From: Thomas Huth @ 2026-02-26 9:50 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-devel, Rob Herring, qemu-arm, Pierrick Bouvier
On 26/02/2026 10.30, Peter Maydell wrote:
> On Thu, 26 Feb 2026 at 09:07, Thomas Huth <thuth@redhat.com> wrote:
>>
>> From: Thomas Huth <thuth@redhat.com>
>>
>> These machines have been marked as deprecated two releases ago,
>> and so far nobody complained that they are still useful, so it's
>> time to remove these now.
>>
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>
>> -Calxeda Highbank
>> -M: Rob Herring <robh@kernel.org>
>> -M: Peter Maydell <peter.maydell@linaro.org>
>> -L: qemu-arm@nongnu.org
>> -S: Odd Fixes
>> -F: hw/arm/highbank.c
>> -F: hw/net/xgmac.c
>> -F: docs/system/arm/highbank.rst
>
> The xgmac ethernet device (hw/net/xgmac.c) is used only by
> these boards, so it can also be removed now. I think that's better
> done with a patch after this one, so for this board removal patch
Ah, right, they are created via their "xgmac" name instead of the TYPE_XGMAC
macro, so I did not notice when looking for TYPE_* in the sources.
I'll write a patch to remove that device, too.
Thomas
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/1] hw/net: Remove the xgmac device
2026-02-26 9:30 ` Peter Maydell
2026-02-26 9:50 ` Thomas Huth
@ 2026-02-26 10:58 ` Thomas Huth
2026-03-03 10:00 ` Peter Maydell
1 sibling, 1 reply; 6+ messages in thread
From: Thomas Huth @ 2026-02-26 10:58 UTC (permalink / raw)
To: Peter Maydell, qemu-devel, Rob Herring
Cc: qemu-arm, Pierrick Bouvier, Jason Wang
From: Thomas Huth <thuth@redhat.com>
The xgmac device was only used by the highbank machine that just
has been removed. Being a sysbus device that cannot be instantiated
by the user, this is dead code now and thus can be removed, too.
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
hw/net/xgmac.c | 443 ----------------------------
hw/net/Kconfig | 3 -
hw/net/meson.build | 1 -
scripts/coverity-scan/COMPONENTS.md | 2 +-
4 files changed, 1 insertion(+), 448 deletions(-)
delete mode 100644 hw/net/xgmac.c
diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c
deleted file mode 100644
index 204c78aba37..00000000000
--- a/hw/net/xgmac.c
+++ /dev/null
@@ -1,443 +0,0 @@
-/*
- * QEMU model of XGMAC Ethernet.
- *
- * derived from the Xilinx AXI-Ethernet by Edgar E. Iglesias.
- *
- * Copyright (c) 2011 Calxeda, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "qemu/osdep.h"
-#include "hw/core/irq.h"
-#include "hw/core/qdev-properties.h"
-#include "hw/core/sysbus.h"
-#include "exec/cpu-common.h"
-#include "migration/vmstate.h"
-#include "qemu/module.h"
-#include "net/net.h"
-#include "qom/object.h"
-
-#ifdef DEBUG_XGMAC
-#define DEBUGF_BRK(message, args...) do { \
- fprintf(stderr, (message), ## args); \
- } while (0)
-#else
-#define DEBUGF_BRK(message, args...) do { } while (0)
-#endif
-
-#define XGMAC_CONTROL 0x00000000 /* MAC Configuration */
-#define XGMAC_FRAME_FILTER 0x00000001 /* MAC Frame Filter */
-#define XGMAC_FLOW_CTRL 0x00000006 /* MAC Flow Control */
-#define XGMAC_VLAN_TAG 0x00000007 /* VLAN Tags */
-#define XGMAC_VERSION 0x00000008 /* Version */
-/* VLAN tag for insertion or replacement into tx frames */
-#define XGMAC_VLAN_INCL 0x00000009
-#define XGMAC_LPI_CTRL 0x0000000a /* LPI Control and Status */
-#define XGMAC_LPI_TIMER 0x0000000b /* LPI Timers Control */
-#define XGMAC_TX_PACE 0x0000000c /* Transmit Pace and Stretch */
-#define XGMAC_VLAN_HASH 0x0000000d /* VLAN Hash Table */
-#define XGMAC_DEBUG 0x0000000e /* Debug */
-#define XGMAC_INT_STATUS 0x0000000f /* Interrupt and Control */
-/* HASH table registers */
-#define XGMAC_HASH(n) ((0x00000300/4) + (n))
-#define XGMAC_NUM_HASH 16
-/* Operation Mode */
-#define XGMAC_OPMODE (0x00000400/4)
-/* Remote Wake-Up Frame Filter */
-#define XGMAC_REMOTE_WAKE (0x00000700/4)
-/* PMT Control and Status */
-#define XGMAC_PMT (0x00000704/4)
-
-#define XGMAC_ADDR_HIGH(reg) (0x00000010+((reg) * 2))
-#define XGMAC_ADDR_LOW(reg) (0x00000011+((reg) * 2))
-
-#define DMA_BUS_MODE 0x000003c0 /* Bus Mode */
-#define DMA_XMT_POLL_DEMAND 0x000003c1 /* Transmit Poll Demand */
-#define DMA_RCV_POLL_DEMAND 0x000003c2 /* Received Poll Demand */
-#define DMA_RCV_BASE_ADDR 0x000003c3 /* Receive List Base */
-#define DMA_TX_BASE_ADDR 0x000003c4 /* Transmit List Base */
-#define DMA_STATUS 0x000003c5 /* Status Register */
-#define DMA_CONTROL 0x000003c6 /* Ctrl (Operational Mode) */
-#define DMA_INTR_ENA 0x000003c7 /* Interrupt Enable */
-#define DMA_MISSED_FRAME_CTR 0x000003c8 /* Missed Frame Counter */
-/* Receive Interrupt Watchdog Timer */
-#define DMA_RI_WATCHDOG_TIMER 0x000003c9
-#define DMA_AXI_BUS 0x000003ca /* AXI Bus Mode */
-#define DMA_AXI_STATUS 0x000003cb /* AXI Status */
-#define DMA_CUR_TX_DESC_ADDR 0x000003d2 /* Current Host Tx Descriptor */
-#define DMA_CUR_RX_DESC_ADDR 0x000003d3 /* Current Host Rx Descriptor */
-#define DMA_CUR_TX_BUF_ADDR 0x000003d4 /* Current Host Tx Buffer */
-#define DMA_CUR_RX_BUF_ADDR 0x000003d5 /* Current Host Rx Buffer */
-#define DMA_HW_FEATURE 0x000003d6 /* Enabled Hardware Features */
-
-/* DMA Status register defines */
-#define DMA_STATUS_GMI 0x08000000 /* MMC interrupt */
-#define DMA_STATUS_GLI 0x04000000 /* GMAC Line interface int */
-#define DMA_STATUS_EB_MASK 0x00380000 /* Error Bits Mask */
-#define DMA_STATUS_EB_TX_ABORT 0x00080000 /* Error Bits - TX Abort */
-#define DMA_STATUS_EB_RX_ABORT 0x00100000 /* Error Bits - RX Abort */
-#define DMA_STATUS_TS_MASK 0x00700000 /* Transmit Process State */
-#define DMA_STATUS_TS_SHIFT 20
-#define DMA_STATUS_RS_MASK 0x000e0000 /* Receive Process State */
-#define DMA_STATUS_RS_SHIFT 17
-#define DMA_STATUS_NIS 0x00010000 /* Normal Interrupt Summary */
-#define DMA_STATUS_AIS 0x00008000 /* Abnormal Interrupt Summary */
-#define DMA_STATUS_ERI 0x00004000 /* Early Receive Interrupt */
-#define DMA_STATUS_FBI 0x00002000 /* Fatal Bus Error Interrupt */
-#define DMA_STATUS_ETI 0x00000400 /* Early Transmit Interrupt */
-#define DMA_STATUS_RWT 0x00000200 /* Receive Watchdog Timeout */
-#define DMA_STATUS_RPS 0x00000100 /* Receive Process Stopped */
-#define DMA_STATUS_RU 0x00000080 /* Receive Buffer Unavailable */
-#define DMA_STATUS_RI 0x00000040 /* Receive Interrupt */
-#define DMA_STATUS_UNF 0x00000020 /* Transmit Underflow */
-#define DMA_STATUS_OVF 0x00000010 /* Receive Overflow */
-#define DMA_STATUS_TJT 0x00000008 /* Transmit Jabber Timeout */
-#define DMA_STATUS_TU 0x00000004 /* Transmit Buffer Unavailable */
-#define DMA_STATUS_TPS 0x00000002 /* Transmit Process Stopped */
-#define DMA_STATUS_TI 0x00000001 /* Transmit Interrupt */
-
-/* DMA Control register defines */
-#define DMA_CONTROL_ST 0x00002000 /* Start/Stop Transmission */
-#define DMA_CONTROL_SR 0x00000002 /* Start/Stop Receive */
-#define DMA_CONTROL_DFF 0x01000000 /* Disable flush of rx frames */
-
-struct desc {
- uint32_t ctl_stat;
- uint16_t buffer1_size;
- uint16_t buffer2_size;
- uint32_t buffer1_addr;
- uint32_t buffer2_addr;
- uint32_t ext_stat;
- uint32_t res[3];
-};
-
-#define R_MAX 0x400
-
-typedef struct RxTxStats {
- uint64_t rx_bytes;
- uint64_t tx_bytes;
-
- uint64_t rx;
- uint64_t rx_bcast;
- uint64_t rx_mcast;
-} RxTxStats;
-
-#define TYPE_XGMAC "xgmac"
-OBJECT_DECLARE_SIMPLE_TYPE(XgmacState, XGMAC)
-
-struct XgmacState {
- SysBusDevice parent_obj;
-
- MemoryRegion iomem;
- qemu_irq sbd_irq;
- qemu_irq pmt_irq;
- qemu_irq mci_irq;
- NICState *nic;
- NICConf conf;
-
- struct RxTxStats stats;
- uint32_t regs[R_MAX];
-};
-
-static const VMStateDescription vmstate_rxtx_stats = {
- .name = "xgmac_stats",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT64(rx_bytes, RxTxStats),
- VMSTATE_UINT64(tx_bytes, RxTxStats),
- VMSTATE_UINT64(rx, RxTxStats),
- VMSTATE_UINT64(rx_bcast, RxTxStats),
- VMSTATE_UINT64(rx_mcast, RxTxStats),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static const VMStateDescription vmstate_xgmac = {
- .name = "xgmac",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (const VMStateField[]) {
- VMSTATE_STRUCT(stats, XgmacState, 0, vmstate_rxtx_stats, RxTxStats),
- VMSTATE_UINT32_ARRAY(regs, XgmacState, R_MAX),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static void xgmac_read_desc(XgmacState *s, struct desc *d, int rx)
-{
- uint32_t addr = rx ? s->regs[DMA_CUR_RX_DESC_ADDR] :
- s->regs[DMA_CUR_TX_DESC_ADDR];
- cpu_physical_memory_read(addr, d, sizeof(*d));
-}
-
-static void xgmac_write_desc(XgmacState *s, struct desc *d, int rx)
-{
- int reg = rx ? DMA_CUR_RX_DESC_ADDR : DMA_CUR_TX_DESC_ADDR;
- uint32_t addr = s->regs[reg];
-
- if (!rx && (d->ctl_stat & 0x00200000)) {
- s->regs[reg] = s->regs[DMA_TX_BASE_ADDR];
- } else if (rx && (d->buffer1_size & 0x8000)) {
- s->regs[reg] = s->regs[DMA_RCV_BASE_ADDR];
- } else {
- s->regs[reg] += sizeof(*d);
- }
- cpu_physical_memory_write(addr, d, sizeof(*d));
-}
-
-static void xgmac_enet_send(XgmacState *s)
-{
- struct desc bd;
- int frame_size;
- int len;
- QEMU_UNINITIALIZED uint8_t frame[8192];
- uint8_t *ptr;
-
- ptr = frame;
- frame_size = 0;
- while (1) {
- xgmac_read_desc(s, &bd, 0);
- if ((bd.ctl_stat & 0x80000000) == 0) {
- /* Run out of descriptors to transmit. */
- break;
- }
- len = (bd.buffer1_size & 0xfff) + (bd.buffer2_size & 0xfff);
-
- /*
- * FIXME: these cases of malformed tx descriptors (bad sizes)
- * should probably be reported back to the guest somehow
- * rather than simply silently stopping processing, but we
- * don't know what the hardware does in this situation.
- * This will only happen for buggy guests anyway.
- */
- if ((bd.buffer1_size & 0xfff) > 2048) {
- DEBUGF_BRK("qemu:%s:ERROR...ERROR...ERROR... -- "
- "xgmac buffer 1 len on send > 2048 (0x%x)\n",
- __func__, bd.buffer1_size & 0xfff);
- break;
- }
- if ((bd.buffer2_size & 0xfff) != 0) {
- DEBUGF_BRK("qemu:%s:ERROR...ERROR...ERROR... -- "
- "xgmac buffer 2 len on send != 0 (0x%x)\n",
- __func__, bd.buffer2_size & 0xfff);
- break;
- }
- if (frame_size + len >= sizeof(frame)) {
- DEBUGF_BRK("qemu:%s: buffer overflow %d read into %zu "
- "buffer\n" , __func__, frame_size + len, sizeof(frame));
- DEBUGF_BRK("qemu:%s: buffer1.size=%d; buffer2.size=%d\n",
- __func__, bd.buffer1_size, bd.buffer2_size);
- break;
- }
-
- cpu_physical_memory_read(bd.buffer1_addr, ptr, len);
- ptr += len;
- frame_size += len;
- if (bd.ctl_stat & 0x20000000) {
- /* Last buffer in frame. */
- qemu_send_packet(qemu_get_queue(s->nic), frame, len);
- ptr = frame;
- frame_size = 0;
- s->regs[DMA_STATUS] |= DMA_STATUS_TI | DMA_STATUS_NIS;
- }
- bd.ctl_stat &= ~0x80000000;
- /* Write back the modified descriptor. */
- xgmac_write_desc(s, &bd, 0);
- }
-}
-
-static void enet_update_irq(XgmacState *s)
-{
- int stat = s->regs[DMA_STATUS] & s->regs[DMA_INTR_ENA];
- qemu_set_irq(s->sbd_irq, !!stat);
-}
-
-static uint64_t enet_read(void *opaque, hwaddr addr, unsigned size)
-{
- XgmacState *s = opaque;
- uint64_t r = 0;
- addr >>= 2;
-
- switch (addr) {
- case XGMAC_VERSION:
- r = 0x1012;
- break;
- default:
- if (addr < ARRAY_SIZE(s->regs)) {
- r = s->regs[addr];
- }
- break;
- }
- return r;
-}
-
-static void enet_write(void *opaque, hwaddr addr,
- uint64_t value, unsigned size)
-{
- XgmacState *s = opaque;
-
- addr >>= 2;
- switch (addr) {
- case DMA_BUS_MODE:
- s->regs[DMA_BUS_MODE] = value & ~0x1;
- break;
- case DMA_XMT_POLL_DEMAND:
- xgmac_enet_send(s);
- break;
- case DMA_STATUS:
- s->regs[DMA_STATUS] = s->regs[DMA_STATUS] & ~value;
- break;
- case DMA_RCV_BASE_ADDR:
- s->regs[DMA_RCV_BASE_ADDR] = s->regs[DMA_CUR_RX_DESC_ADDR] = value;
- break;
- case DMA_TX_BASE_ADDR:
- s->regs[DMA_TX_BASE_ADDR] = s->regs[DMA_CUR_TX_DESC_ADDR] = value;
- break;
- default:
- if (addr < ARRAY_SIZE(s->regs)) {
- s->regs[addr] = value;
- }
- break;
- }
- enet_update_irq(s);
-}
-
-static const MemoryRegionOps enet_mem_ops = {
- .read = enet_read,
- .write = enet_write,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-static int eth_can_rx(XgmacState *s)
-{
- /* RX enabled? */
- return s->regs[DMA_CONTROL] & DMA_CONTROL_SR;
-}
-
-static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
-{
- XgmacState *s = qemu_get_nic_opaque(nc);
- static const unsigned char sa_bcast[6] = {0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff};
- int unicast, broadcast, multicast;
- struct desc bd;
- ssize_t ret;
-
- if (!eth_can_rx(s)) {
- return -1;
- }
- unicast = ~buf[0] & 0x1;
- broadcast = memcmp(buf, sa_bcast, 6) == 0;
- multicast = !unicast && !broadcast;
- if (size < 12) {
- s->regs[DMA_STATUS] |= DMA_STATUS_RI | DMA_STATUS_NIS;
- ret = -1;
- goto out;
- }
-
- xgmac_read_desc(s, &bd, 1);
- if ((bd.ctl_stat & 0x80000000) == 0) {
- s->regs[DMA_STATUS] |= DMA_STATUS_RU | DMA_STATUS_AIS;
- ret = size;
- goto out;
- }
-
- cpu_physical_memory_write(bd.buffer1_addr, buf, size);
-
- /* Add in the 4 bytes for crc (the real hw returns length incl crc) */
- size += 4;
- bd.ctl_stat = (size << 16) | 0x300;
- xgmac_write_desc(s, &bd, 1);
-
- s->stats.rx_bytes += size;
- s->stats.rx++;
- if (multicast) {
- s->stats.rx_mcast++;
- } else if (broadcast) {
- s->stats.rx_bcast++;
- }
-
- s->regs[DMA_STATUS] |= DMA_STATUS_RI | DMA_STATUS_NIS;
- ret = size;
-
-out:
- enet_update_irq(s);
- return ret;
-}
-
-static NetClientInfo net_xgmac_enet_info = {
- .type = NET_CLIENT_DRIVER_NIC,
- .size = sizeof(NICState),
- .receive = eth_rx,
-};
-
-static void xgmac_enet_realize(DeviceState *dev, Error **errp)
-{
- SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- XgmacState *s = XGMAC(dev);
-
- memory_region_init_io(&s->iomem, OBJECT(s), &enet_mem_ops, s,
- "xgmac", 0x1000);
- sysbus_init_mmio(sbd, &s->iomem);
- sysbus_init_irq(sbd, &s->sbd_irq);
- sysbus_init_irq(sbd, &s->pmt_irq);
- sysbus_init_irq(sbd, &s->mci_irq);
-
- qemu_macaddr_default_if_unset(&s->conf.macaddr);
- s->nic = qemu_new_nic(&net_xgmac_enet_info, &s->conf,
- object_get_typename(OBJECT(dev)), dev->id,
- &dev->mem_reentrancy_guard, s);
- qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
-
- s->regs[XGMAC_ADDR_HIGH(0)] = (s->conf.macaddr.a[5] << 8) |
- s->conf.macaddr.a[4];
- s->regs[XGMAC_ADDR_LOW(0)] = (s->conf.macaddr.a[3] << 24) |
- (s->conf.macaddr.a[2] << 16) |
- (s->conf.macaddr.a[1] << 8) |
- s->conf.macaddr.a[0];
-}
-
-static const Property xgmac_properties[] = {
- DEFINE_NIC_PROPERTIES(XgmacState, conf),
-};
-
-static void xgmac_enet_class_init(ObjectClass *klass, const void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
-
- dc->realize = xgmac_enet_realize;
- dc->vmsd = &vmstate_xgmac;
- device_class_set_props(dc, xgmac_properties);
-}
-
-static const TypeInfo xgmac_enet_info = {
- .name = TYPE_XGMAC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(XgmacState),
- .class_init = xgmac_enet_class_init,
-};
-
-static void xgmac_enet_register_types(void)
-{
- type_register_static(&xgmac_enet_info);
-}
-
-type_init(xgmac_enet_register_types)
diff --git a/hw/net/Kconfig b/hw/net/Kconfig
index 2b513d68958..f9a1dfb80de 100644
--- a/hw/net/Kconfig
+++ b/hw/net/Kconfig
@@ -79,9 +79,6 @@ config NE2000_ISA
config OPENCORES_ETH
bool
-config XGMAC
- bool
-
config ALLWINNER_EMAC
bool
diff --git a/hw/net/meson.build b/hw/net/meson.build
index 913eaedbc52..1feabe991fa 100644
--- a/hw/net/meson.build
+++ b/hw/net/meson.build
@@ -22,7 +22,6 @@ system_ss.add(when: 'CONFIG_LAN9118', if_true: files('lan9118.c'))
system_ss.add(when: 'CONFIG_LAN9118_PHY', if_true: files('lan9118_phy.c'))
system_ss.add(when: 'CONFIG_NE2000_ISA', if_true: files('ne2000-isa.c'))
system_ss.add(when: 'CONFIG_OPENCORES_ETH', if_true: files('opencores_eth.c'))
-system_ss.add(when: 'CONFIG_XGMAC', if_true: files('xgmac.c'))
system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axienet.c'))
system_ss.add(when: 'CONFIG_ALLWINNER_EMAC', if_true: files('allwinner_emac.c'))
system_ss.add(when: 'CONFIG_ALLWINNER_SUN8I_EMAC', if_true: files('allwinner-sun8i-emac.c'))
diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md
index 95805b536bc..02131f1388a 100644
--- a/scripts/coverity-scan/COMPONENTS.md
+++ b/scripts/coverity-scan/COMPONENTS.md
@@ -4,7 +4,7 @@ alpha
~ .*/qemu((/include)?/hw/alpha/.*|/target/alpha/.*)
arm
- ~ .*/qemu((/include)?/hw/arm/.*|(/include)?/hw/.*/(arm|allwinner-a10|bcm28|digic|exynos|imx|omap|stellaris|pxa2xx|versatile|zynq|cadence).*|/hw/net/xgmac.c|/hw/ssi/xilinx_spips.c|/target/arm/.*)
+ ~ .*/qemu((/include)?/hw/arm/.*|(/include)?/hw/.*/(arm|allwinner-a10|bcm28|digic|exynos|imx|omap|stellaris|pxa2xx|versatile|zynq|cadence).*|/hw/ssi/xilinx_spips.c|/target/arm/.*)
avr
~ .*/qemu((/include)?/hw/avr/.*|/target/avr/.*)
--
2.53.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines
2026-02-26 9:07 [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Thomas Huth
2026-02-26 9:30 ` Peter Maydell
@ 2026-03-03 9:58 ` Peter Maydell
1 sibling, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2026-03-03 9:58 UTC (permalink / raw)
To: Thomas Huth; +Cc: qemu-devel, Rob Herring, qemu-arm, Pierrick Bouvier
[-- Attachment #1: Type: text/plain, Size: 369 bytes --]
On Thu, 26 Feb 2026 at 09:07, Thomas Huth <thuth@redhat.com> wrote:
>
> From: Thomas Huth <thuth@redhat.com>
>
> These machines have been marked as deprecated two releases ago,
> and so far nobody complained that they are still useful, so it's
> time to remove these now.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Applied to target-arm.next, thanks.
-- PMM
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/1] hw/net: Remove the xgmac device
2026-02-26 10:58 ` [PATCH 2/1] hw/net: Remove the xgmac device Thomas Huth
@ 2026-03-03 10:00 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2026-03-03 10:00 UTC (permalink / raw)
To: Thomas Huth
Cc: qemu-devel, Rob Herring, qemu-arm, Pierrick Bouvier, Jason Wang
On Thu, 26 Feb 2026 at 10:58, Thomas Huth <thuth@redhat.com> wrote:
>
> From: Thomas Huth <thuth@redhat.com>
>
> The xgmac device was only used by the highbank machine that just
> has been removed. Being a sysbus device that cannot be instantiated
> by the user, this is dead code now and thus can be removed, too.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-03-03 10:00 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-26 9:07 [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Thomas Huth
2026-02-26 9:30 ` Peter Maydell
2026-02-26 9:50 ` Thomas Huth
2026-02-26 10:58 ` [PATCH 2/1] hw/net: Remove the xgmac device Thomas Huth
2026-03-03 10:00 ` Peter Maydell
2026-03-03 9:58 ` [PATCH] hw/arm: Remove the deprecated "highbank" and "midway" machines Peter Maydell
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