[PATCH v3 0/4] Two-pass MMU interval notifiers

[PATCH v3 0/4] Two-pass MMU interval notifiers

[Thomas Hellström]

GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.
    
With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete.

This also applies in non-recoverable page-fault scenarios to
starting a preemption requests on GPUs and waiting for the GPUs 
to preempt so that system pages they access can be reclaimed.
    
One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for two-pass in the core appears like the right choice.

So this series does that, with pach 1 implementing the core support
and also describes the choices made.

The rest of the patches implements a POC with xeKMD userptr
invalidation and potential TLB-flushing. A follow-up series
will extend to drm_gpusvm.

v2 hightlights:
- Refactor the core mm patch to use the struct
  mmu_interval_notifier_ops for the invalidate_finish() callback.
- Rebase on xe driver tlb invalidation changes.
- Provide an initial implementation for userptr instead of drm_gpusvm.
  The intent is to handle drm_gpusvm in a follow-up series.

v3:
- Address review comments from Matt Brost: Code formatting,
  documentation, additional asserts and removal of
  unnecessary waits, as specified in each patch.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>

Thomas Hellström (4):
  mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers
  drm/xe/userptr: Convert invalidation to two-pass MMU notifier
  drm/xe: Split TLB invalidation into submit and wait steps
  drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass
    if possible

 drivers/gpu/drm/xe/xe_svm.c             |   8 +-
 drivers/gpu/drm/xe/xe_tlb_inval.c       |  84 +++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.h       |   6 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h |  14 +++
 drivers/gpu/drm/xe/xe_userptr.c         | 155 ++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_userptr.h         |  31 ++++-
 drivers/gpu/drm/xe/xe_vm.c              |  99 +++++----------
 drivers/gpu/drm/xe/xe_vm.h              |   5 +-
 drivers/gpu/drm/xe/xe_vm_madvise.c      |  10 +-
 drivers/gpu/drm/xe/xe_vm_types.h        |   1 +
 include/linux/mmu_notifier.h            |  38 ++++++
 mm/mmu_notifier.c                       |  65 ++++++++--
 12 files changed, 412 insertions(+), 104 deletions(-)

-- 
2.53.0

[PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[Thomas Hellström]

GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.

With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete.

One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for multi-pass in the core appears to be the right choice.

Implement two-pass capability in the mmu_interval_notifier. Use a
linked list for the final passes to minimize the impact for
use-cases that don't need the multi-pass functionality by avoiding
a second interval tree walk, and to be able to easily pass data
between the two passes.

v1:
- Restrict to two passes (Jason Gunthorpe)
- Improve on documentation (Jason Gunthorpe)
- Improve on function naming (Alistair Popple)
v2:
- Include the invalidate_finish() callback in the
  struct mmu_interval_notifier_ops.
- Update documentation (GitHub Copilot:claude-sonnet-4.6)
- Use lockless list for list management.
v3:
- Update kerneldoc for the struct mmu_interval_notifier_finish::list member
  (Matthew Brost)
- Add a WARN_ON_ONCE() checking for NULL invalidate_finish() op if
  if invalidate_start() is non-NULL. (Matthew Brost)

Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>

Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 include/linux/mmu_notifier.h | 38 +++++++++++++++++++++
 mm/mmu_notifier.c            | 65 +++++++++++++++++++++++++++++++-----
 2 files changed, 94 insertions(+), 9 deletions(-)

diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h
index 07a2bbaf86e9..37b683163235 100644
--- a/include/linux/mmu_notifier.h
+++ b/include/linux/mmu_notifier.h
@@ -233,16 +233,54 @@ struct mmu_notifier {
 	unsigned int users;
 };
 
+/**
+ * struct mmu_interval_notifier_finish - mmu_interval_notifier two-pass abstraction
+ * @link: Lockless list link for the notifiers pending pass list
+ * @notifier: The mmu_interval_notifier for which the finish pass is called.
+ *
+ * Allocate, typically using GFP_NOWAIT in the interval notifier's first pass.
+ * If allocation fails (which is not unlikely under memory pressure), fall back
+ * to single-pass operation. Note that with a large number of notifiers
+ * implementing two passes, allocation with GFP_NOWAIT will become increasingly
+ * likely to fail, so consider implementing a small pool instead of using
+ * kmalloc() allocations.
+ *
+ * If the implementation needs to pass data between the two passes,
+ * the recommended way is to embed struct mmu_interval_notifier_finish into a larger
+ * structure that also contains the data needed to be shared. Keep in mind that
+ * a notifier callback can be invoked in parallel, and each invocation needs its
+ * own struct mmu_interval_notifier_finish.
+ */
+struct mmu_interval_notifier_finish {
+	struct llist_node link;
+	struct mmu_interval_notifier *notifier;
+};
+
 /**
  * struct mmu_interval_notifier_ops
  * @invalidate: Upon return the caller must stop using any SPTEs within this
  *              range. This function can sleep. Return false only if sleeping
  *              was required but mmu_notifier_range_blockable(range) is false.
+ * @invalidate_start: Similar to @invalidate, but intended for two-pass notifier
+ *                    callbacks where the call to @invalidate_start is the first
+ *                    pass and any struct mmu_interval_notifier_finish pointer
+ *                    returned in the @finish parameter describes the final pass.
+ *                    If @finish is %NULL on return, then no final pass will be
+ *                    called.
+ * @invalidate_finish: Called as the second pass for any notifier that returned
+ *                     a non-NULL @finish from @invalidate_start. The @finish
+ *                     pointer passed here is the same one returned by
+ *                     @invalidate_start.
  */
 struct mmu_interval_notifier_ops {
 	bool (*invalidate)(struct mmu_interval_notifier *interval_sub,
 			   const struct mmu_notifier_range *range,
 			   unsigned long cur_seq);
+	bool (*invalidate_start)(struct mmu_interval_notifier *interval_sub,
+				 const struct mmu_notifier_range *range,
+				 unsigned long cur_seq,
+				 struct mmu_interval_notifier_finish **finish);
+	void (*invalidate_finish)(struct mmu_interval_notifier_finish *finish);
 };
 
 struct mmu_interval_notifier {
diff --git a/mm/mmu_notifier.c b/mm/mmu_notifier.c
index a6cdf3674bdc..4d8a64ce8eda 100644
--- a/mm/mmu_notifier.c
+++ b/mm/mmu_notifier.c
@@ -260,6 +260,15 @@ mmu_interval_read_begin(struct mmu_interval_notifier *interval_sub)
 }
 EXPORT_SYMBOL_GPL(mmu_interval_read_begin);
 
+static void mn_itree_finish_pass(struct llist_head *finish_passes)
+{
+	struct llist_node *first = llist_reverse_order(__llist_del_all(finish_passes));
+	struct mmu_interval_notifier_finish *f, *next;
+
+	llist_for_each_entry_safe(f, next, first, link)
+		f->notifier->ops->invalidate_finish(f);
+}
+
 static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
 			     struct mm_struct *mm)
 {
@@ -271,6 +280,7 @@ static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
 		.end = ULONG_MAX,
 	};
 	struct mmu_interval_notifier *interval_sub;
+	LLIST_HEAD(finish_passes);
 	unsigned long cur_seq;
 	bool ret;
 
@@ -278,11 +288,27 @@ static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
 		     mn_itree_inv_start_range(subscriptions, &range, &cur_seq);
 	     interval_sub;
 	     interval_sub = mn_itree_inv_next(interval_sub, &range)) {
-		ret = interval_sub->ops->invalidate(interval_sub, &range,
-						    cur_seq);
+		if (interval_sub->ops->invalidate_start) {
+			struct mmu_interval_notifier_finish *finish = NULL;
+
+			ret = interval_sub->ops->invalidate_start(interval_sub,
+								  &range,
+								  cur_seq,
+								  &finish);
+			if (ret && finish) {
+				finish->notifier = interval_sub;
+				__llist_add(&finish->link, &finish_passes);
+			}
+
+		} else {
+			ret = interval_sub->ops->invalidate(interval_sub,
+							    &range,
+							    cur_seq);
+		}
 		WARN_ON(!ret);
 	}
 
+	mn_itree_finish_pass(&finish_passes);
 	mn_itree_inv_end(subscriptions);
 }
 
@@ -430,7 +456,9 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
 			       const struct mmu_notifier_range *range)
 {
 	struct mmu_interval_notifier *interval_sub;
+	LLIST_HEAD(finish_passes);
 	unsigned long cur_seq;
+	int err = 0;
 
 	for (interval_sub =
 		     mn_itree_inv_start_range(subscriptions, range, &cur_seq);
@@ -438,23 +466,41 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
 	     interval_sub = mn_itree_inv_next(interval_sub, range)) {
 		bool ret;
 
-		ret = interval_sub->ops->invalidate(interval_sub, range,
-						    cur_seq);
+		if (interval_sub->ops->invalidate_start) {
+			struct mmu_interval_notifier_finish *finish = NULL;
+
+			ret = interval_sub->ops->invalidate_start(interval_sub,
+								  range,
+								  cur_seq,
+								  &finish);
+			if (ret && finish) {
+				finish->notifier = interval_sub;
+				__llist_add(&finish->link, &finish_passes);
+			}
+
+		} else {
+			ret = interval_sub->ops->invalidate(interval_sub,
+							    range,
+							    cur_seq);
+		}
 		if (!ret) {
 			if (WARN_ON(mmu_notifier_range_blockable(range)))
 				continue;
-			goto out_would_block;
+			err = -EAGAIN;
+			break;
 		}
 	}
-	return 0;
 
-out_would_block:
+	mn_itree_finish_pass(&finish_passes);
+
 	/*
 	 * On -EAGAIN the non-blocking caller is not allowed to call
 	 * invalidate_range_end()
 	 */
-	mn_itree_inv_end(subscriptions);
-	return -EAGAIN;
+	if (err)
+		mn_itree_inv_end(subscriptions);
+
+	return err;
 }
 
 static int mn_hlist_invalidate_range_start(
@@ -976,6 +1022,7 @@ int mmu_interval_notifier_insert(struct mmu_interval_notifier *interval_sub,
 	struct mmu_notifier_subscriptions *subscriptions;
 	int ret;
 
+	WARN_ON_ONCE(ops->invalidate_start && !ops->invalidate_finish);
 	might_lock(&mm->mmap_lock);
 
 	subscriptions = smp_load_acquire(&mm->notifier_subscriptions);
-- 
2.53.0

Re: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[David Hildenbrand (Arm)]

On 3/3/26 14:34, Thomas Hellström wrote:
> GPU use-cases for mmu_interval_notifiers with hmm often involve
> starting a gpu operation and then waiting for it to complete.
> These operations are typically context preemption or TLB flushing.
> 
> With single-pass notifiers per GPU this doesn't scale in
> multi-gpu scenarios. In those scenarios we'd want to first start
> preemption- or TLB flushing on all GPUs and as a second pass wait
> for them to complete.
> 
> One can do this on per-driver basis multiplexing per-driver
> notifiers but that would mean sharing the notifier "user" lock
> across all GPUs and that doesn't scale well either, so adding support
> for multi-pass in the core appears to be the right choice.
> 
> Implement two-pass capability in the mmu_interval_notifier. Use a
> linked list for the final passes to minimize the impact for
> use-cases that don't need the multi-pass functionality by avoiding
> a second interval tree walk, and to be able to easily pass data
> between the two passes.

Please CC all maintainers+reviewers that MAINTAINERS recommends you to cc.

-- 
Cheers,

David

Re: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[Thomas Hellström]

On Wed, 2026-03-04 at 20:32 +0100, David Hildenbrand (Arm) wrote:
> On 3/3/26 14:34, Thomas Hellström wrote:
> > GPU use-cases for mmu_interval_notifiers with hmm often involve
> > starting a gpu operation and then waiting for it to complete.
> > These operations are typically context preemption or TLB flushing.
> > 
> > With single-pass notifiers per GPU this doesn't scale in
> > multi-gpu scenarios. In those scenarios we'd want to first start
> > preemption- or TLB flushing on all GPUs and as a second pass wait
> > for them to complete.
> > 
> > One can do this on per-driver basis multiplexing per-driver
> > notifiers but that would mean sharing the notifier "user" lock
> > across all GPUs and that doesn't scale well either, so adding
> > support
> > for multi-pass in the core appears to be the right choice.
> > 
> > Implement two-pass capability in the mmu_interval_notifier. Use a
> > linked list for the final passes to minimize the impact for
> > use-cases that don't need the multi-pass functionality by avoiding
> > a second interval tree walk, and to be able to easily pass data
> > between the two passes.
> 
> Please CC all maintainers+reviewers that MAINTAINERS recommends you
> to cc.


Hmm. Good point. I missed a fair number of those.

Will Resend
Thanks,

Thomas

Re: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[David Hildenbrand (Arm)]

On 3/3/26 14:34, Thomas Hellström wrote:
> GPU use-cases for mmu_interval_notifiers with hmm often involve
> starting a gpu operation and then waiting for it to complete.
> These operations are typically context preemption or TLB flushing.
> 
> With single-pass notifiers per GPU this doesn't scale in
> multi-gpu scenarios. In those scenarios we'd want to first start
> preemption- or TLB flushing on all GPUs and as a second pass wait
> for them to complete.
> 
> One can do this on per-driver basis multiplexing per-driver
> notifiers but that would mean sharing the notifier "user" lock
> across all GPUs and that doesn't scale well either, so adding support
> for multi-pass in the core appears to be the right choice.
> 
> Implement two-pass capability in the mmu_interval_notifier. Use a
> linked list for the final passes to minimize the impact for
> use-cases that don't need the multi-pass functionality by avoiding
> a second interval tree walk, and to be able to easily pass data
> between the two passes.
> 
> v1:
> - Restrict to two passes (Jason Gunthorpe)
> - Improve on documentation (Jason Gunthorpe)
> - Improve on function naming (Alistair Popple)
> v2:
> - Include the invalidate_finish() callback in the
>   struct mmu_interval_notifier_ops.
> - Update documentation (GitHub Copilot:claude-sonnet-4.6)
> - Use lockless list for list management.
> v3:
> - Update kerneldoc for the struct mmu_interval_notifier_finish::list member
>   (Matthew Brost)
> - Add a WARN_ON_ONCE() checking for NULL invalidate_finish() op if
>   if invalidate_start() is non-NULL. (Matthew Brost)
> 
> Cc: Jason Gunthorpe <jgg@ziepe.ca>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Simona Vetter <simona.vetter@ffwll.ch>
> Cc: Dave Airlie <airlied@gmail.com>
> Cc: Alistair Popple <apopple@nvidia.com>
> Cc: <dri-devel@lists.freedesktop.org>
> Cc: <linux-mm@kvack.org>
> Cc: <linux-kernel@vger.kernel.org>
> 
> Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
>  include/linux/mmu_notifier.h | 38 +++++++++++++++++++++
>  mm/mmu_notifier.c            | 65 +++++++++++++++++++++++++++++++-----
>  2 files changed, 94 insertions(+), 9 deletions(-)
> 
> diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h
> index 07a2bbaf86e9..37b683163235 100644
> --- a/include/linux/mmu_notifier.h
> +++ b/include/linux/mmu_notifier.h
> @@ -233,16 +233,54 @@ struct mmu_notifier {
>  	unsigned int users;
>  };
>  
> +/**
> + * struct mmu_interval_notifier_finish - mmu_interval_notifier two-pass abstraction
> + * @link: Lockless list link for the notifiers pending pass list
> + * @notifier: The mmu_interval_notifier for which the finish pass is called.
> + *
> + * Allocate, typically using GFP_NOWAIT in the interval notifier's first pass.

Might want to make it clear that the fist pass is "start" and the second
pass is "finish".

Two-pass makes it sound like we'd be calling the same operation (e.g.,
invalidate() ) twice.

> + * If allocation fails (which is not unlikely under memory pressure), fall back
> + * to single-pass operation. 

Do you mean that the core will fallback (calling invalidate() ) or that
it's the responsibility of the notifier to behave as if invalidate()
would be called to then return finish=NULL? I assume the latter.

Maybe this should be documented for @invalidate_start instead. (behave
like invalidate() if @finish is %NULL on return etc)

> Note that with a large number of notifiers
> + * implementing two passes, allocation with GFP_NOWAIT will become increasingly
> + * likely to fail, so consider implementing a small pool instead of using
> + * kmalloc() allocations.
> + *
> + * If the implementation needs to pass data between the two passes,
> + * the recommended way is to embed struct mmu_interval_notifier_finish into a larger
> + * structure that also contains the data needed to be shared. Keep in mind that
> + * a notifier callback can be invoked in parallel, and each invocation needs its
> + * own struct mmu_interval_notifier_finish.
> + */
> +struct mmu_interval_notifier_finish {
> +	struct llist_node link;
> +	struct mmu_interval_notifier *notifier;
> +};
> +
>  /**
>   * struct mmu_interval_notifier_ops
>   * @invalidate: Upon return the caller must stop using any SPTEs within this
>   *              range. This function can sleep. Return false only if sleeping
>   *              was required but mmu_notifier_range_blockable(range) is false.
> + * @invalidate_start: Similar to @invalidate, but intended for two-pass notifier
> + *                    callbacks where the call to @invalidate_start is the first
> + *                    pass and any struct mmu_interval_notifier_finish pointer
> + *                    returned in the @finish parameter describes the final pass.
> + *                    If @finish is %NULL on return, then no final pass will be
> + *                    called.

Is @finish guaranteed to be set to %NULL before the call? The existing
code does it, but is it something notifiers can rely on?

> + * @invalidate_finish: Called as the second pass for any notifier that returned
> + *                     a non-NULL @finish from @invalidate_start. The @finish
> + *                     pointer passed here is the same one returned by
> + *                     @invalidate_start.
>   */
>  struct mmu_interval_notifier_ops {
>  	bool (*invalidate)(struct mmu_interval_notifier *interval_sub,
>  			   const struct mmu_notifier_range *range,
>  			   unsigned long cur_seq);
> +	bool (*invalidate_start)(struct mmu_interval_notifier *interval_sub,
> +				 const struct mmu_notifier_range *range,
> +				 unsigned long cur_seq,
> +				 struct mmu_interval_notifier_finish **finish);
> +	void (*invalidate_finish)(struct mmu_interval_notifier_finish *finish);
>  };


Nothing else jumped at me, and the idea makes sense.

-- 
Cheers,

David

Re: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[Thomas Hellström]

On Wed, 2026-03-04 at 20:45 +0100, David Hildenbrand (Arm) wrote:
> On 3/3/26 14:34, Thomas Hellström wrote:
> > GPU use-cases for mmu_interval_notifiers with hmm often involve
> > starting a gpu operation and then waiting for it to complete.
> > These operations are typically context preemption or TLB flushing.
> > 
> > With single-pass notifiers per GPU this doesn't scale in
> > multi-gpu scenarios. In those scenarios we'd want to first start
> > preemption- or TLB flushing on all GPUs and as a second pass wait
> > for them to complete.
> > 
> > One can do this on per-driver basis multiplexing per-driver
> > notifiers but that would mean sharing the notifier "user" lock
> > across all GPUs and that doesn't scale well either, so adding
> > support
> > for multi-pass in the core appears to be the right choice.
> > 
> > Implement two-pass capability in the mmu_interval_notifier. Use a
> > linked list for the final passes to minimize the impact for
> > use-cases that don't need the multi-pass functionality by avoiding
> > a second interval tree walk, and to be able to easily pass data
> > between the two passes.
> > 
> > v1:
> > - Restrict to two passes (Jason Gunthorpe)
> > - Improve on documentation (Jason Gunthorpe)
> > - Improve on function naming (Alistair Popple)
> > v2:
> > - Include the invalidate_finish() callback in the
> >   struct mmu_interval_notifier_ops.
> > - Update documentation (GitHub Copilot:claude-sonnet-4.6)
> > - Use lockless list for list management.
> > v3:
> > - Update kerneldoc for the struct
> > mmu_interval_notifier_finish::list member
> >   (Matthew Brost)
> > - Add a WARN_ON_ONCE() checking for NULL invalidate_finish() op if
> >   if invalidate_start() is non-NULL. (Matthew Brost)
> > 
> > Cc: Jason Gunthorpe <jgg@ziepe.ca>
> > Cc: Andrew Morton <akpm@linux-foundation.org>
> > Cc: Simona Vetter <simona.vetter@ffwll.ch>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: Alistair Popple <apopple@nvidia.com>
> > Cc: <dri-devel@lists.freedesktop.org>
> > Cc: <linux-mm@kvack.org>
> > Cc: <linux-kernel@vger.kernel.org>
> > 
> > Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.
> > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > ---
> >  include/linux/mmu_notifier.h | 38 +++++++++++++++++++++
> >  mm/mmu_notifier.c            | 65 +++++++++++++++++++++++++++++++-
> > ----
> >  2 files changed, 94 insertions(+), 9 deletions(-)
> > 
> > diff --git a/include/linux/mmu_notifier.h
> > b/include/linux/mmu_notifier.h
> > index 07a2bbaf86e9..37b683163235 100644
> > --- a/include/linux/mmu_notifier.h
> > +++ b/include/linux/mmu_notifier.h
> > @@ -233,16 +233,54 @@ struct mmu_notifier {
> >  	unsigned int users;
> >  };
> >  
> > +/**
> > + * struct mmu_interval_notifier_finish - mmu_interval_notifier
> > two-pass abstraction
> > + * @link: Lockless list link for the notifiers pending pass list
> > + * @notifier: The mmu_interval_notifier for which the finish pass
> > is called.
> > + *
> > + * Allocate, typically using GFP_NOWAIT in the interval notifier's
> > first pass.
> 
> Might want to make it clear that the fist pass is "start" and the
> second
> pass is "finish".
> 
> Two-pass makes it sound like we'd be calling the same operation
> (e.g.,
> invalidate() ) twice.
> 
> > + * If allocation fails (which is not unlikely under memory
> > pressure), fall back
> > + * to single-pass operation. 
> 
> Do you mean that the core will fallback (calling invalidate() ) or
> that
> it's the responsibility of the notifier to behave as if invalidate()
> would be called to then return finish=NULL? I assume the latter.
> 
> Maybe this should be documented for @invalidate_start instead.
> (behave
> like invalidate() if @finish is %NULL on return etc)
> 
> > Note that with a large number of notifiers
> > + * implementing two passes, allocation with GFP_NOWAIT will become
> > increasingly
> > + * likely to fail, so consider implementing a small pool instead
> > of using
> > + * kmalloc() allocations.
> > + *
> > + * If the implementation needs to pass data between the two
> > passes,
> > + * the recommended way is to embed struct
> > mmu_interval_notifier_finish into a larger
> > + * structure that also contains the data needed to be shared. Keep
> > in mind that
> > + * a notifier callback can be invoked in parallel, and each
> > invocation needs its
> > + * own struct mmu_interval_notifier_finish.
> > + */
> > +struct mmu_interval_notifier_finish {
> > +	struct llist_node link;
> > +	struct mmu_interval_notifier *notifier;
> > +};
> > +
> >  /**
> >   * struct mmu_interval_notifier_ops
> >   * @invalidate: Upon return the caller must stop using any SPTEs
> > within this
> >   *              range. This function can sleep. Return false only
> > if sleeping
> >   *              was required but
> > mmu_notifier_range_blockable(range) is false.
> > + * @invalidate_start: Similar to @invalidate, but intended for
> > two-pass notifier
> > + *                    callbacks where the call to
> > @invalidate_start is the first
> > + *                    pass and any struct
> > mmu_interval_notifier_finish pointer
> > + *                    returned in the @finish parameter describes
> > the final pass.
> > + *                    If @finish is %NULL on return, then no final
> > pass will be
> > + *                    called.
> 
> Is @finish guaranteed to be set to %NULL before the call? The
> existing
> code does it, but is it something notifiers can rely on?
> 
> > + * @invalidate_finish: Called as the second pass for any notifier
> > that returned
> > + *                     a non-NULL @finish from @invalidate_start.
> > The @finish
> > + *                     pointer passed here is the same one
> > returned by
> > + *                     @invalidate_start.
> >   */
> >  struct mmu_interval_notifier_ops {
> >  	bool (*invalidate)(struct mmu_interval_notifier
> > *interval_sub,
> >  			   const struct mmu_notifier_range *range,
> >  			   unsigned long cur_seq);
> > +	bool (*invalidate_start)(struct mmu_interval_notifier
> > *interval_sub,
> > +				 const struct mmu_notifier_range
> > *range,
> > +				 unsigned long cur_seq,
> > +				 struct
> > mmu_interval_notifier_finish **finish);
> > +	void (*invalidate_finish)(struct
> > mmu_interval_notifier_finish *finish);
> >  };
> 
> 
> Nothing else jumped at me, and the idea makes sense.


Thanks. I sent out a v4 addressing the above and to a wider audience.

Thanks,
Thomas

[PATCH v3 2/4] drm/xe/userptr: Convert invalidation to two-pass MMU notifier

[Thomas Hellström]

In multi-GPU scenarios, asynchronous GPU job latency is a bottleneck if
each notifier waits for its own GPU before returning. The two-pass
mmu_interval_notifier infrastructure allows deferring the wait to a
second pass, so all GPUs can be signalled in the first pass before
any of them are waited on.

Convert the userptr invalidation to use the two-pass model:

Use invalidate_start as the first pass to mark the VMA for repin and
enable software signalling on the VM reservation fences to start any
gpu work needed for signaling. Fall back to completing the work
synchronously if all fences are already signalled, or if a concurrent
invalidation is already using the embedded finish structure.

Use invalidate_finish as the second pass to wait for the reservation
fences to complete, invalidate the GPU TLB in fault mode, and unmap
the gpusvm pages.

Embed a struct mmu_interval_notifier_finish in struct xe_userptr to
avoid dynamic allocation in the notifier callback. Use a finish_inuse
flag to prevent two concurrent invalidations from using it
simultaneously; fall back to the synchronous path for the second caller.

v3:
- Add locking asserts in notifier components (Matt Brost)
- Clean up newlines (Matt Brost)
- Update the userptr notifier state member locking documentation
  (Matt Brost)

Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/xe/xe_userptr.c | 108 +++++++++++++++++++++++++-------
 drivers/gpu/drm/xe/xe_userptr.h |  14 ++++-
 2 files changed, 99 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_userptr.c b/drivers/gpu/drm/xe/xe_userptr.c
index e120323c43bc..37032b8125a6 100644
--- a/drivers/gpu/drm/xe/xe_userptr.c
+++ b/drivers/gpu/drm/xe/xe_userptr.c
@@ -10,6 +10,14 @@
 
 #include "xe_trace_bo.h"
 
+static void xe_userptr_assert_in_notifier(struct xe_vm *vm)
+{
+	lockdep_assert(lockdep_is_held_type(&vm->svm.gpusvm.notifier_lock, 0) ||
+		       (lockdep_is_held(&vm->lock) &&
+			lockdep_is_held_type(&vm->svm.gpusvm.notifier_lock, 1) &&
+			dma_resv_held(xe_vm_resv(vm))));
+}
+
 /**
  * xe_vma_userptr_check_repin() - Advisory check for repin needed
  * @uvma: The userptr vma
@@ -73,18 +81,46 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
 				    &ctx);
 }
 
-static void __vma_userptr_invalidate(struct xe_vm *vm, struct xe_userptr_vma *uvma)
+static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma,
+				    bool is_deferred)
 {
 	struct xe_userptr *userptr = &uvma->userptr;
 	struct xe_vma *vma = &uvma->vma;
-	struct dma_resv_iter cursor;
-	struct dma_fence *fence;
 	struct drm_gpusvm_ctx ctx = {
 		.in_notifier = true,
 		.read_only = xe_vma_read_only(vma),
 	};
 	long err;
 
+	xe_userptr_assert_in_notifier(vm);
+
+	err = dma_resv_wait_timeout(xe_vm_resv(vm),
+				    DMA_RESV_USAGE_BOOKKEEP,
+				    false, MAX_SCHEDULE_TIMEOUT);
+	XE_WARN_ON(err <= 0);
+
+	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
+		err = xe_vm_invalidate_vma(vma);
+		XE_WARN_ON(err);
+	}
+
+	if (is_deferred)
+		userptr->finish_inuse = false;
+	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
+			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
+}
+
+static struct mmu_interval_notifier_finish *
+xe_vma_userptr_invalidate_pass1(struct xe_vm *vm, struct xe_userptr_vma *uvma)
+{
+	struct xe_userptr *userptr = &uvma->userptr;
+	struct xe_vma *vma = &uvma->vma;
+	struct dma_resv_iter cursor;
+	struct dma_fence *fence;
+	bool signaled = true;
+
+	xe_userptr_assert_in_notifier(vm);
+
 	/*
 	 * Tell exec and rebind worker they need to repin and rebind this
 	 * userptr.
@@ -105,27 +141,32 @@ static void __vma_userptr_invalidate(struct xe_vm *vm, struct xe_userptr_vma *uv
 	 */
 	dma_resv_iter_begin(&cursor, xe_vm_resv(vm),
 			    DMA_RESV_USAGE_BOOKKEEP);
-	dma_resv_for_each_fence_unlocked(&cursor, fence)
+	dma_resv_for_each_fence_unlocked(&cursor, fence) {
 		dma_fence_enable_sw_signaling(fence);
+		if (signaled && !dma_fence_is_signaled(fence))
+			signaled = false;
+	}
 	dma_resv_iter_end(&cursor);
 
-	err = dma_resv_wait_timeout(xe_vm_resv(vm),
-				    DMA_RESV_USAGE_BOOKKEEP,
-				    false, MAX_SCHEDULE_TIMEOUT);
-	XE_WARN_ON(err <= 0);
-
-	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
-		err = xe_vm_invalidate_vma(vma);
-		XE_WARN_ON(err);
+	/*
+	 * Only one caller at a time can use the multi-pass state.
+	 * If it's already in use, or all fences are already signaled,
+	 * proceed directly to invalidation without deferring.
+	 */
+	if (signaled || userptr->finish_inuse) {
+		xe_vma_userptr_do_inval(vm, uvma, false);
+		return NULL;
 	}
 
-	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
-			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
+	userptr->finish_inuse = true;
+
+	return &userptr->finish;
 }
 
-static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni,
-				   const struct mmu_notifier_range *range,
-				   unsigned long cur_seq)
+static bool xe_vma_userptr_invalidate_start(struct mmu_interval_notifier *mni,
+					    const struct mmu_notifier_range *range,
+					    unsigned long cur_seq,
+					    struct mmu_interval_notifier_finish **p_finish)
 {
 	struct xe_userptr_vma *uvma = container_of(mni, typeof(*uvma), userptr.notifier);
 	struct xe_vma *vma = &uvma->vma;
@@ -138,21 +179,40 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni,
 		return false;
 
 	vm_dbg(&xe_vma_vm(vma)->xe->drm,
-	       "NOTIFIER: addr=0x%016llx, range=0x%016llx",
+	       "NOTIFIER PASS1: addr=0x%016llx, range=0x%016llx",
 		xe_vma_start(vma), xe_vma_size(vma));
 
 	down_write(&vm->svm.gpusvm.notifier_lock);
 	mmu_interval_set_seq(mni, cur_seq);
 
-	__vma_userptr_invalidate(vm, uvma);
+	*p_finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
+
 	up_write(&vm->svm.gpusvm.notifier_lock);
-	trace_xe_vma_userptr_invalidate_complete(vma);
+	if (!*p_finish)
+		trace_xe_vma_userptr_invalidate_complete(vma);
 
 	return true;
 }
 
+static void xe_vma_userptr_invalidate_finish(struct mmu_interval_notifier_finish *finish)
+{
+	struct xe_userptr_vma *uvma = container_of(finish, typeof(*uvma), userptr.finish);
+	struct xe_vma *vma = &uvma->vma;
+	struct xe_vm *vm = xe_vma_vm(vma);
+
+	vm_dbg(&xe_vma_vm(vma)->xe->drm,
+	       "NOTIFIER PASS2: addr=0x%016llx, range=0x%016llx",
+		xe_vma_start(vma), xe_vma_size(vma));
+
+	down_write(&vm->svm.gpusvm.notifier_lock);
+	xe_vma_userptr_do_inval(vm, uvma, true);
+	up_write(&vm->svm.gpusvm.notifier_lock);
+	trace_xe_vma_userptr_invalidate_complete(vma);
+}
+
 static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = {
-	.invalidate = vma_userptr_invalidate,
+	.invalidate_start = xe_vma_userptr_invalidate_start,
+	.invalidate_finish = xe_vma_userptr_invalidate_finish,
 };
 
 #if IS_ENABLED(CONFIG_DRM_XE_USERPTR_INVAL_INJECT)
@@ -164,6 +224,7 @@ static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = {
  */
 void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
 {
+	static struct mmu_interval_notifier_finish *finish;
 	struct xe_vm *vm = xe_vma_vm(&uvma->vma);
 
 	/* Protect against concurrent userptr pinning */
@@ -179,7 +240,10 @@ void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
 	if (!mmu_interval_read_retry(&uvma->userptr.notifier,
 				     uvma->userptr.pages.notifier_seq))
 		uvma->userptr.pages.notifier_seq -= 2;
-	__vma_userptr_invalidate(vm, uvma);
+
+	finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
+	if (finish)
+		xe_vma_userptr_do_inval(vm, uvma, true);
 }
 #endif
 
diff --git a/drivers/gpu/drm/xe/xe_userptr.h b/drivers/gpu/drm/xe/xe_userptr.h
index ef801234991e..e1830c2f5fd2 100644
--- a/drivers/gpu/drm/xe/xe_userptr.h
+++ b/drivers/gpu/drm/xe/xe_userptr.h
@@ -56,7 +56,19 @@ struct xe_userptr {
 	 * @notifier: MMU notifier for user pointer (invalidation call back)
 	 */
 	struct mmu_interval_notifier notifier;
-
+	/**
+	 * @finish: MMU notifier finish structure for two-pass invalidation.
+	 * Embedded here to avoid allocation in the notifier callback.
+	 * Protected by struct xe_vm::svm.gpusvm.notifier_lock in write mode
+	 * alternatively by the same lock in read mode *and* the vm resv held.
+	 */
+	struct mmu_interval_notifier_finish finish;
+	/**
+	 * @finish_inuse: Whether @finish is currently in use by an in-progress
+	 * two-pass invalidation.
+	 * Protected using the same locking as @finish.
+	 */
+	bool finish_inuse;
 	/**
 	 * @initial_bind: user pointer has been bound at least once.
 	 * write: vm->svm.gpusvm.notifier_lock in read mode and vm->resv held.
-- 
2.53.0

Re: [PATCH v3 2/4] drm/xe/userptr: Convert invalidation to two-pass MMU notifier

[Matthew Brost]

On Tue, Mar 03, 2026 at 02:34:07PM +0100, Thomas Hellström wrote:
> In multi-GPU scenarios, asynchronous GPU job latency is a bottleneck if
> each notifier waits for its own GPU before returning. The two-pass
> mmu_interval_notifier infrastructure allows deferring the wait to a
> second pass, so all GPUs can be signalled in the first pass before
> any of them are waited on.
> 
> Convert the userptr invalidation to use the two-pass model:
> 
> Use invalidate_start as the first pass to mark the VMA for repin and
> enable software signalling on the VM reservation fences to start any
> gpu work needed for signaling. Fall back to completing the work
> synchronously if all fences are already signalled, or if a concurrent
> invalidation is already using the embedded finish structure.
> 
> Use invalidate_finish as the second pass to wait for the reservation
> fences to complete, invalidate the GPU TLB in fault mode, and unmap
> the gpusvm pages.
> 
> Embed a struct mmu_interval_notifier_finish in struct xe_userptr to
> avoid dynamic allocation in the notifier callback. Use a finish_inuse
> flag to prevent two concurrent invalidations from using it
> simultaneously; fall back to the synchronous path for the second caller.
> 
> v3:
> - Add locking asserts in notifier components (Matt Brost)
> - Clean up newlines (Matt Brost)
> - Update the userptr notifier state member locking documentation
>   (Matt Brost)
> 
> Assisted-by: GitHub Copilot:claude-sonnet-4.6
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_userptr.c | 108 +++++++++++++++++++++++++-------
>  drivers/gpu/drm/xe/xe_userptr.h |  14 ++++-
>  2 files changed, 99 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_userptr.c b/drivers/gpu/drm/xe/xe_userptr.c
> index e120323c43bc..37032b8125a6 100644
> --- a/drivers/gpu/drm/xe/xe_userptr.c
> +++ b/drivers/gpu/drm/xe/xe_userptr.c
> @@ -10,6 +10,14 @@
>  
>  #include "xe_trace_bo.h"
>  
> +static void xe_userptr_assert_in_notifier(struct xe_vm *vm)
> +{
> +	lockdep_assert(lockdep_is_held_type(&vm->svm.gpusvm.notifier_lock, 0) ||
> +		       (lockdep_is_held(&vm->lock) &&
> +			lockdep_is_held_type(&vm->svm.gpusvm.notifier_lock, 1) &&
> +			dma_resv_held(xe_vm_resv(vm))));
> +}
> +
>  /**
>   * xe_vma_userptr_check_repin() - Advisory check for repin needed
>   * @uvma: The userptr vma
> @@ -73,18 +81,46 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
>  				    &ctx);
>  }
>  
> -static void __vma_userptr_invalidate(struct xe_vm *vm, struct xe_userptr_vma *uvma)
> +static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma,
> +				    bool is_deferred)
>  {
>  	struct xe_userptr *userptr = &uvma->userptr;
>  	struct xe_vma *vma = &uvma->vma;
> -	struct dma_resv_iter cursor;
> -	struct dma_fence *fence;
>  	struct drm_gpusvm_ctx ctx = {
>  		.in_notifier = true,
>  		.read_only = xe_vma_read_only(vma),
>  	};
>  	long err;
>  
> +	xe_userptr_assert_in_notifier(vm);
> +
> +	err = dma_resv_wait_timeout(xe_vm_resv(vm),
> +				    DMA_RESV_USAGE_BOOKKEEP,
> +				    false, MAX_SCHEDULE_TIMEOUT);
> +	XE_WARN_ON(err <= 0);
> +
> +	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
> +		err = xe_vm_invalidate_vma(vma);
> +		XE_WARN_ON(err);
> +	}
> +
> +	if (is_deferred)
> +		userptr->finish_inuse = false;
> +	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
> +			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
> +}
> +
> +static struct mmu_interval_notifier_finish *
> +xe_vma_userptr_invalidate_pass1(struct xe_vm *vm, struct xe_userptr_vma *uvma)
> +{
> +	struct xe_userptr *userptr = &uvma->userptr;
> +	struct xe_vma *vma = &uvma->vma;
> +	struct dma_resv_iter cursor;
> +	struct dma_fence *fence;
> +	bool signaled = true;
> +
> +	xe_userptr_assert_in_notifier(vm);
> +
>  	/*
>  	 * Tell exec and rebind worker they need to repin and rebind this
>  	 * userptr.
> @@ -105,27 +141,32 @@ static void __vma_userptr_invalidate(struct xe_vm *vm, struct xe_userptr_vma *uv
>  	 */
>  	dma_resv_iter_begin(&cursor, xe_vm_resv(vm),
>  			    DMA_RESV_USAGE_BOOKKEEP);
> -	dma_resv_for_each_fence_unlocked(&cursor, fence)
> +	dma_resv_for_each_fence_unlocked(&cursor, fence) {
>  		dma_fence_enable_sw_signaling(fence);
> +		if (signaled && !dma_fence_is_signaled(fence))
> +			signaled = false;
> +	}
>  	dma_resv_iter_end(&cursor);
>  
> -	err = dma_resv_wait_timeout(xe_vm_resv(vm),
> -				    DMA_RESV_USAGE_BOOKKEEP,
> -				    false, MAX_SCHEDULE_TIMEOUT);
> -	XE_WARN_ON(err <= 0);
> -
> -	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
> -		err = xe_vm_invalidate_vma(vma);
> -		XE_WARN_ON(err);
> +	/*
> +	 * Only one caller at a time can use the multi-pass state.
> +	 * If it's already in use, or all fences are already signaled,
> +	 * proceed directly to invalidation without deferring.
> +	 */
> +	if (signaled || userptr->finish_inuse) {
> +		xe_vma_userptr_do_inval(vm, uvma, false);
> +		return NULL;
>  	}
>  
> -	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
> -			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
> +	userptr->finish_inuse = true;
> +
> +	return &userptr->finish;
>  }
>  
> -static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni,
> -				   const struct mmu_notifier_range *range,
> -				   unsigned long cur_seq)
> +static bool xe_vma_userptr_invalidate_start(struct mmu_interval_notifier *mni,
> +					    const struct mmu_notifier_range *range,
> +					    unsigned long cur_seq,
> +					    struct mmu_interval_notifier_finish **p_finish)
>  {
>  	struct xe_userptr_vma *uvma = container_of(mni, typeof(*uvma), userptr.notifier);
>  	struct xe_vma *vma = &uvma->vma;
> @@ -138,21 +179,40 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni,
>  		return false;
>  
>  	vm_dbg(&xe_vma_vm(vma)->xe->drm,
> -	       "NOTIFIER: addr=0x%016llx, range=0x%016llx",
> +	       "NOTIFIER PASS1: addr=0x%016llx, range=0x%016llx",
>  		xe_vma_start(vma), xe_vma_size(vma));
>  
>  	down_write(&vm->svm.gpusvm.notifier_lock);
>  	mmu_interval_set_seq(mni, cur_seq);
>  
> -	__vma_userptr_invalidate(vm, uvma);
> +	*p_finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
> +
>  	up_write(&vm->svm.gpusvm.notifier_lock);
> -	trace_xe_vma_userptr_invalidate_complete(vma);
> +	if (!*p_finish)
> +		trace_xe_vma_userptr_invalidate_complete(vma);
>  
>  	return true;
>  }
>  
> +static void xe_vma_userptr_invalidate_finish(struct mmu_interval_notifier_finish *finish)
> +{
> +	struct xe_userptr_vma *uvma = container_of(finish, typeof(*uvma), userptr.finish);
> +	struct xe_vma *vma = &uvma->vma;
> +	struct xe_vm *vm = xe_vma_vm(vma);
> +
> +	vm_dbg(&xe_vma_vm(vma)->xe->drm,
> +	       "NOTIFIER PASS2: addr=0x%016llx, range=0x%016llx",
> +		xe_vma_start(vma), xe_vma_size(vma));
> +
> +	down_write(&vm->svm.gpusvm.notifier_lock);
> +	xe_vma_userptr_do_inval(vm, uvma, true);
> +	up_write(&vm->svm.gpusvm.notifier_lock);
> +	trace_xe_vma_userptr_invalidate_complete(vma);
> +}
> +
>  static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = {
> -	.invalidate = vma_userptr_invalidate,
> +	.invalidate_start = xe_vma_userptr_invalidate_start,
> +	.invalidate_finish = xe_vma_userptr_invalidate_finish,
>  };
>  
>  #if IS_ENABLED(CONFIG_DRM_XE_USERPTR_INVAL_INJECT)
> @@ -164,6 +224,7 @@ static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = {
>   */
>  void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
>  {
> +	static struct mmu_interval_notifier_finish *finish;
>  	struct xe_vm *vm = xe_vma_vm(&uvma->vma);
>  
>  	/* Protect against concurrent userptr pinning */
> @@ -179,7 +240,10 @@ void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
>  	if (!mmu_interval_read_retry(&uvma->userptr.notifier,
>  				     uvma->userptr.pages.notifier_seq))
>  		uvma->userptr.pages.notifier_seq -= 2;
> -	__vma_userptr_invalidate(vm, uvma);
> +
> +	finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
> +	if (finish)
> +		xe_vma_userptr_do_inval(vm, uvma, true);
>  }
>  #endif
>  
> diff --git a/drivers/gpu/drm/xe/xe_userptr.h b/drivers/gpu/drm/xe/xe_userptr.h
> index ef801234991e..e1830c2f5fd2 100644
> --- a/drivers/gpu/drm/xe/xe_userptr.h
> +++ b/drivers/gpu/drm/xe/xe_userptr.h
> @@ -56,7 +56,19 @@ struct xe_userptr {
>  	 * @notifier: MMU notifier for user pointer (invalidation call back)
>  	 */
>  	struct mmu_interval_notifier notifier;
> -
> +	/**
> +	 * @finish: MMU notifier finish structure for two-pass invalidation.
> +	 * Embedded here to avoid allocation in the notifier callback.
> +	 * Protected by struct xe_vm::svm.gpusvm.notifier_lock in write mode
> +	 * alternatively by the same lock in read mode *and* the vm resv held.
> +	 */
> +	struct mmu_interval_notifier_finish finish;
> +	/**
> +	 * @finish_inuse: Whether @finish is currently in use by an in-progress
> +	 * two-pass invalidation.
> +	 * Protected using the same locking as @finish.
> +	 */
> +	bool finish_inuse;
>  	/**
>  	 * @initial_bind: user pointer has been bound at least once.
>  	 * write: vm->svm.gpusvm.notifier_lock in read mode and vm->resv held.
> -- 
> 2.53.0
> 

[PATCH v3 3/4] drm/xe: Split TLB invalidation into submit and wait steps

[Thomas Hellström]

xe_vm_range_tilemask_tlb_inval() submits TLB invalidation requests to
all GTs in a tile mask and then immediately waits for them to complete
before returning. This is fine for the existing callers, but a
subsequent patch will need to defer the wait in order to overlap TLB
invalidations across multiple VMAs.

Introduce xe_tlb_inval_range_tilemask_submit() and
xe_tlb_inval_batch_wait() in xe_tlb_inval.c as the submit and wait
halves respectively. The batch of fences is carried in the new
xe_tlb_inval_batch structure. Remove xe_vm_range_tilemask_tlb_inval()
and convert all three call sites to the new API.

v3:
- Don't wait on TLB invalidation batches if the corresponding batch
  submit returns an error. (Matt Brost)
- s/_batch/batch/ (Matt Brost)

Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/xe/xe_svm.c             |  8 ++-
 drivers/gpu/drm/xe/xe_tlb_inval.c       | 84 +++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_tlb_inval.h       |  6 ++
 drivers/gpu/drm/xe/xe_tlb_inval_types.h | 14 +++++
 drivers/gpu/drm/xe/xe_vm.c              | 69 +++-----------------
 drivers/gpu/drm/xe/xe_vm.h              |  3 -
 drivers/gpu/drm/xe/xe_vm_madvise.c      | 10 ++-
 drivers/gpu/drm/xe/xe_vm_types.h        |  1 +
 8 files changed, 127 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 002b6c22ad3f..a91c84487a67 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -19,6 +19,7 @@
 #include "xe_pt.h"
 #include "xe_svm.h"
 #include "xe_tile.h"
+#include "xe_tlb_inval.h"
 #include "xe_ttm_vram_mgr.h"
 #include "xe_vm.h"
 #include "xe_vm_types.h"
@@ -225,6 +226,7 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
 			      const struct mmu_notifier_range *mmu_range)
 {
 	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
+	struct xe_tlb_inval_batch batch;
 	struct xe_device *xe = vm->xe;
 	struct drm_gpusvm_range *r, *first;
 	struct xe_tile *tile;
@@ -276,8 +278,10 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
 
 	xe_device_wmb(xe);
 
-	err = xe_vm_range_tilemask_tlb_inval(vm, adj_start, adj_end, tile_mask);
-	WARN_ON_ONCE(err);
+	err = xe_tlb_inval_range_tilemask_submit(xe, vm->usm.asid, adj_start, adj_end,
+						 tile_mask, &batch);
+	if (!WARN_ON_ONCE(err))
+		xe_tlb_inval_batch_wait(&batch);
 
 range_notifier_event_end:
 	r = first;
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index 933f30fb617d..10dcd4abb00f 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -486,3 +486,87 @@ bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval)
 	guard(spinlock_irq)(&tlb_inval->pending_lock);
 	return list_is_singular(&tlb_inval->pending_fences);
 }
+
+/**
+ * xe_tlb_inval_batch_wait() - Wait for all fences in a TLB invalidation batch
+ * @batch: Batch of TLB invalidation fences to wait on
+ *
+ * Waits for every fence in @batch to signal, then resets @batch so it can be
+ * reused for a subsequent invalidation.
+ */
+void xe_tlb_inval_batch_wait(struct xe_tlb_inval_batch *batch)
+{
+	struct xe_tlb_inval_fence *fence = &batch->fence[0];
+	unsigned int i;
+
+	for (i = 0; i < batch->num_fences; ++i)
+		xe_tlb_inval_fence_wait(fence++);
+
+	batch->num_fences = 0;
+}
+
+/**
+ * xe_tlb_inval_range_tilemask_submit() - Submit TLB invalidations for an
+ * address range on a tile mask
+ * @xe: The xe device
+ * @asid: Address space ID
+ * @start: start address
+ * @end: end address
+ * @tile_mask: mask for which gt's issue tlb invalidation
+ * @batch: Batch of tlb invalidate fences
+ *
+ * Issue a range based TLB invalidation for gt's in tilemask
+ * If the function returns an error, there is no need to call
+ * xe_tlb_inval_batch_wait() on @batch.
+ *
+ * Returns 0 for success, negative error code otherwise.
+ */
+int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
+				       u64 start, u64 end, u8 tile_mask,
+				       struct xe_tlb_inval_batch *batch)
+{
+	struct xe_tlb_inval_fence *fence = &batch->fence[0];
+	struct xe_tile *tile;
+	u32 fence_id = 0;
+	u8 id;
+	int err;
+
+	batch->num_fences = 0;
+	if (!tile_mask)
+		return 0;
+
+	for_each_tile(tile, xe, id) {
+		if (!(tile_mask & BIT(id)))
+			continue;
+
+		xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
+					&fence[fence_id], true);
+
+		err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
+					 &fence[fence_id], start, end,
+					 asid, NULL);
+		if (err)
+			goto wait;
+		++fence_id;
+
+		if (!tile->media_gt)
+			continue;
+
+		xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
+					&fence[fence_id], true);
+
+		err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
+					 &fence[fence_id], start, end,
+					 asid, NULL);
+		if (err)
+			goto wait;
+		++fence_id;
+	}
+
+wait:
+	batch->num_fences = fence_id;
+	if (err)
+		xe_tlb_inval_batch_wait(batch);
+
+	return err;
+}
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
index 62089254fa23..a76b7823a5f2 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
@@ -45,4 +45,10 @@ void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int seqno);
 
 bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval);
 
+int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
+				       u64 start, u64 end, u8 tile_mask,
+				       struct xe_tlb_inval_batch *batch);
+
+void xe_tlb_inval_batch_wait(struct xe_tlb_inval_batch *batch);
+
 #endif	/* _XE_TLB_INVAL_ */
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index 3b089f90f002..3d1797d186fd 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -9,6 +9,8 @@
 #include <linux/workqueue.h>
 #include <linux/dma-fence.h>
 
+#include "xe_device_types.h"
+
 struct drm_suballoc;
 struct xe_tlb_inval;
 
@@ -132,4 +134,16 @@ struct xe_tlb_inval_fence {
 	ktime_t inval_time;
 };
 
+/**
+ * struct xe_tlb_inval_batch - Batch of TLB invalidation fences
+ *
+ * Holds one fence per GT covered by a TLB invalidation request.
+ */
+struct xe_tlb_inval_batch {
+	/** @fence: per-GT TLB invalidation fences */
+	struct xe_tlb_inval_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
+	/** @num_fences: number of valid entries in @fence */
+	unsigned int num_fences;
+};
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 548b0769b3ef..a3c2e8cefec7 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3966,66 +3966,6 @@ void xe_vm_unlock(struct xe_vm *vm)
 	dma_resv_unlock(xe_vm_resv(vm));
 }
 
-/**
- * xe_vm_range_tilemask_tlb_inval - Issue a TLB invalidation on this tilemask for an
- * address range
- * @vm: The VM
- * @start: start address
- * @end: end address
- * @tile_mask: mask for which gt's issue tlb invalidation
- *
- * Issue a range based TLB invalidation for gt's in tilemask
- *
- * Returns 0 for success, negative error code otherwise.
- */
-int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
-				   u64 end, u8 tile_mask)
-{
-	struct xe_tlb_inval_fence
-		fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
-	struct xe_tile *tile;
-	u32 fence_id = 0;
-	u8 id;
-	int err;
-
-	if (!tile_mask)
-		return 0;
-
-	for_each_tile(tile, vm->xe, id) {
-		if (!(tile_mask & BIT(id)))
-			continue;
-
-		xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
-					&fence[fence_id], true);
-
-		err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
-					 &fence[fence_id], start, end,
-					 vm->usm.asid, NULL);
-		if (err)
-			goto wait;
-		++fence_id;
-
-		if (!tile->media_gt)
-			continue;
-
-		xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
-					&fence[fence_id], true);
-
-		err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
-					 &fence[fence_id], start, end,
-					 vm->usm.asid, NULL);
-		if (err)
-			goto wait;
-		++fence_id;
-	}
-
-wait:
-	for (id = 0; id < fence_id; ++id)
-		xe_tlb_inval_fence_wait(&fence[id]);
-
-	return err;
-}
-
 /**
  * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
  * @vma: VMA to invalidate
@@ -4040,6 +3980,7 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 {
 	struct xe_device *xe = xe_vma_vm(vma)->xe;
 	struct xe_vm *vm = xe_vma_vm(vma);
+	struct xe_tlb_inval_batch batch;
 	struct xe_tile *tile;
 	u8 tile_mask = 0;
 	int ret = 0;
@@ -4080,12 +4021,16 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 
 	xe_device_wmb(xe);
 
-	ret = xe_vm_range_tilemask_tlb_inval(xe_vma_vm(vma), xe_vma_start(vma),
-					     xe_vma_end(vma), tile_mask);
+	ret = xe_tlb_inval_range_tilemask_submit(xe, xe_vma_vm(vma)->usm.asid,
+						 xe_vma_start(vma), xe_vma_end(vma),
+						 tile_mask, &batch);
 
 	/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
 	WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
 
+	if (!ret)
+		xe_tlb_inval_batch_wait(&batch);
+
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index f849e369432b..62f4b6fec0bc 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -240,9 +240,6 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
 struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
 				     struct xe_svm_range *range);
 
-int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
-				   u64 end, u8 tile_mask);
-
 int xe_vm_invalidate_vma(struct xe_vma *vma);
 
 int xe_vm_validate_protected(struct xe_vm *vm);
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
index 95bf53cc29e3..02daf8a93044 100644
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
@@ -12,6 +12,7 @@
 #include "xe_pat.h"
 #include "xe_pt.h"
 #include "xe_svm.h"
+#include "xe_tlb_inval.h"
 
 struct xe_vmas_in_madvise_range {
 	u64 addr;
@@ -235,13 +236,20 @@ static u8 xe_zap_ptes_in_madvise_range(struct xe_vm *vm, u64 start, u64 end)
 static int xe_vm_invalidate_madvise_range(struct xe_vm *vm, u64 start, u64 end)
 {
 	u8 tile_mask = xe_zap_ptes_in_madvise_range(vm, start, end);
+	struct xe_tlb_inval_batch batch;
+	int err;
 
 	if (!tile_mask)
 		return 0;
 
 	xe_device_wmb(vm->xe);
 
-	return xe_vm_range_tilemask_tlb_inval(vm, start, end, tile_mask);
+	err = xe_tlb_inval_range_tilemask_submit(vm->xe, vm->usm.asid, start, end,
+						 tile_mask, &batch);
+	if (!err)
+		xe_tlb_inval_batch_wait(&batch);
+
+	return err;
 }
 
 static bool madvise_args_are_sane(struct xe_device *xe, const struct drm_xe_madvise *args)
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 1f6f7e30e751..de6544165cfa 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -18,6 +18,7 @@
 #include "xe_device_types.h"
 #include "xe_pt_types.h"
 #include "xe_range_fence.h"
+#include "xe_tlb_inval_types.h"
 #include "xe_userptr.h"
 
 struct drm_pagemap;
-- 
2.53.0

Re: [PATCH v3 3/4] drm/xe: Split TLB invalidation into submit and wait steps

[Matthew Brost]

On Tue, Mar 03, 2026 at 02:34:08PM +0100, Thomas Hellström wrote:
> xe_vm_range_tilemask_tlb_inval() submits TLB invalidation requests to
> all GTs in a tile mask and then immediately waits for them to complete
> before returning. This is fine for the existing callers, but a
> subsequent patch will need to defer the wait in order to overlap TLB
> invalidations across multiple VMAs.
> 
> Introduce xe_tlb_inval_range_tilemask_submit() and
> xe_tlb_inval_batch_wait() in xe_tlb_inval.c as the submit and wait
> halves respectively. The batch of fences is carried in the new
> xe_tlb_inval_batch structure. Remove xe_vm_range_tilemask_tlb_inval()
> and convert all three call sites to the new API.
> 
> v3:
> - Don't wait on TLB invalidation batches if the corresponding batch
>   submit returns an error. (Matt Brost)
> - s/_batch/batch/ (Matt Brost)
> 
> Assisted-by: GitHub Copilot:claude-sonnet-4.6
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_svm.c             |  8 ++-
>  drivers/gpu/drm/xe/xe_tlb_inval.c       | 84 +++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_tlb_inval.h       |  6 ++
>  drivers/gpu/drm/xe/xe_tlb_inval_types.h | 14 +++++
>  drivers/gpu/drm/xe/xe_vm.c              | 69 +++-----------------
>  drivers/gpu/drm/xe/xe_vm.h              |  3 -
>  drivers/gpu/drm/xe/xe_vm_madvise.c      | 10 ++-
>  drivers/gpu/drm/xe/xe_vm_types.h        |  1 +
>  8 files changed, 127 insertions(+), 68 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
> index 002b6c22ad3f..a91c84487a67 100644
> --- a/drivers/gpu/drm/xe/xe_svm.c
> +++ b/drivers/gpu/drm/xe/xe_svm.c
> @@ -19,6 +19,7 @@
>  #include "xe_pt.h"
>  #include "xe_svm.h"
>  #include "xe_tile.h"
> +#include "xe_tlb_inval.h"
>  #include "xe_ttm_vram_mgr.h"
>  #include "xe_vm.h"
>  #include "xe_vm_types.h"
> @@ -225,6 +226,7 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
>  			      const struct mmu_notifier_range *mmu_range)
>  {
>  	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
> +	struct xe_tlb_inval_batch batch;
>  	struct xe_device *xe = vm->xe;
>  	struct drm_gpusvm_range *r, *first;
>  	struct xe_tile *tile;
> @@ -276,8 +278,10 @@ static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
>  
>  	xe_device_wmb(xe);
>  
> -	err = xe_vm_range_tilemask_tlb_inval(vm, adj_start, adj_end, tile_mask);
> -	WARN_ON_ONCE(err);
> +	err = xe_tlb_inval_range_tilemask_submit(xe, vm->usm.asid, adj_start, adj_end,
> +						 tile_mask, &batch);
> +	if (!WARN_ON_ONCE(err))
> +		xe_tlb_inval_batch_wait(&batch);
>  
>  range_notifier_event_end:
>  	r = first;
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> index 933f30fb617d..10dcd4abb00f 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> @@ -486,3 +486,87 @@ bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval)
>  	guard(spinlock_irq)(&tlb_inval->pending_lock);
>  	return list_is_singular(&tlb_inval->pending_fences);
>  }
> +
> +/**
> + * xe_tlb_inval_batch_wait() - Wait for all fences in a TLB invalidation batch
> + * @batch: Batch of TLB invalidation fences to wait on
> + *
> + * Waits for every fence in @batch to signal, then resets @batch so it can be
> + * reused for a subsequent invalidation.
> + */
> +void xe_tlb_inval_batch_wait(struct xe_tlb_inval_batch *batch)
> +{
> +	struct xe_tlb_inval_fence *fence = &batch->fence[0];
> +	unsigned int i;
> +
> +	for (i = 0; i < batch->num_fences; ++i)
> +		xe_tlb_inval_fence_wait(fence++);
> +
> +	batch->num_fences = 0;
> +}
> +
> +/**
> + * xe_tlb_inval_range_tilemask_submit() - Submit TLB invalidations for an
> + * address range on a tile mask
> + * @xe: The xe device
> + * @asid: Address space ID
> + * @start: start address
> + * @end: end address
> + * @tile_mask: mask for which gt's issue tlb invalidation
> + * @batch: Batch of tlb invalidate fences
> + *
> + * Issue a range based TLB invalidation for gt's in tilemask
> + * If the function returns an error, there is no need to call
> + * xe_tlb_inval_batch_wait() on @batch.
> + *
> + * Returns 0 for success, negative error code otherwise.
> + */
> +int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
> +				       u64 start, u64 end, u8 tile_mask,
> +				       struct xe_tlb_inval_batch *batch)
> +{
> +	struct xe_tlb_inval_fence *fence = &batch->fence[0];
> +	struct xe_tile *tile;
> +	u32 fence_id = 0;
> +	u8 id;
> +	int err;
> +
> +	batch->num_fences = 0;
> +	if (!tile_mask)
> +		return 0;
> +
> +	for_each_tile(tile, xe, id) {
> +		if (!(tile_mask & BIT(id)))
> +			continue;
> +
> +		xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
> +					&fence[fence_id], true);
> +
> +		err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
> +					 &fence[fence_id], start, end,
> +					 asid, NULL);
> +		if (err)
> +			goto wait;
> +		++fence_id;
> +
> +		if (!tile->media_gt)
> +			continue;
> +
> +		xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
> +					&fence[fence_id], true);
> +
> +		err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
> +					 &fence[fence_id], start, end,
> +					 asid, NULL);
> +		if (err)
> +			goto wait;
> +		++fence_id;
> +	}
> +
> +wait:
> +	batch->num_fences = fence_id;
> +	if (err)
> +		xe_tlb_inval_batch_wait(batch);
> +
> +	return err;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h b/drivers/gpu/drm/xe/xe_tlb_inval.h
> index 62089254fa23..a76b7823a5f2 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> @@ -45,4 +45,10 @@ void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int seqno);
>  
>  bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval);
>  
> +int xe_tlb_inval_range_tilemask_submit(struct xe_device *xe, u32 asid,
> +				       u64 start, u64 end, u8 tile_mask,
> +				       struct xe_tlb_inval_batch *batch);
> +
> +void xe_tlb_inval_batch_wait(struct xe_tlb_inval_batch *batch);
> +
>  #endif	/* _XE_TLB_INVAL_ */
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> index 3b089f90f002..3d1797d186fd 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
> @@ -9,6 +9,8 @@
>  #include <linux/workqueue.h>
>  #include <linux/dma-fence.h>
>  
> +#include "xe_device_types.h"
> +
>  struct drm_suballoc;
>  struct xe_tlb_inval;
>  
> @@ -132,4 +134,16 @@ struct xe_tlb_inval_fence {
>  	ktime_t inval_time;
>  };
>  
> +/**
> + * struct xe_tlb_inval_batch - Batch of TLB invalidation fences
> + *
> + * Holds one fence per GT covered by a TLB invalidation request.
> + */
> +struct xe_tlb_inval_batch {
> +	/** @fence: per-GT TLB invalidation fences */
> +	struct xe_tlb_inval_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> +	/** @num_fences: number of valid entries in @fence */
> +	unsigned int num_fences;
> +};
> +
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 548b0769b3ef..a3c2e8cefec7 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -3966,66 +3966,6 @@ void xe_vm_unlock(struct xe_vm *vm)
>  	dma_resv_unlock(xe_vm_resv(vm));
>  }
>  
> -/**
> - * xe_vm_range_tilemask_tlb_inval - Issue a TLB invalidation on this tilemask for an
> - * address range
> - * @vm: The VM
> - * @start: start address
> - * @end: end address
> - * @tile_mask: mask for which gt's issue tlb invalidation
> - *
> - * Issue a range based TLB invalidation for gt's in tilemask
> - *
> - * Returns 0 for success, negative error code otherwise.
> - */
> -int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
> -				   u64 end, u8 tile_mask)
> -{
> -	struct xe_tlb_inval_fence
> -		fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
> -	struct xe_tile *tile;
> -	u32 fence_id = 0;
> -	u8 id;
> -	int err;
> -
> -	if (!tile_mask)
> -		return 0;
> -
> -	for_each_tile(tile, vm->xe, id) {
> -		if (!(tile_mask & BIT(id)))
> -			continue;
> -
> -		xe_tlb_inval_fence_init(&tile->primary_gt->tlb_inval,
> -					&fence[fence_id], true);
> -
> -		err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
> -					 &fence[fence_id], start, end,
> -					 vm->usm.asid, NULL);
> -		if (err)
> -			goto wait;
> -		++fence_id;
> -
> -		if (!tile->media_gt)
> -			continue;
> -
> -		xe_tlb_inval_fence_init(&tile->media_gt->tlb_inval,
> -					&fence[fence_id], true);
> -
> -		err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
> -					 &fence[fence_id], start, end,
> -					 vm->usm.asid, NULL);
> -		if (err)
> -			goto wait;
> -		++fence_id;
> -	}
> -
> -wait:
> -	for (id = 0; id < fence_id; ++id)
> -		xe_tlb_inval_fence_wait(&fence[id]);
> -
> -	return err;
> -}
> -
>  /**
>   * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
>   * @vma: VMA to invalidate
> @@ -4040,6 +3980,7 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>  {
>  	struct xe_device *xe = xe_vma_vm(vma)->xe;
>  	struct xe_vm *vm = xe_vma_vm(vma);
> +	struct xe_tlb_inval_batch batch;
>  	struct xe_tile *tile;
>  	u8 tile_mask = 0;
>  	int ret = 0;
> @@ -4080,12 +4021,16 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>  
>  	xe_device_wmb(xe);
>  
> -	ret = xe_vm_range_tilemask_tlb_inval(xe_vma_vm(vma), xe_vma_start(vma),
> -					     xe_vma_end(vma), tile_mask);
> +	ret = xe_tlb_inval_range_tilemask_submit(xe, xe_vma_vm(vma)->usm.asid,
> +						 xe_vma_start(vma), xe_vma_end(vma),
> +						 tile_mask, &batch);
>  
>  	/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
>  	WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
>  
> +	if (!ret)
> +		xe_tlb_inval_batch_wait(&batch);
> +
>  	return ret;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index f849e369432b..62f4b6fec0bc 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -240,9 +240,6 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
>  struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
>  				     struct xe_svm_range *range);
>  
> -int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
> -				   u64 end, u8 tile_mask);
> -
>  int xe_vm_invalidate_vma(struct xe_vma *vma);
>  
>  int xe_vm_validate_protected(struct xe_vm *vm);
> diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
> index 95bf53cc29e3..02daf8a93044 100644
> --- a/drivers/gpu/drm/xe/xe_vm_madvise.c
> +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
> @@ -12,6 +12,7 @@
>  #include "xe_pat.h"
>  #include "xe_pt.h"
>  #include "xe_svm.h"
> +#include "xe_tlb_inval.h"
>  
>  struct xe_vmas_in_madvise_range {
>  	u64 addr;
> @@ -235,13 +236,20 @@ static u8 xe_zap_ptes_in_madvise_range(struct xe_vm *vm, u64 start, u64 end)
>  static int xe_vm_invalidate_madvise_range(struct xe_vm *vm, u64 start, u64 end)
>  {
>  	u8 tile_mask = xe_zap_ptes_in_madvise_range(vm, start, end);
> +	struct xe_tlb_inval_batch batch;
> +	int err;
>  
>  	if (!tile_mask)
>  		return 0;
>  
>  	xe_device_wmb(vm->xe);
>  
> -	return xe_vm_range_tilemask_tlb_inval(vm, start, end, tile_mask);
> +	err = xe_tlb_inval_range_tilemask_submit(vm->xe, vm->usm.asid, start, end,
> +						 tile_mask, &batch);
> +	if (!err)
> +		xe_tlb_inval_batch_wait(&batch);
> +
> +	return err;
>  }
>  
>  static bool madvise_args_are_sane(struct xe_device *xe, const struct drm_xe_madvise *args)
> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
> index 1f6f7e30e751..de6544165cfa 100644
> --- a/drivers/gpu/drm/xe/xe_vm_types.h
> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
> @@ -18,6 +18,7 @@
>  #include "xe_device_types.h"
>  #include "xe_pt_types.h"
>  #include "xe_range_fence.h"
> +#include "xe_tlb_inval_types.h"
>  #include "xe_userptr.h"
>  
>  struct drm_pagemap;
> -- 
> 2.53.0
> 

[PATCH v3 4/4] drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible

[Thomas Hellström]

Now that the two-pass notifier flow uses xe_vma_userptr_do_inval() for
the fence-wait + TLB-invalidate work, extend it to support a further
deferred TLB wait:

- xe_vma_userptr_do_inval(): when the embedded finish handle is free,
  submit the TLB invalidation asynchronously (xe_vm_invalidate_vma_submit)
  and return &userptr->finish so the mmu_notifier core schedules a third
  pass.  When the handle is occupied by a concurrent invalidation, fall
  back to the synchronous xe_vm_invalidate_vma() path.

- xe_vma_userptr_complete_tlb_inval(): new helper called from
  invalidate_finish when tlb_inval_submitted is set.  Waits for the
  previously submitted batch and unmaps the gpusvm pages.

xe_vma_userptr_invalidate_finish() dispatches between the two helpers
via tlb_inval_submitted, making the three possible flows explicit:

  pass1 (fences pending)  -> invalidate_finish -> do_inval (sync TLB)
  pass1 (fences done)     -> do_inval -> invalidate_finish
                          -> complete_tlb_inval (deferred TLB)
  pass1 (finish occupied) -> do_inval (sync TLB, inline)

In multi-GPU scenarios this allows TLB flushes to be submitted on all
GPUs in one pass before any of them are waited on.

Also adds xe_vm_invalidate_vma_submit() which submits the TLB range
invalidation without blocking, populating a xe_tlb_inval_batch that
the caller waits on separately.

v3:
- Add locking asserts and notifier state asserts (Matt Brost)
- Update the locking documentation of the notifier
  state members (Matt Brost)
- Remove unrelated code formatting changes (Matt Brost)

Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/xe/xe_userptr.c | 63 ++++++++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_userptr.h | 17 +++++++++
 drivers/gpu/drm/xe/xe_vm.c      | 38 +++++++++++++++-----
 drivers/gpu/drm/xe/xe_vm.h      |  2 ++
 4 files changed, 104 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_userptr.c b/drivers/gpu/drm/xe/xe_userptr.c
index 37032b8125a6..6761005c0b90 100644
--- a/drivers/gpu/drm/xe/xe_userptr.c
+++ b/drivers/gpu/drm/xe/xe_userptr.c
@@ -8,6 +8,7 @@
 
 #include <linux/mm.h>
 
+#include "xe_tlb_inval.h"
 #include "xe_trace_bo.h"
 
 static void xe_userptr_assert_in_notifier(struct xe_vm *vm)
@@ -81,8 +82,8 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
 				    &ctx);
 }
 
-static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma,
-				    bool is_deferred)
+static struct mmu_interval_notifier_finish *
+xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma, bool is_deferred)
 {
 	struct xe_userptr *userptr = &uvma->userptr;
 	struct xe_vma *vma = &uvma->vma;
@@ -93,6 +94,8 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
 	long err;
 
 	xe_userptr_assert_in_notifier(vm);
+	if (is_deferred)
+		xe_assert(vm->xe, userptr->finish_inuse && !userptr->tlb_inval_submitted);
 
 	err = dma_resv_wait_timeout(xe_vm_resv(vm),
 				    DMA_RESV_USAGE_BOOKKEEP,
@@ -100,6 +103,19 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
 	XE_WARN_ON(err <= 0);
 
 	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
+		if (!userptr->finish_inuse) {
+			/*
+			 * Defer the TLB wait to an extra pass so the caller
+			 * can pipeline TLB flushes across GPUs before waiting
+			 * on any of them.
+			 */
+			xe_assert(vm->xe, !userptr->tlb_inval_submitted);
+			userptr->finish_inuse = true;
+			userptr->tlb_inval_submitted = true;
+			err = xe_vm_invalidate_vma_submit(vma, &userptr->inval_batch);
+			XE_WARN_ON(err);
+			return &userptr->finish;
+		}
 		err = xe_vm_invalidate_vma(vma);
 		XE_WARN_ON(err);
 	}
@@ -108,6 +124,28 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
 		userptr->finish_inuse = false;
 	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
 			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
+	return NULL;
+}
+
+static void
+xe_vma_userptr_complete_tlb_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma)
+{
+	struct xe_userptr *userptr = &uvma->userptr;
+	struct xe_vma *vma = &uvma->vma;
+	struct drm_gpusvm_ctx ctx = {
+		.in_notifier = true,
+		.read_only = xe_vma_read_only(vma),
+	};
+
+	xe_userptr_assert_in_notifier(vm);
+	xe_assert(vm->xe, userptr->finish_inuse);
+	xe_assert(vm->xe, userptr->tlb_inval_submitted);
+
+	xe_tlb_inval_batch_wait(&userptr->inval_batch);
+	userptr->tlb_inval_submitted = false;
+	userptr->finish_inuse = false;
+	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
+			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
 }
 
 static struct mmu_interval_notifier_finish *
@@ -153,11 +191,10 @@ xe_vma_userptr_invalidate_pass1(struct xe_vm *vm, struct xe_userptr_vma *uvma)
 	 * If it's already in use, or all fences are already signaled,
 	 * proceed directly to invalidation without deferring.
 	 */
-	if (signaled || userptr->finish_inuse) {
-		xe_vma_userptr_do_inval(vm, uvma, false);
-		return NULL;
-	}
+	if (signaled || userptr->finish_inuse)
+		return xe_vma_userptr_do_inval(vm, uvma, false);
 
+	/* Defer: the notifier core will call invalidate_finish once done. */
 	userptr->finish_inuse = true;
 
 	return &userptr->finish;
@@ -205,7 +242,15 @@ static void xe_vma_userptr_invalidate_finish(struct mmu_interval_notifier_finish
 		xe_vma_start(vma), xe_vma_size(vma));
 
 	down_write(&vm->svm.gpusvm.notifier_lock);
-	xe_vma_userptr_do_inval(vm, uvma, true);
+	/*
+	 * If a TLB invalidation was previously submitted (deferred from the
+	 * synchronous pass1 fallback), wait for it and unmap pages.
+	 * Otherwise, fences have now completed: invalidate the TLB and unmap.
+	 */
+	if (uvma->userptr.tlb_inval_submitted)
+		xe_vma_userptr_complete_tlb_inval(vm, uvma);
+	else
+		xe_vma_userptr_do_inval(vm, uvma, true);
 	up_write(&vm->svm.gpusvm.notifier_lock);
 	trace_xe_vma_userptr_invalidate_complete(vma);
 }
@@ -243,7 +288,9 @@ void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
 
 	finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
 	if (finish)
-		xe_vma_userptr_do_inval(vm, uvma, true);
+		finish = xe_vma_userptr_do_inval(vm, uvma, true);
+	if (finish)
+		xe_vma_userptr_complete_tlb_inval(vm, uvma);
 }
 #endif
 
diff --git a/drivers/gpu/drm/xe/xe_userptr.h b/drivers/gpu/drm/xe/xe_userptr.h
index e1830c2f5fd2..2a3cd1b5efbb 100644
--- a/drivers/gpu/drm/xe/xe_userptr.h
+++ b/drivers/gpu/drm/xe/xe_userptr.h
@@ -14,6 +14,8 @@
 
 #include <drm/drm_gpusvm.h>
 
+#include "xe_tlb_inval_types.h"
+
 struct xe_vm;
 struct xe_vma;
 struct xe_userptr_vma;
@@ -63,12 +65,27 @@ struct xe_userptr {
 	 * alternatively by the same lock in read mode *and* the vm resv held.
 	 */
 	struct mmu_interval_notifier_finish finish;
+	/**
+	 * @inval_batch: TLB invalidation batch for deferred completion.
+	 * Stores an in-flight TLB invalidation submitted during a two-pass
+	 * notifier so the wait can be deferred to a subsequent pass, allowing
+	 * multiple GPUs to be signalled before any of them are waited on.
+	 * Protected using the same locking as @finish.
+	 */
+	struct xe_tlb_inval_batch inval_batch;
 	/**
 	 * @finish_inuse: Whether @finish is currently in use by an in-progress
 	 * two-pass invalidation.
 	 * Protected using the same locking as @finish.
 	 */
 	bool finish_inuse;
+	/**
+	 * @tlb_inval_submitted: Whether a TLB invalidation has been submitted
+	 * via @inval_batch and is pending completion.  When set, the next pass
+	 * must call xe_tlb_inval_batch_wait() before reusing @inval_batch.
+	 * Protected using the same locking as @finish.
+	 */
+	bool tlb_inval_submitted;
 	/**
 	 * @initial_bind: user pointer has been bound at least once.
 	 * write: vm->svm.gpusvm.notifier_lock in read mode and vm->resv held.
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index a3c2e8cefec7..fdad9329dfb4 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3967,20 +3967,23 @@ void xe_vm_unlock(struct xe_vm *vm)
 }
 
 /**
- * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
+ * xe_vm_invalidate_vma_submit - Submit a job to invalidate GPU mappings for
+ * VMA.
  * @vma: VMA to invalidate
+ * @batch: TLB invalidation batch to populate; caller must later call
+ *         xe_tlb_inval_batch_wait() on it to wait for completion
  *
  * Walks a list of page tables leaves which it memset the entries owned by this
- * VMA to zero, invalidates the TLBs, and block until TLBs invalidation is
- * complete.
+ * VMA to zero, invalidates the TLBs, but doesn't block waiting for TLB flush
+ * to complete, but instead populates @batch which can be waited on using
+ * xe_tlb_inval_batch_wait().
  *
  * Returns 0 for success, negative error code otherwise.
  */
-int xe_vm_invalidate_vma(struct xe_vma *vma)
+int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch)
 {
 	struct xe_device *xe = xe_vma_vm(vma)->xe;
 	struct xe_vm *vm = xe_vma_vm(vma);
-	struct xe_tlb_inval_batch batch;
 	struct xe_tile *tile;
 	u8 tile_mask = 0;
 	int ret = 0;
@@ -4023,14 +4026,33 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 
 	ret = xe_tlb_inval_range_tilemask_submit(xe, xe_vma_vm(vma)->usm.asid,
 						 xe_vma_start(vma), xe_vma_end(vma),
-						 tile_mask, &batch);
+						 tile_mask, batch);
 
 	/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
 	WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
+	return ret;
+}
+
+/**
+ * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
+ * @vma: VMA to invalidate
+ *
+ * Walks a list of page tables leaves which it memset the entries owned by this
+ * VMA to zero, invalidates the TLBs, and block until TLBs invalidation is
+ * complete.
+ *
+ * Returns 0 for success, negative error code otherwise.
+ */
+int xe_vm_invalidate_vma(struct xe_vma *vma)
+{
+	struct xe_tlb_inval_batch batch;
+	int ret;
 
-	if (!ret)
-		xe_tlb_inval_batch_wait(&batch);
+	ret = xe_vm_invalidate_vma_submit(vma, &batch);
+	if (ret)
+		return ret;
 
+	xe_tlb_inval_batch_wait(&batch);
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index 62f4b6fec0bc..0bc7ed23eeae 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -242,6 +242,8 @@ struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
 
 int xe_vm_invalidate_vma(struct xe_vma *vma);
 
+int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch);
+
 int xe_vm_validate_protected(struct xe_vm *vm);
 
 static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)
-- 
2.53.0

Re: [PATCH v3 4/4] drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible

[Matthew Brost]

On Tue, Mar 03, 2026 at 02:34:09PM +0100, Thomas Hellström wrote:
> Now that the two-pass notifier flow uses xe_vma_userptr_do_inval() for
> the fence-wait + TLB-invalidate work, extend it to support a further
> deferred TLB wait:
> 
> - xe_vma_userptr_do_inval(): when the embedded finish handle is free,
>   submit the TLB invalidation asynchronously (xe_vm_invalidate_vma_submit)
>   and return &userptr->finish so the mmu_notifier core schedules a third
>   pass.  When the handle is occupied by a concurrent invalidation, fall
>   back to the synchronous xe_vm_invalidate_vma() path.
> 
> - xe_vma_userptr_complete_tlb_inval(): new helper called from
>   invalidate_finish when tlb_inval_submitted is set.  Waits for the
>   previously submitted batch and unmaps the gpusvm pages.
> 
> xe_vma_userptr_invalidate_finish() dispatches between the two helpers
> via tlb_inval_submitted, making the three possible flows explicit:
> 
>   pass1 (fences pending)  -> invalidate_finish -> do_inval (sync TLB)
>   pass1 (fences done)     -> do_inval -> invalidate_finish
>                           -> complete_tlb_inval (deferred TLB)
>   pass1 (finish occupied) -> do_inval (sync TLB, inline)
> 
> In multi-GPU scenarios this allows TLB flushes to be submitted on all
> GPUs in one pass before any of them are waited on.
> 
> Also adds xe_vm_invalidate_vma_submit() which submits the TLB range
> invalidation without blocking, populating a xe_tlb_inval_batch that
> the caller waits on separately.
> 
> v3:
> - Add locking asserts and notifier state asserts (Matt Brost)
> - Update the locking documentation of the notifier
>   state members (Matt Brost)
> - Remove unrelated code formatting changes (Matt Brost)
> 
> Assisted-by: GitHub Copilot:claude-sonnet-4.6
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_userptr.c | 63 ++++++++++++++++++++++++++++-----
>  drivers/gpu/drm/xe/xe_userptr.h | 17 +++++++++
>  drivers/gpu/drm/xe/xe_vm.c      | 38 +++++++++++++++-----
>  drivers/gpu/drm/xe/xe_vm.h      |  2 ++
>  4 files changed, 104 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_userptr.c b/drivers/gpu/drm/xe/xe_userptr.c
> index 37032b8125a6..6761005c0b90 100644
> --- a/drivers/gpu/drm/xe/xe_userptr.c
> +++ b/drivers/gpu/drm/xe/xe_userptr.c
> @@ -8,6 +8,7 @@
>  
>  #include <linux/mm.h>
>  
> +#include "xe_tlb_inval.h"
>  #include "xe_trace_bo.h"
>  
>  static void xe_userptr_assert_in_notifier(struct xe_vm *vm)
> @@ -81,8 +82,8 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
>  				    &ctx);
>  }
>  
> -static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma,
> -				    bool is_deferred)
> +static struct mmu_interval_notifier_finish *
> +xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma, bool is_deferred)
>  {
>  	struct xe_userptr *userptr = &uvma->userptr;
>  	struct xe_vma *vma = &uvma->vma;
> @@ -93,6 +94,8 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
>  	long err;
>  
>  	xe_userptr_assert_in_notifier(vm);
> +	if (is_deferred)
> +		xe_assert(vm->xe, userptr->finish_inuse && !userptr->tlb_inval_submitted);
>  
>  	err = dma_resv_wait_timeout(xe_vm_resv(vm),
>  				    DMA_RESV_USAGE_BOOKKEEP,
> @@ -100,6 +103,19 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
>  	XE_WARN_ON(err <= 0);
>  
>  	if (xe_vm_in_fault_mode(vm) && userptr->initial_bind) {
> +		if (!userptr->finish_inuse) {
> +			/*
> +			 * Defer the TLB wait to an extra pass so the caller
> +			 * can pipeline TLB flushes across GPUs before waiting
> +			 * on any of them.
> +			 */
> +			xe_assert(vm->xe, !userptr->tlb_inval_submitted);
> +			userptr->finish_inuse = true;
> +			userptr->tlb_inval_submitted = true;
> +			err = xe_vm_invalidate_vma_submit(vma, &userptr->inval_batch);
> +			XE_WARN_ON(err);
> +			return &userptr->finish;
> +		}
>  		err = xe_vm_invalidate_vma(vma);
>  		XE_WARN_ON(err);
>  	}
> @@ -108,6 +124,28 @@ static void xe_vma_userptr_do_inval(struct xe_vm *vm, struct xe_userptr_vma *uvm
>  		userptr->finish_inuse = false;
>  	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
>  			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
> +	return NULL;
> +}
> +
> +static void
> +xe_vma_userptr_complete_tlb_inval(struct xe_vm *vm, struct xe_userptr_vma *uvma)
> +{
> +	struct xe_userptr *userptr = &uvma->userptr;
> +	struct xe_vma *vma = &uvma->vma;
> +	struct drm_gpusvm_ctx ctx = {
> +		.in_notifier = true,
> +		.read_only = xe_vma_read_only(vma),
> +	};
> +
> +	xe_userptr_assert_in_notifier(vm);
> +	xe_assert(vm->xe, userptr->finish_inuse);
> +	xe_assert(vm->xe, userptr->tlb_inval_submitted);
> +
> +	xe_tlb_inval_batch_wait(&userptr->inval_batch);
> +	userptr->tlb_inval_submitted = false;
> +	userptr->finish_inuse = false;
> +	drm_gpusvm_unmap_pages(&vm->svm.gpusvm, &uvma->userptr.pages,
> +			       xe_vma_size(vma) >> PAGE_SHIFT, &ctx);
>  }
>  
>  static struct mmu_interval_notifier_finish *
> @@ -153,11 +191,10 @@ xe_vma_userptr_invalidate_pass1(struct xe_vm *vm, struct xe_userptr_vma *uvma)
>  	 * If it's already in use, or all fences are already signaled,
>  	 * proceed directly to invalidation without deferring.
>  	 */
> -	if (signaled || userptr->finish_inuse) {
> -		xe_vma_userptr_do_inval(vm, uvma, false);
> -		return NULL;
> -	}
> +	if (signaled || userptr->finish_inuse)
> +		return xe_vma_userptr_do_inval(vm, uvma, false);
>  
> +	/* Defer: the notifier core will call invalidate_finish once done. */
>  	userptr->finish_inuse = true;
>  
>  	return &userptr->finish;
> @@ -205,7 +242,15 @@ static void xe_vma_userptr_invalidate_finish(struct mmu_interval_notifier_finish
>  		xe_vma_start(vma), xe_vma_size(vma));
>  
>  	down_write(&vm->svm.gpusvm.notifier_lock);
> -	xe_vma_userptr_do_inval(vm, uvma, true);
> +	/*
> +	 * If a TLB invalidation was previously submitted (deferred from the
> +	 * synchronous pass1 fallback), wait for it and unmap pages.
> +	 * Otherwise, fences have now completed: invalidate the TLB and unmap.
> +	 */
> +	if (uvma->userptr.tlb_inval_submitted)
> +		xe_vma_userptr_complete_tlb_inval(vm, uvma);
> +	else
> +		xe_vma_userptr_do_inval(vm, uvma, true);
>  	up_write(&vm->svm.gpusvm.notifier_lock);
>  	trace_xe_vma_userptr_invalidate_complete(vma);
>  }
> @@ -243,7 +288,9 @@ void xe_vma_userptr_force_invalidate(struct xe_userptr_vma *uvma)
>  
>  	finish = xe_vma_userptr_invalidate_pass1(vm, uvma);
>  	if (finish)
> -		xe_vma_userptr_do_inval(vm, uvma, true);
> +		finish = xe_vma_userptr_do_inval(vm, uvma, true);
> +	if (finish)
> +		xe_vma_userptr_complete_tlb_inval(vm, uvma);
>  }
>  #endif
>  
> diff --git a/drivers/gpu/drm/xe/xe_userptr.h b/drivers/gpu/drm/xe/xe_userptr.h
> index e1830c2f5fd2..2a3cd1b5efbb 100644
> --- a/drivers/gpu/drm/xe/xe_userptr.h
> +++ b/drivers/gpu/drm/xe/xe_userptr.h
> @@ -14,6 +14,8 @@
>  
>  #include <drm/drm_gpusvm.h>
>  
> +#include "xe_tlb_inval_types.h"
> +
>  struct xe_vm;
>  struct xe_vma;
>  struct xe_userptr_vma;
> @@ -63,12 +65,27 @@ struct xe_userptr {
>  	 * alternatively by the same lock in read mode *and* the vm resv held.
>  	 */
>  	struct mmu_interval_notifier_finish finish;
> +	/**
> +	 * @inval_batch: TLB invalidation batch for deferred completion.
> +	 * Stores an in-flight TLB invalidation submitted during a two-pass
> +	 * notifier so the wait can be deferred to a subsequent pass, allowing
> +	 * multiple GPUs to be signalled before any of them are waited on.
> +	 * Protected using the same locking as @finish.
> +	 */
> +	struct xe_tlb_inval_batch inval_batch;
>  	/**
>  	 * @finish_inuse: Whether @finish is currently in use by an in-progress
>  	 * two-pass invalidation.
>  	 * Protected using the same locking as @finish.
>  	 */
>  	bool finish_inuse;
> +	/**
> +	 * @tlb_inval_submitted: Whether a TLB invalidation has been submitted
> +	 * via @inval_batch and is pending completion.  When set, the next pass
> +	 * must call xe_tlb_inval_batch_wait() before reusing @inval_batch.
> +	 * Protected using the same locking as @finish.
> +	 */
> +	bool tlb_inval_submitted;
>  	/**
>  	 * @initial_bind: user pointer has been bound at least once.
>  	 * write: vm->svm.gpusvm.notifier_lock in read mode and vm->resv held.
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index a3c2e8cefec7..fdad9329dfb4 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -3967,20 +3967,23 @@ void xe_vm_unlock(struct xe_vm *vm)
>  }
>  
>  /**
> - * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
> + * xe_vm_invalidate_vma_submit - Submit a job to invalidate GPU mappings for
> + * VMA.
>   * @vma: VMA to invalidate
> + * @batch: TLB invalidation batch to populate; caller must later call
> + *         xe_tlb_inval_batch_wait() on it to wait for completion
>   *
>   * Walks a list of page tables leaves which it memset the entries owned by this
> - * VMA to zero, invalidates the TLBs, and block until TLBs invalidation is
> - * complete.
> + * VMA to zero, invalidates the TLBs, but doesn't block waiting for TLB flush
> + * to complete, but instead populates @batch which can be waited on using
> + * xe_tlb_inval_batch_wait().
>   *
>   * Returns 0 for success, negative error code otherwise.
>   */
> -int xe_vm_invalidate_vma(struct xe_vma *vma)
> +int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch)
>  {
>  	struct xe_device *xe = xe_vma_vm(vma)->xe;
>  	struct xe_vm *vm = xe_vma_vm(vma);
> -	struct xe_tlb_inval_batch batch;
>  	struct xe_tile *tile;
>  	u8 tile_mask = 0;
>  	int ret = 0;
> @@ -4023,14 +4026,33 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
>  
>  	ret = xe_tlb_inval_range_tilemask_submit(xe, xe_vma_vm(vma)->usm.asid,
>  						 xe_vma_start(vma), xe_vma_end(vma),
> -						 tile_mask, &batch);
> +						 tile_mask, batch);
>  
>  	/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
>  	WRITE_ONCE(vma->tile_invalidated, vma->tile_mask);
> +	return ret;
> +}
> +
> +/**
> + * xe_vm_invalidate_vma - invalidate GPU mappings for VMA without a lock
> + * @vma: VMA to invalidate
> + *
> + * Walks a list of page tables leaves which it memset the entries owned by this
> + * VMA to zero, invalidates the TLBs, and block until TLBs invalidation is
> + * complete.
> + *
> + * Returns 0 for success, negative error code otherwise.
> + */
> +int xe_vm_invalidate_vma(struct xe_vma *vma)
> +{
> +	struct xe_tlb_inval_batch batch;
> +	int ret;
>  
> -	if (!ret)
> -		xe_tlb_inval_batch_wait(&batch);
> +	ret = xe_vm_invalidate_vma_submit(vma, &batch);
> +	if (ret)
> +		return ret;
>  
> +	xe_tlb_inval_batch_wait(&batch);
>  	return ret;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 62f4b6fec0bc..0bc7ed23eeae 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -242,6 +242,8 @@ struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
>  
>  int xe_vm_invalidate_vma(struct xe_vma *vma);
>  
> +int xe_vm_invalidate_vma_submit(struct xe_vma *vma, struct xe_tlb_inval_batch *batch);
> +
>  int xe_vm_validate_protected(struct xe_vm *vm);
>  
>  static inline void xe_vm_queue_rebind_worker(struct xe_vm *vm)
> -- 
> 2.53.0
> 

✗ CI.checkpatch: warning for Two-pass MMU interval notifiers (rev3)

[Patchwork]

== Series Details ==

Series: Two-pass MMU interval notifiers (rev3)
URL   : https://patchwork.freedesktop.org/series/153280/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 86bdfee9959a3779793d38ca5d22371925d4f4bf
Author: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Date:   Tue Mar 3 14:34:09 2026 +0100

    drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible
    
    Now that the two-pass notifier flow uses xe_vma_userptr_do_inval() for
    the fence-wait + TLB-invalidate work, extend it to support a further
    deferred TLB wait:
    
    - xe_vma_userptr_do_inval(): when the embedded finish handle is free,
      submit the TLB invalidation asynchronously (xe_vm_invalidate_vma_submit)
      and return &userptr->finish so the mmu_notifier core schedules a third
      pass.  When the handle is occupied by a concurrent invalidation, fall
      back to the synchronous xe_vm_invalidate_vma() path.
    
    - xe_vma_userptr_complete_tlb_inval(): new helper called from
      invalidate_finish when tlb_inval_submitted is set.  Waits for the
      previously submitted batch and unmaps the gpusvm pages.
    
    xe_vma_userptr_invalidate_finish() dispatches between the two helpers
    via tlb_inval_submitted, making the three possible flows explicit:
    
      pass1 (fences pending)  -> invalidate_finish -> do_inval (sync TLB)
      pass1 (fences done)     -> do_inval -> invalidate_finish
                              -> complete_tlb_inval (deferred TLB)
      pass1 (finish occupied) -> do_inval (sync TLB, inline)
    
    In multi-GPU scenarios this allows TLB flushes to be submitted on all
    GPUs in one pass before any of them are waited on.
    
    Also adds xe_vm_invalidate_vma_submit() which submits the TLB range
    invalidation without blocking, populating a xe_tlb_inval_batch that
    the caller waits on separately.
    
    v3:
    - Add locking asserts and notifier state asserts (Matt Brost)
    - Update the locking documentation of the notifier
      state members (Matt Brost)
    - Remove unrelated code formatting changes (Matt Brost)
    
    Assisted-by: GitHub Copilot:claude-sonnet-4.6
    Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
+ /mt/dim checkpatch 591d026bf9c13f8982524c9f6d945be1e6f4cfc6 drm-intel
d01070791437 mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers
-:53: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#53: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.

-:53: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'GitHub Copilot:claude-sonnet-4.6 # Documentation only.'
#53: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.

total: 1 errors, 1 warnings, 0 checks, 169 lines checked
64e3bd5ff490 drm/xe/userptr: Convert invalidation to two-pass MMU notifier
-:38: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#38: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

-:38: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'GitHub Copilot:claude-sonnet-4.6'
#38: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

total: 1 errors, 1 warnings, 0 checks, 191 lines checked
fab3e6bb8c28 drm/xe: Split TLB invalidation into submit and wait steps
-:26: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#26: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

-:26: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'GitHub Copilot:claude-sonnet-4.6'
#26: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

total: 1 errors, 1 warnings, 0 checks, 282 lines checked
86bdfee9959a drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible
-:45: WARNING:BAD_SIGN_OFF: Non-standard signature: Assisted-by:
#45: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

-:45: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'GitHub Copilot:claude-sonnet-4.6'
#45: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6

total: 1 errors, 1 warnings, 0 checks, 219 lines checked

✓ CI.KUnit: success for Two-pass MMU interval notifiers (rev3)

[Patchwork]

== Series Details ==

Series: Two-pass MMU interval notifiers (rev3)
URL   : https://patchwork.freedesktop.org/series/153280/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:25:09] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:25:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:25:43] Starting KUnit Kernel (1/1)...
[15:25:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:25:44] ================== guc_buf (11 subtests) ===================
[15:25:44] [PASSED] test_smallest
[15:25:44] [PASSED] test_largest
[15:25:44] [PASSED] test_granular
[15:25:44] [PASSED] test_unique
[15:25:44] [PASSED] test_overlap
[15:25:44] [PASSED] test_reusable
[15:25:44] [PASSED] test_too_big
[15:25:44] [PASSED] test_flush
[15:25:44] [PASSED] test_lookup
[15:25:44] [PASSED] test_data
[15:25:44] [PASSED] test_class
[15:25:44] ===================== [PASSED] guc_buf =====================
[15:25:44] =================== guc_dbm (7 subtests) ===================
[15:25:44] [PASSED] test_empty
[15:25:44] [PASSED] test_default
[15:25:44] ======================== test_size  ========================
[15:25:44] [PASSED] 4
[15:25:44] [PASSED] 8
[15:25:44] [PASSED] 32
[15:25:44] [PASSED] 256
[15:25:44] ==================== [PASSED] test_size ====================
[15:25:44] ======================= test_reuse  ========================
[15:25:44] [PASSED] 4
[15:25:44] [PASSED] 8
[15:25:44] [PASSED] 32
[15:25:44] [PASSED] 256
[15:25:44] =================== [PASSED] test_reuse ====================
[15:25:44] =================== test_range_overlap  ====================
[15:25:44] [PASSED] 4
[15:25:44] [PASSED] 8
[15:25:44] [PASSED] 32
[15:25:44] [PASSED] 256
[15:25:44] =============== [PASSED] test_range_overlap ================
[15:25:44] =================== test_range_compact  ====================
[15:25:44] [PASSED] 4
[15:25:44] [PASSED] 8
[15:25:44] [PASSED] 32
[15:25:44] [PASSED] 256
[15:25:44] =============== [PASSED] test_range_compact ================
[15:25:44] ==================== test_range_spare  =====================
[15:25:44] [PASSED] 4
[15:25:44] [PASSED] 8
[15:25:44] [PASSED] 32
[15:25:44] [PASSED] 256
[15:25:44] ================ [PASSED] test_range_spare =================
[15:25:44] ===================== [PASSED] guc_dbm =====================
[15:25:44] =================== guc_idm (6 subtests) ===================
[15:25:44] [PASSED] bad_init
[15:25:44] [PASSED] no_init
[15:25:44] [PASSED] init_fini
[15:25:44] [PASSED] check_used
[15:25:44] [PASSED] check_quota
[15:25:44] [PASSED] check_all
[15:25:44] ===================== [PASSED] guc_idm =====================
[15:25:44] ================== no_relay (3 subtests) ===================
[15:25:44] [PASSED] xe_drops_guc2pf_if_not_ready
[15:25:44] [PASSED] xe_drops_guc2vf_if_not_ready
[15:25:44] [PASSED] xe_rejects_send_if_not_ready
[15:25:44] ==================== [PASSED] no_relay =====================
[15:25:44] ================== pf_relay (14 subtests) ==================
[15:25:44] [PASSED] pf_rejects_guc2pf_too_short
[15:25:44] [PASSED] pf_rejects_guc2pf_too_long
[15:25:44] [PASSED] pf_rejects_guc2pf_no_payload
[15:25:44] [PASSED] pf_fails_no_payload
[15:25:44] [PASSED] pf_fails_bad_origin
[15:25:44] [PASSED] pf_fails_bad_type
[15:25:44] [PASSED] pf_txn_reports_error
[15:25:44] [PASSED] pf_txn_sends_pf2guc
[15:25:44] [PASSED] pf_sends_pf2guc
[15:25:44] [SKIPPED] pf_loopback_nop
[15:25:44] [SKIPPED] pf_loopback_echo
[15:25:44] [SKIPPED] pf_loopback_fail
[15:25:44] [SKIPPED] pf_loopback_busy
[15:25:44] [SKIPPED] pf_loopback_retry
[15:25:44] ==================== [PASSED] pf_relay =====================
[15:25:44] ================== vf_relay (3 subtests) ===================
[15:25:44] [PASSED] vf_rejects_guc2vf_too_short
[15:25:44] [PASSED] vf_rejects_guc2vf_too_long
[15:25:44] [PASSED] vf_rejects_guc2vf_no_payload
[15:25:44] ==================== [PASSED] vf_relay =====================
[15:25:44] ================ pf_gt_config (9 subtests) =================
[15:25:44] [PASSED] fair_contexts_1vf
[15:25:44] [PASSED] fair_doorbells_1vf
[15:25:44] [PASSED] fair_ggtt_1vf
[15:25:44] ====================== fair_vram_1vf  ======================
[15:25:44] [PASSED] 3.50 GiB
[15:25:44] [PASSED] 11.5 GiB
[15:25:44] [PASSED] 15.5 GiB
[15:25:44] [PASSED] 31.5 GiB
[15:25:44] [PASSED] 63.5 GiB
[15:25:44] [PASSED] 13.9 GiB
[15:25:44] ================== [PASSED] fair_vram_1vf ==================
[15:25:44] ================ fair_vram_1vf_admin_only  =================
[15:25:44] [PASSED] 3.50 GiB
[15:25:44] [PASSED] 11.5 GiB
[15:25:44] [PASSED] 15.5 GiB
[15:25:44] [PASSED] 31.5 GiB
[15:25:44] [PASSED] 63.5 GiB
[15:25:44] [PASSED] 13.9 GiB
[15:25:44] ============ [PASSED] fair_vram_1vf_admin_only =============
[15:25:44] ====================== fair_contexts  ======================
[15:25:44] [PASSED] 1 VF
[15:25:44] [PASSED] 2 VFs
[15:25:44] [PASSED] 3 VFs
[15:25:44] [PASSED] 4 VFs
[15:25:44] [PASSED] 5 VFs
[15:25:44] [PASSED] 6 VFs
[15:25:44] [PASSED] 7 VFs
[15:25:44] [PASSED] 8 VFs
[15:25:44] [PASSED] 9 VFs
[15:25:44] [PASSED] 10 VFs
[15:25:44] [PASSED] 11 VFs
[15:25:44] [PASSED] 12 VFs
[15:25:44] [PASSED] 13 VFs
[15:25:44] [PASSED] 14 VFs
[15:25:44] [PASSED] 15 VFs
[15:25:44] [PASSED] 16 VFs
[15:25:44] [PASSED] 17 VFs
[15:25:44] [PASSED] 18 VFs
[15:25:44] [PASSED] 19 VFs
[15:25:44] [PASSED] 20 VFs
[15:25:44] [PASSED] 21 VFs
[15:25:44] [PASSED] 22 VFs
[15:25:44] [PASSED] 23 VFs
[15:25:44] [PASSED] 24 VFs
[15:25:44] [PASSED] 25 VFs
[15:25:44] [PASSED] 26 VFs
[15:25:44] [PASSED] 27 VFs
[15:25:44] [PASSED] 28 VFs
[15:25:44] [PASSED] 29 VFs
[15:25:44] [PASSED] 30 VFs
[15:25:44] [PASSED] 31 VFs
[15:25:44] [PASSED] 32 VFs
[15:25:44] [PASSED] 33 VFs
[15:25:44] [PASSED] 34 VFs
[15:25:44] [PASSED] 35 VFs
[15:25:44] [PASSED] 36 VFs
[15:25:44] [PASSED] 37 VFs
[15:25:44] [PASSED] 38 VFs
[15:25:44] [PASSED] 39 VFs
[15:25:44] [PASSED] 40 VFs
[15:25:44] [PASSED] 41 VFs
[15:25:44] [PASSED] 42 VFs
[15:25:44] [PASSED] 43 VFs
[15:25:44] [PASSED] 44 VFs
[15:25:44] [PASSED] 45 VFs
[15:25:44] [PASSED] 46 VFs
[15:25:44] [PASSED] 47 VFs
[15:25:44] [PASSED] 48 VFs
[15:25:44] [PASSED] 49 VFs
[15:25:44] [PASSED] 50 VFs
[15:25:44] [PASSED] 51 VFs
[15:25:44] [PASSED] 52 VFs
[15:25:44] [PASSED] 53 VFs
[15:25:44] [PASSED] 54 VFs
[15:25:44] [PASSED] 55 VFs
[15:25:44] [PASSED] 56 VFs
[15:25:44] [PASSED] 57 VFs
[15:25:44] [PASSED] 58 VFs
[15:25:44] [PASSED] 59 VFs
[15:25:44] [PASSED] 60 VFs
[15:25:44] [PASSED] 61 VFs
[15:25:44] [PASSED] 62 VFs
[15:25:44] [PASSED] 63 VFs
[15:25:44] ================== [PASSED] fair_contexts ==================
[15:25:44] ===================== fair_doorbells  ======================
[15:25:44] [PASSED] 1 VF
[15:25:44] [PASSED] 2 VFs
[15:25:44] [PASSED] 3 VFs
[15:25:44] [PASSED] 4 VFs
[15:25:44] [PASSED] 5 VFs
[15:25:44] [PASSED] 6 VFs
[15:25:44] [PASSED] 7 VFs
[15:25:44] [PASSED] 8 VFs
[15:25:44] [PASSED] 9 VFs
[15:25:44] [PASSED] 10 VFs
[15:25:44] [PASSED] 11 VFs
[15:25:44] [PASSED] 12 VFs
[15:25:44] [PASSED] 13 VFs
[15:25:44] [PASSED] 14 VFs
[15:25:44] [PASSED] 15 VFs
[15:25:44] [PASSED] 16 VFs
[15:25:44] [PASSED] 17 VFs
[15:25:44] [PASSED] 18 VFs
[15:25:44] [PASSED] 19 VFs
[15:25:44] [PASSED] 20 VFs
[15:25:44] [PASSED] 21 VFs
[15:25:44] [PASSED] 22 VFs
[15:25:44] [PASSED] 23 VFs
[15:25:44] [PASSED] 24 VFs
[15:25:44] [PASSED] 25 VFs
[15:25:44] [PASSED] 26 VFs
[15:25:44] [PASSED] 27 VFs
[15:25:44] [PASSED] 28 VFs
[15:25:44] [PASSED] 29 VFs
[15:25:44] [PASSED] 30 VFs
[15:25:44] [PASSED] 31 VFs
[15:25:44] [PASSED] 32 VFs
[15:25:44] [PASSED] 33 VFs
[15:25:44] [PASSED] 34 VFs
[15:25:44] [PASSED] 35 VFs
[15:25:44] [PASSED] 36 VFs
[15:25:44] [PASSED] 37 VFs
[15:25:44] [PASSED] 38 VFs
[15:25:44] [PASSED] 39 VFs
[15:25:44] [PASSED] 40 VFs
[15:25:44] [PASSED] 41 VFs
[15:25:44] [PASSED] 42 VFs
[15:25:44] [PASSED] 43 VFs
[15:25:44] [PASSED] 44 VFs
[15:25:44] [PASSED] 45 VFs
[15:25:44] [PASSED] 46 VFs
[15:25:44] [PASSED] 47 VFs
[15:25:44] [PASSED] 48 VFs
[15:25:44] [PASSED] 49 VFs
[15:25:44] [PASSED] 50 VFs
[15:25:44] [PASSED] 51 VFs
[15:25:44] [PASSED] 52 VFs
[15:25:44] [PASSED] 53 VFs
[15:25:44] [PASSED] 54 VFs
[15:25:44] [PASSED] 55 VFs
[15:25:44] [PASSED] 56 VFs
[15:25:44] [PASSED] 57 VFs
[15:25:44] [PASSED] 58 VFs
[15:25:44] [PASSED] 59 VFs
[15:25:44] [PASSED] 60 VFs
[15:25:44] [PASSED] 61 VFs
[15:25:44] [PASSED] 62 VFs
[15:25:44] [PASSED] 63 VFs
[15:25:44] ================= [PASSED] fair_doorbells ==================
[15:25:44] ======================== fair_ggtt  ========================
[15:25:44] [PASSED] 1 VF
[15:25:44] [PASSED] 2 VFs
[15:25:44] [PASSED] 3 VFs
[15:25:44] [PASSED] 4 VFs
[15:25:44] [PASSED] 5 VFs
[15:25:44] [PASSED] 6 VFs
[15:25:44] [PASSED] 7 VFs
[15:25:44] [PASSED] 8 VFs
[15:25:44] [PASSED] 9 VFs
[15:25:44] [PASSED] 10 VFs
[15:25:44] [PASSED] 11 VFs
[15:25:44] [PASSED] 12 VFs
[15:25:44] [PASSED] 13 VFs
[15:25:44] [PASSED] 14 VFs
[15:25:44] [PASSED] 15 VFs
[15:25:44] [PASSED] 16 VFs
[15:25:44] [PASSED] 17 VFs
[15:25:44] [PASSED] 18 VFs
[15:25:44] [PASSED] 19 VFs
[15:25:44] [PASSED] 20 VFs
[15:25:44] [PASSED] 21 VFs
[15:25:44] [PASSED] 22 VFs
[15:25:44] [PASSED] 23 VFs
[15:25:44] [PASSED] 24 VFs
[15:25:44] [PASSED] 25 VFs
[15:25:44] [PASSED] 26 VFs
[15:25:44] [PASSED] 27 VFs
[15:25:44] [PASSED] 28 VFs
[15:25:44] [PASSED] 29 VFs
[15:25:44] [PASSED] 30 VFs
[15:25:44] [PASSED] 31 VFs
[15:25:44] [PASSED] 32 VFs
[15:25:44] [PASSED] 33 VFs
[15:25:44] [PASSED] 34 VFs
[15:25:44] [PASSED] 35 VFs
[15:25:44] [PASSED] 36 VFs
[15:25:44] [PASSED] 37 VFs
[15:25:44] [PASSED] 38 VFs
[15:25:44] [PASSED] 39 VFs
[15:25:44] [PASSED] 40 VFs
[15:25:44] [PASSED] 41 VFs
[15:25:44] [PASSED] 42 VFs
[15:25:44] [PASSED] 43 VFs
[15:25:44] [PASSED] 44 VFs
[15:25:44] [PASSED] 45 VFs
[15:25:44] [PASSED] 46 VFs
[15:25:44] [PASSED] 47 VFs
[15:25:44] [PASSED] 48 VFs
[15:25:44] [PASSED] 49 VFs
[15:25:44] [PASSED] 50 VFs
[15:25:44] [PASSED] 51 VFs
[15:25:44] [PASSED] 52 VFs
[15:25:44] [PASSED] 53 VFs
[15:25:44] [PASSED] 54 VFs
[15:25:44] [PASSED] 55 VFs
[15:25:44] [PASSED] 56 VFs
[15:25:44] [PASSED] 57 VFs
[15:25:44] [PASSED] 58 VFs
[15:25:44] [PASSED] 59 VFs
[15:25:44] [PASSED] 60 VFs
[15:25:44] [PASSED] 61 VFs
[15:25:44] [PASSED] 62 VFs
[15:25:44] [PASSED] 63 VFs
[15:25:44] ==================== [PASSED] fair_ggtt ====================
[15:25:44] ======================== fair_vram  ========================
[15:25:44] [PASSED] 1 VF
[15:25:44] [PASSED] 2 VFs
[15:25:44] [PASSED] 3 VFs
[15:25:44] [PASSED] 4 VFs
[15:25:44] [PASSED] 5 VFs
[15:25:44] [PASSED] 6 VFs
[15:25:44] [PASSED] 7 VFs
[15:25:44] [PASSED] 8 VFs
[15:25:44] [PASSED] 9 VFs
[15:25:44] [PASSED] 10 VFs
[15:25:44] [PASSED] 11 VFs
[15:25:44] [PASSED] 12 VFs
[15:25:44] [PASSED] 13 VFs
[15:25:44] [PASSED] 14 VFs
[15:25:44] [PASSED] 15 VFs
[15:25:44] [PASSED] 16 VFs
[15:25:44] [PASSED] 17 VFs
[15:25:44] [PASSED] 18 VFs
[15:25:44] [PASSED] 19 VFs
[15:25:44] [PASSED] 20 VFs
[15:25:44] [PASSED] 21 VFs
[15:25:44] [PASSED] 22 VFs
[15:25:44] [PASSED] 23 VFs
[15:25:44] [PASSED] 24 VFs
[15:25:44] [PASSED] 25 VFs
[15:25:44] [PASSED] 26 VFs
[15:25:44] [PASSED] 27 VFs
[15:25:44] [PASSED] 28 VFs
[15:25:44] [PASSED] 29 VFs
[15:25:44] [PASSED] 30 VFs
[15:25:44] [PASSED] 31 VFs
[15:25:44] [PASSED] 32 VFs
[15:25:44] [PASSED] 33 VFs
[15:25:44] [PASSED] 34 VFs
[15:25:44] [PASSED] 35 VFs
[15:25:44] [PASSED] 36 VFs
[15:25:44] [PASSED] 37 VFs
[15:25:44] [PASSED] 38 VFs
[15:25:44] [PASSED] 39 VFs
[15:25:44] [PASSED] 40 VFs
[15:25:44] [PASSED] 41 VFs
[15:25:44] [PASSED] 42 VFs
[15:25:44] [PASSED] 43 VFs
[15:25:44] [PASSED] 44 VFs
[15:25:44] [PASSED] 45 VFs
[15:25:44] [PASSED] 46 VFs
[15:25:44] [PASSED] 47 VFs
[15:25:44] [PASSED] 48 VFs
[15:25:44] [PASSED] 49 VFs
[15:25:44] [PASSED] 50 VFs
[15:25:44] [PASSED] 51 VFs
[15:25:44] [PASSED] 52 VFs
[15:25:44] [PASSED] 53 VFs
[15:25:44] [PASSED] 54 VFs
[15:25:44] [PASSED] 55 VFs
[15:25:44] [PASSED] 56 VFs
[15:25:44] [PASSED] 57 VFs
[15:25:44] [PASSED] 58 VFs
[15:25:44] [PASSED] 59 VFs
[15:25:44] [PASSED] 60 VFs
[15:25:44] [PASSED] 61 VFs
[15:25:44] [PASSED] 62 VFs
[15:25:44] [PASSED] 63 VFs
[15:25:44] ==================== [PASSED] fair_vram ====================
[15:25:44] ================== [PASSED] pf_gt_config ===================
[15:25:44] ===================== lmtt (1 subtest) =====================
[15:25:44] ======================== test_ops  =========================
[15:25:44] [PASSED] 2-level
[15:25:44] [PASSED] multi-level
[15:25:44] ==================== [PASSED] test_ops =====================
[15:25:44] ====================== [PASSED] lmtt =======================
[15:25:44] ================= pf_service (11 subtests) =================
[15:25:44] [PASSED] pf_negotiate_any
[15:25:44] [PASSED] pf_negotiate_base_match
[15:25:44] [PASSED] pf_negotiate_base_newer
[15:25:44] [PASSED] pf_negotiate_base_next
[15:25:44] [SKIPPED] pf_negotiate_base_older
[15:25:44] [PASSED] pf_negotiate_base_prev
[15:25:44] [PASSED] pf_negotiate_latest_match
[15:25:44] [PASSED] pf_negotiate_latest_newer
[15:25:44] [PASSED] pf_negotiate_latest_next
[15:25:44] [SKIPPED] pf_negotiate_latest_older
[15:25:44] [SKIPPED] pf_negotiate_latest_prev
[15:25:44] =================== [PASSED] pf_service ====================
[15:25:44] ================= xe_guc_g2g (2 subtests) ==================
[15:25:44] ============== xe_live_guc_g2g_kunit_default  ==============
[15:25:44] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[15:25:44] ============== xe_live_guc_g2g_kunit_allmem  ===============
[15:25:44] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[15:25:44] =================== [SKIPPED] xe_guc_g2g ===================
[15:25:44] =================== xe_mocs (2 subtests) ===================
[15:25:44] ================ xe_live_mocs_kernel_kunit  ================
[15:25:44] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:25:44] ================ xe_live_mocs_reset_kunit  =================
[15:25:44] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:25:44] ==================== [SKIPPED] xe_mocs =====================
[15:25:44] ================= xe_migrate (2 subtests) ==================
[15:25:44] ================= xe_migrate_sanity_kunit  =================
[15:25:44] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:25:44] ================== xe_validate_ccs_kunit  ==================
[15:25:44] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:25:44] =================== [SKIPPED] xe_migrate ===================
[15:25:44] ================== xe_dma_buf (1 subtest) ==================
[15:25:44] ==================== xe_dma_buf_kunit  =====================
[15:25:44] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:25:44] =================== [SKIPPED] xe_dma_buf ===================
[15:25:44] ================= xe_bo_shrink (1 subtest) =================
[15:25:44] =================== xe_bo_shrink_kunit  ====================
[15:25:44] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:25:44] ================== [SKIPPED] xe_bo_shrink ==================
[15:25:44] ==================== xe_bo (2 subtests) ====================
[15:25:44] ================== xe_ccs_migrate_kunit  ===================
[15:25:44] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:25:44] ==================== xe_bo_evict_kunit  ====================
[15:25:44] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:25:44] ===================== [SKIPPED] xe_bo ======================
[15:25:44] ==================== args (13 subtests) ====================
[15:25:44] [PASSED] count_args_test
[15:25:44] [PASSED] call_args_example
[15:25:44] [PASSED] call_args_test
[15:25:44] [PASSED] drop_first_arg_example
[15:25:44] [PASSED] drop_first_arg_test
[15:25:44] [PASSED] first_arg_example
[15:25:44] [PASSED] first_arg_test
[15:25:44] [PASSED] last_arg_example
[15:25:44] [PASSED] last_arg_test
[15:25:44] [PASSED] pick_arg_example
[15:25:44] [PASSED] if_args_example
[15:25:44] [PASSED] if_args_test
[15:25:44] [PASSED] sep_comma_example
[15:25:44] ====================== [PASSED] args =======================
[15:25:44] =================== xe_pci (3 subtests) ====================
[15:25:44] ==================== check_graphics_ip  ====================
[15:25:44] [PASSED] 12.00 Xe_LP
[15:25:44] [PASSED] 12.10 Xe_LP+
[15:25:44] [PASSED] 12.55 Xe_HPG
[15:25:44] [PASSED] 12.60 Xe_HPC
[15:25:44] [PASSED] 12.70 Xe_LPG
[15:25:44] [PASSED] 12.71 Xe_LPG
[15:25:44] [PASSED] 12.74 Xe_LPG+
[15:25:44] [PASSED] 20.01 Xe2_HPG
[15:25:44] [PASSED] 20.02 Xe2_HPG
[15:25:44] [PASSED] 20.04 Xe2_LPG
[15:25:44] [PASSED] 30.00 Xe3_LPG
[15:25:44] [PASSED] 30.01 Xe3_LPG
[15:25:44] [PASSED] 30.03 Xe3_LPG
[15:25:44] [PASSED] 30.04 Xe3_LPG
[15:25:44] [PASSED] 30.05 Xe3_LPG
[15:25:44] [PASSED] 35.10 Xe3p_LPG
[15:25:44] [PASSED] 35.11 Xe3p_XPC
[15:25:44] ================ [PASSED] check_graphics_ip ================
[15:25:44] ===================== check_media_ip  ======================
[15:25:44] [PASSED] 12.00 Xe_M
[15:25:44] [PASSED] 12.55 Xe_HPM
[15:25:44] [PASSED] 13.00 Xe_LPM+
[15:25:44] [PASSED] 13.01 Xe2_HPM
[15:25:44] [PASSED] 20.00 Xe2_LPM
[15:25:44] [PASSED] 30.00 Xe3_LPM
[15:25:44] [PASSED] 30.02 Xe3_LPM
[15:25:44] [PASSED] 35.00 Xe3p_LPM
[15:25:44] [PASSED] 35.03 Xe3p_HPM
[15:25:44] ================= [PASSED] check_media_ip ==================
[15:25:44] =================== check_platform_desc  ===================
[15:25:44] [PASSED] 0x9A60 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A68 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A70 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A40 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A49 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A59 (TIGERLAKE)
[15:25:44] [PASSED] 0x9A78 (TIGERLAKE)
[15:25:44] [PASSED] 0x9AC0 (TIGERLAKE)
[15:25:44] [PASSED] 0x9AC9 (TIGERLAKE)
[15:25:44] [PASSED] 0x9AD9 (TIGERLAKE)
[15:25:44] [PASSED] 0x9AF8 (TIGERLAKE)
[15:25:44] [PASSED] 0x4C80 (ROCKETLAKE)
[15:25:44] [PASSED] 0x4C8A (ROCKETLAKE)
[15:25:44] [PASSED] 0x4C8B (ROCKETLAKE)
[15:25:44] [PASSED] 0x4C8C (ROCKETLAKE)
[15:25:44] [PASSED] 0x4C90 (ROCKETLAKE)
[15:25:44] [PASSED] 0x4C9A (ROCKETLAKE)
[15:25:44] [PASSED] 0x4680 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4682 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4688 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x468A (ALDERLAKE_S)
[15:25:44] [PASSED] 0x468B (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4690 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4692 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4693 (ALDERLAKE_S)
[15:25:44] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46AA (ALDERLAKE_P)
[15:25:44] [PASSED] 0x462A (ALDERLAKE_P)
[15:25:44] [PASSED] 0x4626 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x4628 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:25:44] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:25:44] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:25:44] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:25:44] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:25:44] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:25:44] [PASSED] 0xA721 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA720 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:25:44] [PASSED] 0xA780 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA781 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA782 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA783 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA788 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA789 (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA78A (ALDERLAKE_S)
[15:25:44] [PASSED] 0xA78B (ALDERLAKE_S)
[15:25:44] [PASSED] 0x4905 (DG1)
[15:25:44] [PASSED] 0x4906 (DG1)
[15:25:44] [PASSED] 0x4907 (DG1)
[15:25:44] [PASSED] 0x4908 (DG1)
[15:25:44] [PASSED] 0x4909 (DG1)
[15:25:44] [PASSED] 0x56C0 (DG2)
[15:25:44] [PASSED] 0x56C2 (DG2)
[15:25:44] [PASSED] 0x56C1 (DG2)
[15:25:44] [PASSED] 0x7D51 (METEORLAKE)
[15:25:44] [PASSED] 0x7DD1 (METEORLAKE)
[15:25:44] [PASSED] 0x7D41 (METEORLAKE)
[15:25:44] [PASSED] 0x7D67 (METEORLAKE)
[15:25:44] [PASSED] 0xB640 (METEORLAKE)
[15:25:44] [PASSED] 0x56A0 (DG2)
[15:25:44] [PASSED] 0x56A1 (DG2)
[15:25:44] [PASSED] 0x56A2 (DG2)
[15:25:44] [PASSED] 0x56BE (DG2)
[15:25:44] [PASSED] 0x56BF (DG2)
[15:25:44] [PASSED] 0x5690 (DG2)
[15:25:44] [PASSED] 0x5691 (DG2)
[15:25:44] [PASSED] 0x5692 (DG2)
[15:25:44] [PASSED] 0x56A5 (DG2)
[15:25:44] [PASSED] 0x56A6 (DG2)
[15:25:44] [PASSED] 0x56B0 (DG2)
[15:25:44] [PASSED] 0x56B1 (DG2)
[15:25:44] [PASSED] 0x56BA (DG2)
[15:25:44] [PASSED] 0x56BB (DG2)
[15:25:44] [PASSED] 0x56BC (DG2)
[15:25:44] [PASSED] 0x56BD (DG2)
[15:25:44] [PASSED] 0x5693 (DG2)
[15:25:44] [PASSED] 0x5694 (DG2)
[15:25:44] [PASSED] 0x5695 (DG2)
[15:25:44] [PASSED] 0x56A3 (DG2)
[15:25:44] [PASSED] 0x56A4 (DG2)
[15:25:44] [PASSED] 0x56B2 (DG2)
[15:25:44] [PASSED] 0x56B3 (DG2)
[15:25:44] [PASSED] 0x5696 (DG2)
[15:25:44] [PASSED] 0x5697 (DG2)
[15:25:44] [PASSED] 0xB69 (PVC)
[15:25:44] [PASSED] 0xB6E (PVC)
[15:25:44] [PASSED] 0xBD4 (PVC)
[15:25:44] [PASSED] 0xBD5 (PVC)
[15:25:44] [PASSED] 0xBD6 (PVC)
[15:25:44] [PASSED] 0xBD7 (PVC)
[15:25:44] [PASSED] 0xBD8 (PVC)
[15:25:44] [PASSED] 0xBD9 (PVC)
[15:25:44] [PASSED] 0xBDA (PVC)
[15:25:44] [PASSED] 0xBDB (PVC)
[15:25:44] [PASSED] 0xBE0 (PVC)
[15:25:44] [PASSED] 0xBE1 (PVC)
[15:25:44] [PASSED] 0xBE5 (PVC)
[15:25:44] [PASSED] 0x7D40 (METEORLAKE)
[15:25:44] [PASSED] 0x7D45 (METEORLAKE)
[15:25:44] [PASSED] 0x7D55 (METEORLAKE)
[15:25:44] [PASSED] 0x7D60 (METEORLAKE)
[15:25:44] [PASSED] 0x7DD5 (METEORLAKE)
[15:25:44] [PASSED] 0x6420 (LUNARLAKE)
[15:25:44] [PASSED] 0x64A0 (LUNARLAKE)
[15:25:44] [PASSED] 0x64B0 (LUNARLAKE)
[15:25:44] [PASSED] 0xE202 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE209 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE20B (BATTLEMAGE)
[15:25:44] [PASSED] 0xE20C (BATTLEMAGE)
[15:25:44] [PASSED] 0xE20D (BATTLEMAGE)
[15:25:44] [PASSED] 0xE210 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE211 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE212 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE216 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE220 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE221 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE222 (BATTLEMAGE)
[15:25:44] [PASSED] 0xE223 (BATTLEMAGE)
[15:25:44] [PASSED] 0xB080 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB081 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB082 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB083 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB084 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB085 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB086 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB087 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB08F (PANTHERLAKE)
[15:25:44] [PASSED] 0xB090 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:25:44] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:25:44] [PASSED] 0xFD80 (PANTHERLAKE)
[15:25:44] [PASSED] 0xFD81 (PANTHERLAKE)
[15:25:44] [PASSED] 0xD740 (NOVALAKE_S)
[15:25:44] [PASSED] 0xD741 (NOVALAKE_S)
[15:25:44] [PASSED] 0xD742 (NOVALAKE_S)
[15:25:44] [PASSED] 0xD743 (NOVALAKE_S)
[15:25:44] [PASSED] 0xD744 (NOVALAKE_S)
[15:25:44] [PASSED] 0xD745 (NOVALAKE_S)
[15:25:44] [PASSED] 0x674C (CRESCENTISLAND)
[15:25:44] [PASSED] 0xD750 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD751 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD752 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD753 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD754 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD755 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD756 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD757 (NOVALAKE_P)
[15:25:44] [PASSED] 0xD75F (NOVALAKE_P)
[15:25:44] =============== [PASSED] check_platform_desc ===============
[15:25:44] ===================== [PASSED] xe_pci ======================
[15:25:44] =================== xe_rtp (2 subtests) ====================
[15:25:44] =============== xe_rtp_process_to_sr_tests  ================
[15:25:44] [PASSED] coalesce-same-reg
[15:25:44] [PASSED] no-match-no-add
[15:25:44] [PASSED] match-or
[15:25:44] [PASSED] match-or-xfail
[15:25:44] [PASSED] no-match-no-add-multiple-rules
[15:25:44] [PASSED] two-regs-two-entries
[15:25:44] [PASSED] clr-one-set-other
[15:25:44] [PASSED] set-field
[15:25:44] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[15:25:44] [PASSED] conflict-not-disjoint
[15:25:44] [PASSED] conflict-reg-type
[15:25:44] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:25:44] ================== xe_rtp_process_tests  ===================
[15:25:44] [PASSED] active1
[15:25:44] [PASSED] active2
[15:25:44] [PASSED] active-inactive
[15:25:44] [PASSED] inactive-active
[15:25:44] [PASSED] inactive-1st_or_active-inactive
[15:25:44] [PASSED] inactive-2nd_or_active-inactive
[15:25:44] [PASSED] inactive-last_or_active-inactive
[15:25:44] [PASSED] inactive-no_or_active-inactive
[15:25:44] ============== [PASSED] xe_rtp_process_tests ===============
[15:25:44] ===================== [PASSED] xe_rtp ======================
[15:25:44] ==================== xe_wa (1 subtest) =====================
[15:25:44] ======================== xe_wa_gt  =========================
[15:25:44] [PASSED] TIGERLAKE B0
[15:25:44] [PASSED] DG1 A0
[15:25:44] [PASSED] DG1 B0
[15:25:44] [PASSED] ALDERLAKE_S A0
[15:25:44] [PASSED] ALDERLAKE_S B0
[15:25:44] [PASSED] ALDERLAKE_S C0
[15:25:44] [PASSED] ALDERLAKE_S D0
[15:25:44] [PASSED] ALDERLAKE_P A0
[15:25:44] [PASSED] ALDERLAKE_P B0
[15:25:44] [PASSED] ALDERLAKE_P C0
[15:25:44] [PASSED] ALDERLAKE_S RPLS D0
[15:25:44] [PASSED] ALDERLAKE_P RPLU E0
[15:25:44] [PASSED] DG2 G10 C0
[15:25:44] [PASSED] DG2 G11 B1
[15:25:44] [PASSED] DG2 G12 A1
[15:25:44] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:25:44] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:25:44] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[15:25:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[15:25:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[15:25:44] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[15:25:44] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[15:25:44] ==================== [PASSED] xe_wa_gt =====================
[15:25:44] ====================== [PASSED] xe_wa ======================
[15:25:44] ============================================================
[15:25:44] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[15:25:44] Elapsed time: 35.298s total, 4.241s configuring, 30.390s building, 0.620s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:25:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:25:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:26:10] Starting KUnit Kernel (1/1)...
[15:26:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:26:10] ============ drm_test_pick_cmdline (2 subtests) ============
[15:26:10] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[15:26:10] =============== drm_test_pick_cmdline_named  ===============
[15:26:10] [PASSED] NTSC
[15:26:10] [PASSED] NTSC-J
[15:26:10] [PASSED] PAL
[15:26:10] [PASSED] PAL-M
[15:26:10] =========== [PASSED] drm_test_pick_cmdline_named ===========
[15:26:10] ============== [PASSED] drm_test_pick_cmdline ==============
[15:26:10] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:26:10] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:26:10] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:26:10] =========== drm_validate_clone_mode (2 subtests) ===========
[15:26:10] ============== drm_test_check_in_clone_mode  ===============
[15:26:10] [PASSED] in_clone_mode
[15:26:10] [PASSED] not_in_clone_mode
[15:26:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:26:10] =============== drm_test_check_valid_clones  ===============
[15:26:10] [PASSED] not_in_clone_mode
[15:26:10] [PASSED] valid_clone
[15:26:10] [PASSED] invalid_clone
[15:26:10] =========== [PASSED] drm_test_check_valid_clones ===========
[15:26:10] ============= [PASSED] drm_validate_clone_mode =============
[15:26:10] ============= drm_validate_modeset (1 subtest) =============
[15:26:10] [PASSED] drm_test_check_connector_changed_modeset
[15:26:10] ============== [PASSED] drm_validate_modeset ===============
[15:26:10] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:26:10] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:26:10] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:26:10] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:26:10] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:26:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:26:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:26:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:26:10] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:26:10] ============== drm_bridge_alloc (2 subtests) ===============
[15:26:10] [PASSED] drm_test_drm_bridge_alloc_basic
[15:26:10] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:26:10] ================ [PASSED] drm_bridge_alloc =================
[15:26:10] ============= drm_cmdline_parser (40 subtests) =============
[15:26:10] [PASSED] drm_test_cmdline_force_d_only
[15:26:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:26:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:26:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:26:10] [PASSED] drm_test_cmdline_force_e_only
[15:26:10] [PASSED] drm_test_cmdline_res
[15:26:10] [PASSED] drm_test_cmdline_res_vesa
[15:26:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:26:10] [PASSED] drm_test_cmdline_res_rblank
[15:26:10] [PASSED] drm_test_cmdline_res_bpp
[15:26:10] [PASSED] drm_test_cmdline_res_refresh
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:26:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:26:10] [PASSED] drm_test_cmdline_res_margins_force_on
[15:26:10] [PASSED] drm_test_cmdline_res_vesa_margins
[15:26:10] [PASSED] drm_test_cmdline_name
[15:26:10] [PASSED] drm_test_cmdline_name_bpp
[15:26:10] [PASSED] drm_test_cmdline_name_option
[15:26:10] [PASSED] drm_test_cmdline_name_bpp_option
[15:26:10] [PASSED] drm_test_cmdline_rotate_0
[15:26:10] [PASSED] drm_test_cmdline_rotate_90
[15:26:10] [PASSED] drm_test_cmdline_rotate_180
[15:26:10] [PASSED] drm_test_cmdline_rotate_270
[15:26:10] [PASSED] drm_test_cmdline_hmirror
[15:26:10] [PASSED] drm_test_cmdline_vmirror
[15:26:10] [PASSED] drm_test_cmdline_margin_options
[15:26:10] [PASSED] drm_test_cmdline_multiple_options
[15:26:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:26:10] [PASSED] drm_test_cmdline_extra_and_option
[15:26:10] [PASSED] drm_test_cmdline_freestanding_options
[15:26:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:26:10] [PASSED] drm_test_cmdline_panel_orientation
[15:26:10] ================ drm_test_cmdline_invalid  =================
[15:26:10] [PASSED] margin_only
[15:26:10] [PASSED] interlace_only
[15:26:10] [PASSED] res_missing_x
[15:26:10] [PASSED] res_missing_y
[15:26:10] [PASSED] res_bad_y
[15:26:10] [PASSED] res_missing_y_bpp
[15:26:10] [PASSED] res_bad_bpp
[15:26:10] [PASSED] res_bad_refresh
[15:26:10] [PASSED] res_bpp_refresh_force_on_off
[15:26:10] [PASSED] res_invalid_mode
[15:26:10] [PASSED] res_bpp_wrong_place_mode
[15:26:10] [PASSED] name_bpp_refresh
[15:26:10] [PASSED] name_refresh
[15:26:10] [PASSED] name_refresh_wrong_mode
[15:26:10] [PASSED] name_refresh_invalid_mode
[15:26:10] [PASSED] rotate_multiple
[15:26:10] [PASSED] rotate_invalid_val
[15:26:10] [PASSED] rotate_truncated
[15:26:10] [PASSED] invalid_option
[15:26:10] [PASSED] invalid_tv_option
[15:26:10] [PASSED] truncated_tv_option
[15:26:10] ============ [PASSED] drm_test_cmdline_invalid =============
[15:26:10] =============== drm_test_cmdline_tv_options  ===============
[15:26:10] [PASSED] NTSC
[15:26:10] [PASSED] NTSC_443
[15:26:10] [PASSED] NTSC_J
[15:26:10] [PASSED] PAL
[15:26:10] [PASSED] PAL_M
[15:26:10] [PASSED] PAL_N
[15:26:10] [PASSED] SECAM
[15:26:10] [PASSED] MONO_525
[15:26:10] [PASSED] MONO_625
[15:26:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:26:10] =============== [PASSED] drm_cmdline_parser ================
[15:26:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:26:10] [PASSED] drm_test_connector_hdmi_init_valid
[15:26:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:26:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:26:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:26:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:26:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:26:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:26:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:26:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[15:26:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:26:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:26:10] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:26:10] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:26:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:26:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:26:10] [PASSED] drm_test_connector_hdmi_init_null_product
[15:26:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:26:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:26:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:26:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:26:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:26:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:26:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:26:10] ========= drm_test_connector_hdmi_init_type_valid  =========
[15:26:10] [PASSED] HDMI-A
[15:26:10] [PASSED] HDMI-B
[15:26:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:26:10] ======== drm_test_connector_hdmi_init_type_invalid  ========
[15:26:10] [PASSED] Unknown
[15:26:10] [PASSED] VGA
[15:26:10] [PASSED] DVI-I
[15:26:10] [PASSED] DVI-D
[15:26:10] [PASSED] DVI-A
[15:26:10] [PASSED] Composite
[15:26:10] [PASSED] SVIDEO
[15:26:10] [PASSED] LVDS
[15:26:10] [PASSED] Component
[15:26:10] [PASSED] DIN
[15:26:10] [PASSED] DP
[15:26:10] [PASSED] TV
[15:26:10] [PASSED] eDP
[15:26:10] [PASSED] Virtual
[15:26:10] [PASSED] DSI
[15:26:10] [PASSED] DPI
[15:26:10] [PASSED] Writeback
[15:26:10] [PASSED] SPI
[15:26:10] [PASSED] USB
[15:26:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:26:10] ============ [PASSED] drmm_connector_hdmi_init =============
[15:26:10] ============= drmm_connector_init (3 subtests) =============
[15:26:10] [PASSED] drm_test_drmm_connector_init
[15:26:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:26:10] ========= drm_test_drmm_connector_init_type_valid  =========
[15:26:10] [PASSED] Unknown
[15:26:10] [PASSED] VGA
[15:26:10] [PASSED] DVI-I
[15:26:10] [PASSED] DVI-D
[15:26:10] [PASSED] DVI-A
[15:26:10] [PASSED] Composite
[15:26:10] [PASSED] SVIDEO
[15:26:10] [PASSED] LVDS
[15:26:10] [PASSED] Component
[15:26:10] [PASSED] DIN
[15:26:10] [PASSED] DP
[15:26:10] [PASSED] HDMI-A
[15:26:10] [PASSED] HDMI-B
[15:26:10] [PASSED] TV
[15:26:10] [PASSED] eDP
[15:26:10] [PASSED] Virtual
[15:26:10] [PASSED] DSI
[15:26:10] [PASSED] DPI
[15:26:10] [PASSED] Writeback
[15:26:10] [PASSED] SPI
[15:26:10] [PASSED] USB
[15:26:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:26:10] =============== [PASSED] drmm_connector_init ===============
[15:26:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_init
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:26:10] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[15:26:10] [PASSED] Unknown
[15:26:10] [PASSED] VGA
[15:26:10] [PASSED] DVI-I
[15:26:10] [PASSED] DVI-D
[15:26:10] [PASSED] DVI-A
[15:26:10] [PASSED] Composite
[15:26:10] [PASSED] SVIDEO
[15:26:10] [PASSED] LVDS
[15:26:10] [PASSED] Component
[15:26:10] [PASSED] DIN
[15:26:10] [PASSED] DP
[15:26:10] [PASSED] HDMI-A
[15:26:10] [PASSED] HDMI-B
[15:26:10] [PASSED] TV
[15:26:10] [PASSED] eDP
[15:26:10] [PASSED] Virtual
[15:26:10] [PASSED] DSI
[15:26:10] [PASSED] DPI
[15:26:10] [PASSED] Writeback
[15:26:10] [PASSED] SPI
[15:26:10] [PASSED] USB
[15:26:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:26:10] ======== drm_test_drm_connector_dynamic_init_name  =========
[15:26:10] [PASSED] Unknown
[15:26:10] [PASSED] VGA
[15:26:10] [PASSED] DVI-I
[15:26:10] [PASSED] DVI-D
[15:26:10] [PASSED] DVI-A
[15:26:10] [PASSED] Composite
[15:26:10] [PASSED] SVIDEO
[15:26:10] [PASSED] LVDS
[15:26:10] [PASSED] Component
[15:26:10] [PASSED] DIN
[15:26:10] [PASSED] DP
[15:26:10] [PASSED] HDMI-A
[15:26:10] [PASSED] HDMI-B
[15:26:10] [PASSED] TV
[15:26:10] [PASSED] eDP
[15:26:10] [PASSED] Virtual
[15:26:10] [PASSED] DSI
[15:26:10] [PASSED] DPI
[15:26:10] [PASSED] Writeback
[15:26:10] [PASSED] SPI
[15:26:10] [PASSED] USB
[15:26:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:26:10] =========== [PASSED] drm_connector_dynamic_init ============
[15:26:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:26:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:26:10] ======= drm_connector_dynamic_register (7 subtests) ========
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:26:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:26:10] ========= [PASSED] drm_connector_dynamic_register ==========
[15:26:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:26:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:26:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:26:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:26:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:26:10] ========== drm_test_get_tv_mode_from_name_valid  ===========
[15:26:10] [PASSED] NTSC
[15:26:10] [PASSED] NTSC-443
[15:26:10] [PASSED] NTSC-J
[15:26:10] [PASSED] PAL
[15:26:10] [PASSED] PAL-M
[15:26:10] [PASSED] PAL-N
[15:26:10] [PASSED] SECAM
[15:26:10] [PASSED] Mono
[15:26:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:26:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:26:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:26:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:26:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:26:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[15:26:10] [PASSED] VIC 96
[15:26:10] [PASSED] VIC 97
[15:26:10] [PASSED] VIC 101
[15:26:10] [PASSED] VIC 102
[15:26:10] [PASSED] VIC 106
[15:26:10] [PASSED] VIC 107
[15:26:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:26:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:26:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:26:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:26:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:26:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:26:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:26:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:26:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[15:26:10] [PASSED] Automatic
[15:26:10] [PASSED] Full
[15:26:10] [PASSED] Limited 16:235
[15:26:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:26:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:26:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:26:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:26:10] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[15:26:10] [PASSED] RGB
[15:26:10] [PASSED] YUV 4:2:0
[15:26:10] [PASSED] YUV 4:2:2
[15:26:10] [PASSED] YUV 4:4:4
[15:26:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:26:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:26:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:26:10] ============= drm_damage_helper (21 subtests) ==============
[15:26:10] [PASSED] drm_test_damage_iter_no_damage
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:26:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:26:10] [PASSED] drm_test_damage_iter_simple_damage
[15:26:10] [PASSED] drm_test_damage_iter_single_damage
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:26:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:26:10] [PASSED] drm_test_damage_iter_damage
[15:26:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:26:10] [PASSED] drm_test_damage_iter_damage_one_outside
[15:26:10] [PASSED] drm_test_damage_iter_damage_src_moved
[15:26:10] [PASSED] drm_test_damage_iter_damage_not_visible
[15:26:10] ================ [PASSED] drm_damage_helper ================
[15:26:10] ============== drm_dp_mst_helper (3 subtests) ==============
[15:26:10] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[15:26:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:26:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:26:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:26:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:26:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:26:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:26:10] ============== drm_test_dp_mst_calc_pbn_div  ===============
[15:26:10] [PASSED] Link rate 2000000 lane count 4
[15:26:10] [PASSED] Link rate 2000000 lane count 2
[15:26:10] [PASSED] Link rate 2000000 lane count 1
[15:26:10] [PASSED] Link rate 1350000 lane count 4
[15:26:10] [PASSED] Link rate 1350000 lane count 2
[15:26:10] [PASSED] Link rate 1350000 lane count 1
[15:26:10] [PASSED] Link rate 1000000 lane count 4
[15:26:10] [PASSED] Link rate 1000000 lane count 2
[15:26:10] [PASSED] Link rate 1000000 lane count 1
[15:26:10] [PASSED] Link rate 810000 lane count 4
[15:26:10] [PASSED] Link rate 810000 lane count 2
[15:26:10] [PASSED] Link rate 810000 lane count 1
[15:26:10] [PASSED] Link rate 540000 lane count 4
[15:26:10] [PASSED] Link rate 540000 lane count 2
[15:26:10] [PASSED] Link rate 540000 lane count 1
[15:26:10] [PASSED] Link rate 270000 lane count 4
[15:26:10] [PASSED] Link rate 270000 lane count 2
[15:26:10] [PASSED] Link rate 270000 lane count 1
[15:26:10] [PASSED] Link rate 162000 lane count 4
[15:26:10] [PASSED] Link rate 162000 lane count 2
[15:26:10] [PASSED] Link rate 162000 lane count 1
[15:26:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:26:10] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[15:26:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:26:10] [PASSED] DP_POWER_UP_PHY with port number
[15:26:10] [PASSED] DP_POWER_DOWN_PHY with port number
[15:26:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:26:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:26:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:26:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:26:10] [PASSED] DP_QUERY_PAYLOAD with port number
[15:26:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:26:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:26:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:26:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:26:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:26:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:26:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:26:10] [PASSED] DP_REMOTE_I2C_READ with port number
[15:26:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:26:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:26:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:26:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:26:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:26:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:26:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:26:10] ================ [PASSED] drm_dp_mst_helper ================
[15:26:10] ================== drm_exec (7 subtests) ===================
[15:26:10] [PASSED] sanitycheck
[15:26:10] [PASSED] test_lock
[15:26:10] [PASSED] test_lock_unlock
[15:26:10] [PASSED] test_duplicates
[15:26:10] [PASSED] test_prepare
[15:26:10] [PASSED] test_prepare_array
[15:26:10] [PASSED] test_multiple_loops
[15:26:10] ==================== [PASSED] drm_exec =====================
[15:26:10] =========== drm_format_helper_test (17 subtests) ===========
[15:26:10] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:26:10] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:26:10] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:26:10] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:26:10] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:26:10] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:26:10] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:26:10] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:26:10] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:26:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:26:10] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:26:10] ============== drm_test_fb_xrgb8888_to_mono  ===============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:26:10] ==================== drm_test_fb_swab  =====================
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ================ [PASSED] drm_test_fb_swab =================
[15:26:10] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:26:10] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[15:26:10] [PASSED] single_pixel_source_buffer
[15:26:10] [PASSED] single_pixel_clip_rectangle
[15:26:10] [PASSED] well_known_colors
[15:26:10] [PASSED] destination_pitch
[15:26:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:26:10] ================= drm_test_fb_clip_offset  =================
[15:26:10] [PASSED] pass through
[15:26:10] [PASSED] horizontal offset
[15:26:10] [PASSED] vertical offset
[15:26:10] [PASSED] horizontal and vertical offset
[15:26:10] [PASSED] horizontal offset (custom pitch)
[15:26:10] [PASSED] vertical offset (custom pitch)
[15:26:10] [PASSED] horizontal and vertical offset (custom pitch)
[15:26:10] ============= [PASSED] drm_test_fb_clip_offset =============
[15:26:10] =================== drm_test_fb_memcpy  ====================
[15:26:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:26:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:26:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:26:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:26:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:26:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:26:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:26:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:26:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:26:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:26:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:26:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:26:10] =============== [PASSED] drm_test_fb_memcpy ================
[15:26:10] ============= [PASSED] drm_format_helper_test ==============
[15:26:10] ================= drm_format (18 subtests) =================
[15:26:10] [PASSED] drm_test_format_block_width_invalid
[15:26:10] [PASSED] drm_test_format_block_width_one_plane
[15:26:10] [PASSED] drm_test_format_block_width_two_plane
[15:26:10] [PASSED] drm_test_format_block_width_three_plane
[15:26:10] [PASSED] drm_test_format_block_width_tiled
[15:26:10] [PASSED] drm_test_format_block_height_invalid
[15:26:10] [PASSED] drm_test_format_block_height_one_plane
[15:26:10] [PASSED] drm_test_format_block_height_two_plane
[15:26:10] [PASSED] drm_test_format_block_height_three_plane
[15:26:10] [PASSED] drm_test_format_block_height_tiled
[15:26:10] [PASSED] drm_test_format_min_pitch_invalid
[15:26:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:26:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:26:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:26:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:26:10] [PASSED] drm_test_format_min_pitch_two_plane
[15:26:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:26:10] [PASSED] drm_test_format_min_pitch_tiled
[15:26:10] =================== [PASSED] drm_format ====================
[15:26:10] ============== drm_framebuffer (10 subtests) ===============
[15:26:10] ========== drm_test_framebuffer_check_src_coords  ==========
[15:26:10] [PASSED] Success: source fits into fb
[15:26:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:26:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:26:10] [PASSED] Fail: overflowing fb with source width
[15:26:10] [PASSED] Fail: overflowing fb with source height
[15:26:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:26:10] [PASSED] drm_test_framebuffer_cleanup
[15:26:10] =============== drm_test_framebuffer_create  ===============
[15:26:10] [PASSED] ABGR8888 normal sizes
[15:26:10] [PASSED] ABGR8888 max sizes
[15:26:10] [PASSED] ABGR8888 pitch greater than min required
[15:26:10] [PASSED] ABGR8888 pitch less than min required
[15:26:10] [PASSED] ABGR8888 Invalid width
[15:26:10] [PASSED] ABGR8888 Invalid buffer handle
[15:26:10] [PASSED] No pixel format
[15:26:10] [PASSED] ABGR8888 Width 0
[15:26:10] [PASSED] ABGR8888 Height 0
[15:26:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:26:10] [PASSED] ABGR8888 Large buffer offset
[15:26:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:26:10] [PASSED] ABGR8888 Invalid flag
[15:26:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:26:10] [PASSED] ABGR8888 Valid buffer modifier
[15:26:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:26:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] NV12 Normal sizes
[15:26:10] [PASSED] NV12 Max sizes
[15:26:10] [PASSED] NV12 Invalid pitch
[15:26:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:26:10] [PASSED] NV12 different  modifier per-plane
[15:26:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:26:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] NV12 Modifier for inexistent plane
[15:26:10] [PASSED] NV12 Handle for inexistent plane
[15:26:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:26:10] [PASSED] YVU420 Normal sizes
[15:26:10] [PASSED] YVU420 Max sizes
[15:26:10] [PASSED] YVU420 Invalid pitch
[15:26:10] [PASSED] YVU420 Different pitches
[15:26:10] [PASSED] YVU420 Different buffer offsets/pitches
[15:26:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:26:10] [PASSED] YVU420 Valid modifier
[15:26:10] [PASSED] YVU420 Different modifiers per plane
[15:26:10] [PASSED] YVU420 Modifier for inexistent plane
[15:26:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:26:10] [PASSED] X0L2 Normal sizes
[15:26:10] [PASSED] X0L2 Max sizes
[15:26:10] [PASSED] X0L2 Invalid pitch
[15:26:10] [PASSED] X0L2 Pitch greater than minimum required
[15:26:10] [PASSED] X0L2 Handle for inexistent plane
[15:26:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:26:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:26:10] [PASSED] X0L2 Valid modifier
[15:26:10] [PASSED] X0L2 Modifier for inexistent plane
[15:26:10] =========== [PASSED] drm_test_framebuffer_create ===========
[15:26:10] [PASSED] drm_test_framebuffer_free
[15:26:10] [PASSED] drm_test_framebuffer_init
[15:26:10] [PASSED] drm_test_framebuffer_init_bad_format
[15:26:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:26:10] [PASSED] drm_test_framebuffer_lookup
[15:26:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:26:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:26:10] ================= [PASSED] drm_framebuffer =================
[15:26:10] ================ drm_gem_shmem (8 subtests) ================
[15:26:10] [PASSED] drm_gem_shmem_test_obj_create
[15:26:10] [PASSED] drm_gem_shmem_test_obj_create_private
[15:26:10] [PASSED] drm_gem_shmem_test_pin_pages
[15:26:10] [PASSED] drm_gem_shmem_test_vmap
[15:26:10] [PASSED] drm_gem_shmem_test_get_sg_table
[15:26:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:26:10] [PASSED] drm_gem_shmem_test_madvise
[15:26:10] [PASSED] drm_gem_shmem_test_purge
[15:26:10] ================== [PASSED] drm_gem_shmem ==================
[15:26:10] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:26:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[15:26:10] [PASSED] Automatic
[15:26:10] [PASSED] Full
[15:26:10] [PASSED] Limited 16:235
[15:26:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:26:10] [PASSED] drm_test_check_disable_connector
[15:26:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:26:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:26:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:26:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:26:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:26:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:26:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:26:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:26:10] [PASSED] drm_test_check_output_bpc_dvi
[15:26:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:26:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:26:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:26:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:26:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:26:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:26:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:26:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:26:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:26:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:26:10] [PASSED] drm_test_check_broadcast_rgb_value
[15:26:10] [PASSED] drm_test_check_bpc_8_value
[15:26:10] [PASSED] drm_test_check_bpc_10_value
[15:26:10] [PASSED] drm_test_check_bpc_12_value
[15:26:10] [PASSED] drm_test_check_format_value
[15:26:10] [PASSED] drm_test_check_tmds_char_value
[15:26:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:26:10] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:26:10] [PASSED] drm_test_check_mode_valid
[15:26:10] [PASSED] drm_test_check_mode_valid_reject
[15:26:10] [PASSED] drm_test_check_mode_valid_reject_rate
[15:26:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:26:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:26:10] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[15:26:10] [PASSED] drm_test_check_infoframes
[15:26:10] [PASSED] drm_test_check_reject_avi_infoframe
[15:26:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[15:26:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[15:26:10] [PASSED] drm_test_check_reject_audio_infoframe
[15:26:10] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[15:26:10] ================= drm_managed (2 subtests) =================
[15:26:10] [PASSED] drm_test_managed_release_action
[15:26:10] [PASSED] drm_test_managed_run_action
[15:26:10] =================== [PASSED] drm_managed ===================
[15:26:10] =================== drm_mm (6 subtests) ====================
[15:26:10] [PASSED] drm_test_mm_init
[15:26:10] [PASSED] drm_test_mm_debug
[15:26:10] [PASSED] drm_test_mm_align32
[15:26:10] [PASSED] drm_test_mm_align64
[15:26:10] [PASSED] drm_test_mm_lowest
[15:26:10] [PASSED] drm_test_mm_highest
[15:26:10] ===================== [PASSED] drm_mm ======================
[15:26:10] ============= drm_modes_analog_tv (5 subtests) =============
[15:26:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:26:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:26:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:26:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:26:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:26:10] =============== [PASSED] drm_modes_analog_tv ===============
[15:26:10] ============== drm_plane_helper (2 subtests) ===============
[15:26:10] =============== drm_test_check_plane_state  ================
[15:26:10] [PASSED] clipping_simple
[15:26:10] [PASSED] clipping_rotate_reflect
[15:26:10] [PASSED] positioning_simple
[15:26:10] [PASSED] upscaling
[15:26:10] [PASSED] downscaling
[15:26:10] [PASSED] rounding1
[15:26:10] [PASSED] rounding2
[15:26:10] [PASSED] rounding3
[15:26:10] [PASSED] rounding4
[15:26:10] =========== [PASSED] drm_test_check_plane_state ============
[15:26:10] =========== drm_test_check_invalid_plane_state  ============
[15:26:10] [PASSED] positioning_invalid
[15:26:10] [PASSED] upscaling_invalid
[15:26:10] [PASSED] downscaling_invalid
[15:26:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:26:10] ================ [PASSED] drm_plane_helper =================
[15:26:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:26:10] ====== drm_test_connector_helper_tv_get_modes_check  =======
[15:26:10] [PASSED] None
[15:26:10] [PASSED] PAL
[15:26:10] [PASSED] NTSC
[15:26:10] [PASSED] Both, NTSC Default
[15:26:10] [PASSED] Both, PAL Default
[15:26:10] [PASSED] Both, NTSC Default, with PAL on command-line
[15:26:10] [PASSED] Both, PAL Default, with NTSC on command-line
[15:26:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:26:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:26:10] ================== drm_rect (9 subtests) ===================
[15:26:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:26:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:26:10] [PASSED] drm_test_rect_clip_scaled_clipped
[15:26:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:26:10] ================= drm_test_rect_intersect  =================
[15:26:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:26:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:26:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:26:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:26:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:26:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:26:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:26:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:26:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:26:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:26:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:26:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:26:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:26:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:26:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:26:10] ============= [PASSED] drm_test_rect_intersect =============
[15:26:10] ================ drm_test_rect_calc_hscale  ================
[15:26:10] [PASSED] normal use
[15:26:10] [PASSED] out of max range
[15:26:10] [PASSED] out of min range
[15:26:10] [PASSED] zero dst
[15:26:10] [PASSED] negative src
[15:26:10] [PASSED] negative dst
[15:26:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:26:10] ================ drm_test_rect_calc_vscale  ================
[15:26:10] [PASSED] normal use
[15:26:10] [PASSED] out of max range
[15:26:10] [PASSED] out of min range
[15:26:10] [PASSED] zero dst
[15:26:10] [PASSED] negative src
[15:26:10] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[15:26:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:26:10] ================== drm_test_rect_rotate  ===================
[15:26:10] [PASSED] reflect-x
[15:26:10] [PASSED] reflect-y
[15:26:10] [PASSED] rotate-0
[15:26:10] [PASSED] rotate-90
[15:26:10] [PASSED] rotate-180
[15:26:10] [PASSED] rotate-270
[15:26:10] ============== [PASSED] drm_test_rect_rotate ===============
[15:26:10] ================ drm_test_rect_rotate_inv  =================
[15:26:10] [PASSED] reflect-x
[15:26:10] [PASSED] reflect-y
[15:26:10] [PASSED] rotate-0
[15:26:10] [PASSED] rotate-90
[15:26:10] [PASSED] rotate-180
[15:26:10] [PASSED] rotate-270
[15:26:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:26:10] ==================== [PASSED] drm_rect =====================
[15:26:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:26:10] ============ drm_test_sysfb_build_fourcc_list  =============
[15:26:10] [PASSED] no native formats
[15:26:10] [PASSED] XRGB8888 as native format
[15:26:10] [PASSED] remove duplicates
[15:26:10] [PASSED] convert alpha formats
[15:26:10] [PASSED] random formats
[15:26:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:26:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:26:10] ================== drm_fixp (2 subtests) ===================
[15:26:10] [PASSED] drm_test_int2fixp
[15:26:10] [PASSED] drm_test_sm2fixp
[15:26:10] ==================== [PASSED] drm_fixp =====================
[15:26:10] ============================================================
[15:26:10] Testing complete. Ran 621 tests: passed: 621
[15:26:10] Elapsed time: 25.940s total, 1.738s configuring, 24.035s building, 0.134s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:26:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:26:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:26:21] Starting KUnit Kernel (1/1)...
[15:26:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:26:21] ================= ttm_device (5 subtests) ==================
[15:26:21] [PASSED] ttm_device_init_basic
[15:26:21] [PASSED] ttm_device_init_multiple
[15:26:21] [PASSED] ttm_device_fini_basic
[15:26:21] [PASSED] ttm_device_init_no_vma_man
[15:26:21] ================== ttm_device_init_pools  ==================
[15:26:21] [PASSED] No DMA allocations, no DMA32 required
[15:26:21] [PASSED] DMA allocations, DMA32 required
[15:26:21] [PASSED] No DMA allocations, DMA32 required
[15:26:21] [PASSED] DMA allocations, no DMA32 required
[15:26:21] ============== [PASSED] ttm_device_init_pools ==============
[15:26:21] =================== [PASSED] ttm_device ====================
[15:26:21] ================== ttm_pool (8 subtests) ===================
[15:26:21] ================== ttm_pool_alloc_basic  ===================
[15:26:21] [PASSED] One page
[15:26:21] [PASSED] More than one page
[15:26:21] [PASSED] Above the allocation limit
[15:26:21] [PASSED] One page, with coherent DMA mappings enabled
[15:26:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:26:21] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:26:21] ============== ttm_pool_alloc_basic_dma_addr  ==============
[15:26:21] [PASSED] One page
[15:26:21] [PASSED] More than one page
[15:26:21] [PASSED] Above the allocation limit
[15:26:21] [PASSED] One page, with coherent DMA mappings enabled
[15:26:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:26:21] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:26:21] [PASSED] ttm_pool_alloc_order_caching_match
[15:26:21] [PASSED] ttm_pool_alloc_caching_mismatch
[15:26:21] [PASSED] ttm_pool_alloc_order_mismatch
[15:26:21] [PASSED] ttm_pool_free_dma_alloc
[15:26:21] [PASSED] ttm_pool_free_no_dma_alloc
[15:26:21] [PASSED] ttm_pool_fini_basic
[15:26:21] ==================== [PASSED] ttm_pool =====================
[15:26:21] ================ ttm_resource (8 subtests) =================
[15:26:21] ================= ttm_resource_init_basic  =================
[15:26:21] [PASSED] Init resource in TTM_PL_SYSTEM
[15:26:21] [PASSED] Init resource in TTM_PL_VRAM
[15:26:21] [PASSED] Init resource in a private placement
[15:26:21] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:26:21] ============= [PASSED] ttm_resource_init_basic =============
[15:26:21] [PASSED] ttm_resource_init_pinned
[15:26:21] [PASSED] ttm_resource_fini_basic
[15:26:21] [PASSED] ttm_resource_manager_init_basic
[15:26:21] [PASSED] ttm_resource_manager_usage_basic
[15:26:21] [PASSED] ttm_resource_manager_set_used_basic
[15:26:21] [PASSED] ttm_sys_man_alloc_basic
[15:26:21] [PASSED] ttm_sys_man_free_basic
[15:26:21] ================== [PASSED] ttm_resource ===================
[15:26:21] =================== ttm_tt (15 subtests) ===================
[15:26:21] ==================== ttm_tt_init_basic  ====================
[15:26:21] [PASSED] Page-aligned size
[15:26:21] [PASSED] Extra pages requested
[15:26:21] ================ [PASSED] ttm_tt_init_basic ================
[15:26:21] [PASSED] ttm_tt_init_misaligned
[15:26:21] [PASSED] ttm_tt_fini_basic
[15:26:21] [PASSED] ttm_tt_fini_sg
[15:26:21] [PASSED] ttm_tt_fini_shmem
[15:26:21] [PASSED] ttm_tt_create_basic
[15:26:21] [PASSED] ttm_tt_create_invalid_bo_type
[15:26:21] [PASSED] ttm_tt_create_ttm_exists
[15:26:21] [PASSED] ttm_tt_create_failed
[15:26:21] [PASSED] ttm_tt_destroy_basic
[15:26:21] [PASSED] ttm_tt_populate_null_ttm
[15:26:21] [PASSED] ttm_tt_populate_populated_ttm
[15:26:21] [PASSED] ttm_tt_unpopulate_basic
[15:26:21] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:26:21] [PASSED] ttm_tt_swapin_basic
[15:26:21] ===================== [PASSED] ttm_tt ======================
[15:26:21] =================== ttm_bo (14 subtests) ===================
[15:26:21] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[15:26:21] [PASSED] Cannot be interrupted and sleeps
[15:26:21] [PASSED] Cannot be interrupted, locks straight away
[15:26:21] [PASSED] Can be interrupted, sleeps
[15:26:21] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:26:21] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:26:21] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:26:22] [PASSED] ttm_bo_reserve_double_resv
[15:26:22] [PASSED] ttm_bo_reserve_interrupted
[15:26:22] [PASSED] ttm_bo_reserve_deadlock
[15:26:22] [PASSED] ttm_bo_unreserve_basic
[15:26:22] [PASSED] ttm_bo_unreserve_pinned
[15:26:22] [PASSED] ttm_bo_unreserve_bulk
[15:26:22] [PASSED] ttm_bo_fini_basic
[15:26:22] [PASSED] ttm_bo_fini_shared_resv
[15:26:22] [PASSED] ttm_bo_pin_basic
[15:26:22] [PASSED] ttm_bo_pin_unpin_resource
[15:26:22] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:26:22] ===================== [PASSED] ttm_bo ======================
[15:26:22] ============== ttm_bo_validate (21 subtests) ===============
[15:26:22] ============== ttm_bo_init_reserved_sys_man  ===============
[15:26:22] [PASSED] Buffer object for userspace
[15:26:22] [PASSED] Kernel buffer object
[15:26:22] [PASSED] Shared buffer object
[15:26:22] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:26:22] ============== ttm_bo_init_reserved_mock_man  ==============
[15:26:22] [PASSED] Buffer object for userspace
[15:26:22] [PASSED] Kernel buffer object
[15:26:22] [PASSED] Shared buffer object
[15:26:22] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:26:22] [PASSED] ttm_bo_init_reserved_resv
[15:26:22] ================== ttm_bo_validate_basic  ==================
[15:26:22] [PASSED] Buffer object for userspace
[15:26:22] [PASSED] Kernel buffer object
[15:26:22] [PASSED] Shared buffer object
[15:26:22] ============== [PASSED] ttm_bo_validate_basic ==============
[15:26:22] [PASSED] ttm_bo_validate_invalid_placement
[15:26:22] ============= ttm_bo_validate_same_placement  ==============
[15:26:22] [PASSED] System manager
[15:26:22] [PASSED] VRAM manager
[15:26:22] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:26:22] [PASSED] ttm_bo_validate_failed_alloc
[15:26:22] [PASSED] ttm_bo_validate_pinned
[15:26:22] [PASSED] ttm_bo_validate_busy_placement
[15:26:22] ================ ttm_bo_validate_multihop  =================
[15:26:22] [PASSED] Buffer object for userspace
[15:26:22] [PASSED] Kernel buffer object
[15:26:22] [PASSED] Shared buffer object
[15:26:22] ============ [PASSED] ttm_bo_validate_multihop =============
[15:26:22] ========== ttm_bo_validate_no_placement_signaled  ==========
[15:26:22] [PASSED] Buffer object in system domain, no page vector
[15:26:22] [PASSED] Buffer object in system domain with an existing page vector
[15:26:22] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:26:22] ======== ttm_bo_validate_no_placement_not_signaled  ========
[15:26:22] [PASSED] Buffer object for userspace
[15:26:22] [PASSED] Kernel buffer object
[15:26:22] [PASSED] Shared buffer object
[15:26:22] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:26:22] [PASSED] ttm_bo_validate_move_fence_signaled
[15:26:22] ========= ttm_bo_validate_move_fence_not_signaled  =========
[15:26:22] [PASSED] Waits for GPU
[15:26:22] [PASSED] Tries to lock straight away
[15:26:22] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:26:22] [PASSED] ttm_bo_validate_happy_evict
[15:26:22] [PASSED] ttm_bo_validate_all_pinned_evict
[15:26:22] [PASSED] ttm_bo_validate_allowed_only_evict
[15:26:22] [PASSED] ttm_bo_validate_deleted_evict
[15:26:22] [PASSED] ttm_bo_validate_busy_domain_evict
[15:26:22] [PASSED] ttm_bo_validate_evict_gutting
[15:26:22] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:26:22] ================= [PASSED] ttm_bo_validate =================
[15:26:22] ============================================================
[15:26:22] Testing complete. Ran 101 tests: passed: 101
[15:26:22] Elapsed time: 11.401s total, 1.691s configuring, 9.494s building, 0.183s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Two-pass MMU interval notifiers (rev3)

[Patchwork]

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== Series Details ==

Series: Two-pass MMU interval notifiers (rev3)
URL   : https://patchwork.freedesktop.org/series/153280/
State : success

== Summary ==

CI Bug Log - changes from xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603_BAT -> xe-pw-153280v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-153280v3_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - bat-bmg-2:          [DMESG-WARN][1] ([Intel XE#7433]) -> [PASS][2] +3 other tests pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
    - bat-bmg-1:          [DMESG-WARN][3] ([Intel XE#7433]) -> [PASS][4] +3 other tests pass
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on.html

  * igt@xe_module_load@load:
    - bat-bmg-3:          [DMESG-WARN][5] ([Intel XE#7433]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/bat-bmg-3/igt@xe_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/bat-bmg-3/igt@xe_module_load@load.html

  
  [Intel XE#7433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7433


Build changes
-------------

  * Linux: xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603 -> xe-pw-153280v3

  IGT_8777: a50285a68dbef0fe11140adef4016a756f57b324 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603: 3594e3a9ce7d4ad237f43ff907e9744446108603
  xe-pw-153280v3: 153280v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/index.html

[-- Attachment #2: Type: text/html, Size: 3026 bytes --]

✗ Xe.CI.FULL: failure for Two-pass MMU interval notifiers (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 67569 bytes --]

== Series Details ==

Series: Two-pass MMU interval notifiers (rev3)
URL   : https://patchwork.freedesktop.org/series/153280/
State : failure

== Summary ==

CI Bug Log - changes from xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603_FULL -> xe-pw-153280v3_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-153280v3_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-153280v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-153280v3_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
    - shard-bmg:          NOTRUN -> [ABORT][1] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html

  * igt@xe_oa@mmio-triggered-reports@oag-0:
    - shard-bmg:          NOTRUN -> [FAIL][2] +13 other tests fail
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@xe_oa@mmio-triggered-reports@oag-0.html

  
Known issues
------------

  Here are the changes found in xe-pw-153280v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2233])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
    - shard-lnl:          [PASS][4] -> [FAIL][5] ([Intel XE#6054] / [Intel XE#7509]) +3 other tests fail
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2370]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2327]) +20 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1407]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#7059] / [Intel XE#7085]) +3 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#610] / [Intel XE#7387]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +58 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2328] / [Intel XE#7367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#607] / [Intel XE#7361]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373]) +7 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#367] / [Intel XE#7354]) +12 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#367] / [Intel XE#7354])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#1512] / [Intel XE#7392])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#2887])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#3432]) +9 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2652]) +44 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2887]) +80 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2724] / [Intel XE#7449]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2325] / [Intel XE#7358]) +7 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_chamelium_color@ctm-0-25.html
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#306] / [Intel XE#7358])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2252]) +54 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#6507])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#6969]) +10 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-0.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html

  * igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][29] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2341]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2390] / [Intel XE#6974]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#6974]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][33] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +11 other tests fail
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][34] ([Intel XE#3304]) +1 other test fail
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][35] ([Intel XE#6707] / [Intel XE#7439]) +3 other tests fail
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2320]) +26 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2321] / [Intel XE#7355]) +8 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#309] / [Intel XE#7343])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][39] ([Intel XE#5354])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2286] / [Intel XE#6035]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#1508])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4210] / [Intel XE#7467])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#1340] / [Intel XE#7435])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#4354] / [Intel XE#5882])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#4354] / [Intel XE#7386])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#4354] / [Intel XE#7473])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#4331] / [Intel XE#7227])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2244]) +6 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#4422] / [Intel XE#7442]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#4156] / [Intel XE#7425]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6126] / [Intel XE#776]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2373] / [Intel XE#7448])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#1138] / [Intel XE#7344])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2375] / [Intel XE#7438])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2374] / [Intel XE#6127])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_feature_discovery@psr1.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2374] / [Intel XE#7468])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#1421])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a3:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][58] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#7178] / [Intel XE#7349]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#7178] / [Intel XE#7351]) +19 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#7179]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#6703]) +66 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#6312] / [Intel XE#651])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#4141]) +78 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#6312])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2311]) +165 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#7061] / [Intel XE#7356]) +29 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#2352] / [Intel XE#7399]) +2 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2350] / [Intel XE#7503])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#656]) +3 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2313]) +163 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#3544])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#1503])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#6901]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#4298] / [Intel XE#5873])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#6911] / [Intel XE#7378]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#6911] / [Intel XE#7466]) +1 other test skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#4090] / [Intel XE#7443])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-7/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#2501] / [Intel XE#7465])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@legacy:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2486]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#6912] / [Intel XE#7375])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#7130]) +3 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#7283]) +23 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#2393]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#5021] / [Intel XE#7377]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#5020] / [Intel XE#7348]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#2763] / [Intel XE#6886]) +24 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#7376] / [Intel XE#870]) +4 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#2938] / [Intel XE#7376])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#3309] / [Intel XE#7368])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2392] / [Intel XE#7463]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#2505] / [Intel XE#7447])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2499])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) +3 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#1439] / [Intel XE#7402] / [Intel XE#836])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@package-g7:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#6814] / [Intel XE#7428])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#1489]) +42 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#2387] / [Intel XE#7429]) +2 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#1406] / [Intel XE#7345])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][102] ([Intel XE#1406] / [Intel XE#4609])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#1406])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_psr@psr2-no-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#2234] / [Intel XE#2850]) +68 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_psr@psr2-no-drrs.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#2234])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#2414] / [Intel XE#7446]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#2330] / [Intel XE#5813]) +3 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +10 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#2413]) +2 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#1435]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#6503]) +13 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#2426] / [Intel XE#5848])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][113] ([Intel XE#2509] / [Intel XE#7437])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#2450] / [Intel XE#7440])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@cmrr:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#2168] / [Intel XE#7444])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#1499]) +8 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-7/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][117] -> [FAIL][118] ([Intel XE#2142]) +1 other test fail
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#6599]) +2 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][120] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable:
    - shard-lnl:          NOTRUN -> [SKIP][121] ([Intel XE#4837])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable.html

  * igt@xe_eudebug@basic-vm-bind-metadata-discovery:
    - shard-bmg:          NOTRUN -> [SKIP][122] ([Intel XE#4837]) +42 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html

  * igt@xe_eudebug_online@pagefault-one-of-many:
    - shard-bmg:          NOTRUN -> [SKIP][123] ([Intel XE#6665])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@xe_eudebug_online@pagefault-one-of-many.html

  * igt@xe_eudebug_online@pagefault-read-stress:
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#6665] / [Intel XE#6681]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@xe_eudebug_online@pagefault-read-stress.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          NOTRUN -> [SKIP][125] ([Intel XE#4837] / [Intel XE#6665]) +27 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_eudebug_sriov@deny-sriov:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#5793] / [Intel XE#7320] / [Intel XE#7464]) +1 other test skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_eudebug_sriov@deny-sriov.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][127] ([Intel XE#6321])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict@evict-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#7140]) +7 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_evict@evict-threads-small-multi-queue.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][129] ([Intel XE#2322] / [Intel XE#7372]) +47 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#7136])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#7136]) +70 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_exec_fault_mode@twice-multi-queue-userptr.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][132] ([Intel XE#6874]) +160 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-priority:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#6874]) +2 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@xe_exec_multi_queue@max-queues-preempt-mode-priority.html

  * igt@xe_exec_system_allocator@many-stride-new-prefetch:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][134] ([Intel XE#7098])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@xe_exec_system_allocator@many-stride-new-prefetch.html

  * igt@xe_exec_system_allocator@twice-mmap-new-madvise:
    - shard-bmg:          NOTRUN -> [DMESG-FAIL][135] ([Intel XE#5213] / [Intel XE#5545] / [Intel XE#6652])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@xe_exec_system_allocator@twice-mmap-new-madvise.html

  * igt@xe_exec_threads@threads-many-queues:
    - shard-bmg:          NOTRUN -> [FAIL][136] ([Intel XE#7166])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_exec_threads@threads-many-queues.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][137] ([Intel XE#7138]) +49 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#7138])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][139] ([Intel XE#6281] / [Intel XE#7426])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-3/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-bmg:          NOTRUN -> [SKIP][140] ([Intel XE#2229])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_live_ktest@xe_eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][141] ([Intel XE#2833])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@xe_live_ktest@xe_eudebug.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][142] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][143] ([Intel XE#586] / [Intel XE#7323] / [Intel XE#7384])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#6964]) +18 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-bmg:          NOTRUN -> [SKIP][145] ([Intel XE#1420])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][146] ([Intel XE#2245])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_peer2peer@write:
    - shard-bmg:          NOTRUN -> [SKIP][147] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-7/igt@xe_peer2peer@write.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][148] ([Intel XE#5694] / [Intel XE#7370])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3cold-multiple-execs:
    - shard-bmg:          NOTRUN -> [SKIP][149] ([Intel XE#2284] / [Intel XE#7370]) +8 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-7/igt@xe_pm@d3cold-multiple-execs.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][150] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-bmg:          NOTRUN -> [SKIP][151] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7456])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][152] ([Intel XE#4733] / [Intel XE#7417]) +14 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-4/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][153] ([Intel XE#944]) +14 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-9/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-bmg:          NOTRUN -> [SKIP][154] ([Intel XE#6557] / [Intel XE#6703]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-2/igt@xe_sriov_flr@flr-each-isolation.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][155] ([Intel XE#301]) -> [PASS][156] +1 other test pass
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  
#### Warnings ####

  * igt@xe_module_load@load:
    - shard-bmg:          ([DMESG-WARN][157], [DMESG-WARN][158], [DMESG-WARN][159], [DMESG-WARN][160], [DMESG-WARN][161], [DMESG-WARN][162], [DMESG-WARN][163], [DMESG-WARN][164], [DMESG-WARN][165], [DMESG-WARN][166], [DMESG-WARN][167], [DMESG-WARN][168], [DMESG-WARN][169], [DMESG-WARN][170], [DMESG-WARN][171], [DMESG-WARN][172], [DMESG-WARN][173], [DMESG-WARN][174], [DMESG-WARN][175], [DMESG-WARN][176], [DMESG-WARN][177], [DMESG-WARN][178], [DMESG-WARN][179], [DMESG-WARN][180], [DMESG-WARN][181]) ([Intel XE#7433]) -> ([PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [SKIP][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207]) ([Intel XE#2457] / [Intel XE#7405])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-bmg-5/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-bmg-5/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-bmg-5/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603/shard-bmg-8/igt@xe_module_load@load.html
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   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-1/igt@xe_module_load@load.html
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   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-6/igt@xe_module_load@load.html
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   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/shard-bmg-8/igt@xe_module_load@load.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6054
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7098
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7166
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7320
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7392
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
  [Intel XE#7402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7402
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
  [Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7433
  [Intel XE#7435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7435
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7438]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7438
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7440
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7446
  [Intel XE#7447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7447
  [Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7456]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7456
  [Intel XE#7463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7463
  [Intel XE#7464]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7464
  [Intel XE#7465]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7465
  [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
  [Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467
  [Intel XE#7468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7468
  [Intel XE#7473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7473
  [Intel XE#7503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7503
  [Intel XE#7509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7509
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603 -> xe-pw-153280v3

  IGT_8777: a50285a68dbef0fe11140adef4016a756f57b324 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4652-3594e3a9ce7d4ad237f43ff907e9744446108603: 3594e3a9ce7d4ad237f43ff907e9744446108603
  xe-pw-153280v3: 153280v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153280v3/index.html

[-- Attachment #2: Type: text/html, Size: 74088 bytes --]

Re: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers

[kernel test robot]

:::::: 
:::::: Manual check reason: "high confidence checkpatch report"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260303133409.11609-2-thomas.hellstrom@linux.intel.com>
References: <20260303133409.11609-2-thomas.hellstrom@linux.intel.com>
TO: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
TO: intel-xe@lists.freedesktop.org

Hi Thomas,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-xe/drm-xe-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Thomas-Hellstr-m/mm-mmu_notifier-Allow-two-pass-struct-mmu_interval_notifiers/20260303-213841
base:   https://gitlab.freedesktop.org/drm/xe/kernel.git drm-xe-next
patch link:    https://lore.kernel.org/r/20260303133409.11609-2-thomas.hellstrom%40linux.intel.com
patch subject: [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers
:::::: branch date: 23 minutes ago
:::::: commit date: 23 minutes ago
reproduce: (https://download.01.org/0day-ci/archive/20260303/202603031521.dDrjcXQG-lkp@intel.com/reproduce)

# many are suggestions rather than must-fix

ERROR:BAD_SIGN_OFF: Unrecognized email address: 'GitHub Copilot:claude-sonnet-4.6 # Documentation only.'
#53: 
Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation only.

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki