From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: "Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"Alexander Graf" <agraf@csgraf.de>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Mohamed Mediouni" <mohamed@unpredictable.fr>
Subject: [PATCH v20 11/15] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1
Date: Mon, 16 Mar 2026 14:06:38 +0100 [thread overview]
Message-ID: <20260316130642.13246-12-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20260316130642.13246-1-mohamed@unpredictable.fr>
HVF traps accesses to CNTHCTL_EL2. For nested guests, HVF traps accesses to MDCCINT_EL1.
Pass through those accesses to the Hypervisor.framework library.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/hvf/hvf.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index bf30285e74..dc9d3a24ce 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -296,6 +296,10 @@ void hvf_arm_init_debug(void)
#define SYSREG_DBGWVR15_EL1 SYSREG(2, 0, 0, 15, 6)
#define SYSREG_DBGWCR15_EL1 SYSREG(2, 0, 0, 15, 7)
+/* EL2 registers */
+#define SYSREG_CNTHCTL_EL2 SYSREG(3, 4, 14, 1, 0)
+#define SYSREG_MDCCINT_EL1 SYSREG(2, 0, 0, 2, 0)
+
#define WFX_IS_WFE (1 << 0)
#define TMR_CTL_ENABLE (1 << 0)
@@ -1719,6 +1723,14 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
case SYSREG_OSDLR_EL1:
/* Dummy register */
return 0;
+ case SYSREG_CNTHCTL_EL2:
+ if (__builtin_available(macOS 15.0, *)) {
+ assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
+ }
+ return 0;
+ case SYSREG_MDCCINT_EL1:
+ assert_hvf_ok(hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_MDCCINT_EL1, val));
+ return 0;
case SYSREG_ICC_AP0R0_EL1:
case SYSREG_ICC_AP0R1_EL1:
case SYSREG_ICC_AP0R2_EL1:
@@ -2007,6 +2019,14 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
case SYSREG_OSDLR_EL1:
/* Dummy register */
return 0;
+ case SYSREG_CNTHCTL_EL2:
+ if (__builtin_available(macOS 15.0, *)) {
+ assert_hvf_ok(hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTHCTL_EL2, val));
+ }
+ return 0;
+ case SYSREG_MDCCINT_EL1:
+ assert_hvf_ok(hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_MDCCINT_EL1, val));
+ return 0;
case SYSREG_LORC_EL1:
/* Dummy register */
return 0;
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2026-03-16 13:10 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 13:06 [PATCH v20 00/15] HVF: Add support for platform vGIC and nested virtualisation Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 01/15] hw/intc: Add hvf vGIC interrupt controller support Mohamed Mediouni
2026-04-24 6:38 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 02/15] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state Mohamed Mediouni
2026-04-24 6:56 ` Manos Pitsidianakis
2026-04-24 7:29 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 03/15] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC Mohamed Mediouni
2026-04-23 16:10 ` Philippe Mathieu-Daudé
2026-04-23 17:01 ` Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 04/15] target/arm: hvf: instantiate GIC early Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 05/15] hw/arm, target/arm: nested virtualisation on HVF Mohamed Mediouni
2026-04-24 7:07 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 06/15] hvf: only call hvf_sync_vtimer() when running without the platform vGIC Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 07/15] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC Mohamed Mediouni
2026-04-24 7:15 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 08/15] hvf: arm: allow exposing minimal PMU when running with nested virt on Mohamed Mediouni
2026-04-23 16:03 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 09/15] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 10/15] hvf: sync registers used at EL2 Mohamed Mediouni
2026-03-16 13:06 ` Mohamed Mediouni [this message]
2026-03-16 13:06 ` [PATCH v20 12/15] hvf: arm: disable SME when nested virt is active Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 13/15] hvf: arm: physical timer emulation Mohamed Mediouni
2026-04-23 16:07 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 14/15] hvf: enable nested virtualisation support Mohamed Mediouni
2026-04-24 7:11 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 15/15] hvf: arm: enable vGIC by default for virt-11.1 and later Mohamed Mediouni
2026-04-24 7:13 ` Manos Pitsidianakis
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