From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: "Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"Alexander Graf" <agraf@csgraf.de>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Mohamed Mediouni" <mohamed@unpredictable.fr>
Subject: [PATCH v20 07/15] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC
Date: Mon, 16 Mar 2026 14:06:34 +0100 [thread overview]
Message-ID: <20260316130642.13246-8-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20260316130642.13246-1-mohamed@unpredictable.fr>
From Apple documentation:
> When EL2 is disabled, PMU register accesses trigger "Trapped MSR, MRS, or
> System Instruction" exceptions. When this happens, hv_vcpu_run() returns, and the
> hv_vcpu_exit_t object contains the information about this exception.
> When EL2 is enabled, the handling of PMU register accesses is determined by the PMUVer
> field of ID_AA64DFR0_EL1 register.
> If the PMUVer field value is zero or is invalid, PMU register accesses generate "Undefined"
> exceptions, which are sent to the guest.
> If the PMUVer field value is non-zero and valid, PMU register accesses are emulated by the framework.
> The ID_AA64DFR0_EL1 register can be modified via hv_vcpu_set_sys_reg API.
However, despite what that documentation says this is actually gated on using the Apple vGIC
instead of nested virtualisation per se. Apple introduced both at the same time.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
target/arm/hvf/hvf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 04c4106a3e..c971aa8cce 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1601,7 +1601,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
ARMCPU *arm_cpu = ARM_CPU(cpu);
CPUARMState *env = &arm_cpu->env;
- if (arm_feature(env, ARM_FEATURE_PMU)) {
+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {
switch (reg) {
case SYSREG_PMCR_EL0:
*val = env->cp15.c9_pmcr;
@@ -1862,7 +1862,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
SYSREG_OP2(reg),
val);
- if (arm_feature(env, ARM_FEATURE_PMU)) {
+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {
switch (reg) {
case SYSREG_PMCCNTR_EL0:
pmu_op_start(env);
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2026-03-16 13:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 13:06 [PATCH v20 00/15] HVF: Add support for platform vGIC and nested virtualisation Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 01/15] hw/intc: Add hvf vGIC interrupt controller support Mohamed Mediouni
2026-04-24 6:38 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 02/15] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state Mohamed Mediouni
2026-04-24 6:56 ` Manos Pitsidianakis
2026-04-24 7:29 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 03/15] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC Mohamed Mediouni
2026-04-23 16:10 ` Philippe Mathieu-Daudé
2026-04-23 17:01 ` Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 04/15] target/arm: hvf: instantiate GIC early Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 05/15] hw/arm, target/arm: nested virtualisation on HVF Mohamed Mediouni
2026-04-24 7:07 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 06/15] hvf: only call hvf_sync_vtimer() when running without the platform vGIC Mohamed Mediouni
2026-03-16 13:06 ` Mohamed Mediouni [this message]
2026-04-24 7:15 ` [PATCH v20 07/15] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 08/15] hvf: arm: allow exposing minimal PMU when running with nested virt on Mohamed Mediouni
2026-04-23 16:03 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 09/15] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 10/15] hvf: sync registers used at EL2 Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 11/15] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1 Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 12/15] hvf: arm: disable SME when nested virt is active Mohamed Mediouni
2026-03-16 13:06 ` [PATCH v20 13/15] hvf: arm: physical timer emulation Mohamed Mediouni
2026-04-23 16:07 ` Philippe Mathieu-Daudé
2026-03-16 13:06 ` [PATCH v20 14/15] hvf: enable nested virtualisation support Mohamed Mediouni
2026-04-24 7:11 ` Manos Pitsidianakis
2026-03-16 13:06 ` [PATCH v20 15/15] hvf: arm: enable vGIC by default for virt-11.1 and later Mohamed Mediouni
2026-04-24 7:13 ` Manos Pitsidianakis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260316130642.13246-8-mohamed@unpredictable.fr \
--to=mohamed@unpredictable.fr \
--cc=agraf@csgraf.de \
--cc=eduardo@habkost.net \
--cc=marcel.apfelbaum@gmail.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=phil@philjordan.eu \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=rbolshakov@ddn.com \
--cc=wangyanan55@huawei.com \
--cc=zhao1.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.