From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: qemu-devel@nongnu.org
Cc: Wei Liu <liuwe@microsoft.com>,
Paolo Bonzini <pbonzini@redhat.com>, Wei Liu <wei.liu@kernel.org>,
Magnus Kulke <magnuskulke@linux.microsoft.com>,
Magnus Kulke <magnuskulke@microsoft.com>,
Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v3 6/9] target/i386: query mshv accel for supported cpuids
Date: Mon, 23 Mar 2026 12:57:08 +0100 [thread overview]
Message-ID: <20260323115711.353793-7-magnuskulke@linux.microsoft.com> (raw)
In-Reply-To: <20260323115711.353793-1-magnuskulke@linux.microsoft.com>
We implement mshv_get_supported_cpuid() and invoke it in
x86_cpu_get_supported_feature_word() retrieve the cpu features that the
host is supporting. Initially we mask the virtualization capabilitities
potentially we might need to mask more in the future.
Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
---
include/system/mshv.h | 3 +++
target/i386/cpu.c | 8 ++++++++
target/i386/mshv/mshv-cpu.c | 27 +++++++++++++++++++++++++++
3 files changed, 38 insertions(+)
diff --git a/include/system/mshv.h b/include/system/mshv.h
index 75286baf16..51b0420735 100644
--- a/include/system/mshv.h
+++ b/include/system/mshv.h
@@ -60,4 +60,7 @@ int mshv_irqchip_add_irqfd_notifier_gsi(const EventNotifier *n,
const EventNotifier *rn, int virq);
int mshv_irqchip_remove_irqfd_notifier_gsi(const EventNotifier *n, int virq);
+/* cpuid */
+uint32_t mshv_get_supported_cpuid(uint32_t func, uint32_t idx, int reg);
+
#endif
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b5e483e8cd..21e42fb4f6 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -26,6 +26,7 @@
#include "tcg/helper-tcg.h"
#include "exec/translation-block.h"
#include "system/hvf.h"
+#include "system/mshv.h"
#include "hvf/hvf-i386.h"
#include "kvm/kvm_i386.h"
#include "kvm/tdx.h"
@@ -8087,6 +8088,13 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w)
r = hvf_get_supported_cpuid(wi->cpuid.eax,
wi->cpuid.ecx,
wi->cpuid.reg);
+ } else if (mshv_enabled()) {
+ if (wi->type != CPUID_FEATURE_WORD) {
+ return 0;
+ }
+ r = mshv_get_supported_cpuid(wi->cpuid.eax,
+ wi->cpuid.ecx,
+ wi->cpuid.reg);
} else if (tcg_enabled()) {
r = wi->tcg_features;
} else {
diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
index 09878ef357..3b392533b4 100644
--- a/target/i386/mshv/mshv-cpu.c
+++ b/target/i386/mshv/mshv-cpu.c
@@ -1639,6 +1639,33 @@ void mshv_arch_destroy_vcpu(CPUState *cpu)
g_clear_pointer(&env->emu_mmio_buf, g_free);
}
+uint32_t mshv_get_supported_cpuid(uint32_t func, uint32_t idx, int reg)
+{
+ uint32_t eax, ebx, ecx, edx;
+ uint32_t ret = 0;
+
+ host_cpuid(func, idx, &eax, &ebx, &ecx, &edx);
+ switch (reg) {
+ case R_EAX:
+ ret = eax; break;
+ case R_EBX:
+ ret = ebx; break;
+ case R_ECX:
+ ret = ecx; break;
+ case R_EDX:
+ ret = edx; break;
+ }
+
+ /* Disable nested virtualization features not yet supported by MSHV */
+ if (func == 0x80000001 && reg == R_ECX) {
+ ret &= ~CPUID_EXT3_SVM;
+ }
+ if (func == 0x01 && reg == R_ECX) {
+ ret &= ~CPUID_EXT_VMX;
+ }
+ return ret;
+}
+
/*
* Default Microsoft Hypervisor behavior for unimplemented MSR is to send a
* fault to the guest if it tries to access it. It is possible to override
--
2.34.1
next prev parent reply other threads:[~2026-03-23 11:58 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 11:57 [PATCH v3 0/9] Support QEMU cpu models in MSHV accelerator Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-03-27 4:16 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 2/9] target/i386/mshv: fix cpuid propagation bug Magnus Kulke
2026-03-27 4:15 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 3/9] target/i386/mshv: fix various cpuid traversal bugs Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 4/9] target/i386/mshv: change cpuid mask to UINT32_MAX Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 5/9] target/i386/mshv: set cpu model name on -cpu host Magnus Kulke
2026-03-23 11:57 ` Magnus Kulke [this message]
2026-03-23 11:57 ` [PATCH v3 7/9] target/i386/mshv: populate xsave area offsets Magnus Kulke
2026-03-27 4:37 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 8/9] target/i386/mshv: filter out CET bits in cpuid Magnus Kulke
2026-03-27 4:41 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 9/9] accel/mshv: disable la57 (5lvl paging) Magnus Kulke
2026-03-27 4:23 ` Anirudh Rayabharam
2026-03-27 16:08 ` Paolo Bonzini
2026-03-27 16:40 ` Magnus Kulke
2026-03-27 16:54 ` Magnus Kulke
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