From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: qemu-devel@nongnu.org
Cc: Wei Liu <liuwe@microsoft.com>,
Paolo Bonzini <pbonzini@redhat.com>, Wei Liu <wei.liu@kernel.org>,
Magnus Kulke <magnuskulke@linux.microsoft.com>,
Magnus Kulke <magnuskulke@microsoft.com>,
Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v3 7/9] target/i386/mshv: populate xsave area offsets
Date: Mon, 23 Mar 2026 12:57:09 +0100 [thread overview]
Message-ID: <20260323115711.353793-8-magnuskulke@linux.microsoft.com> (raw)
In-Reply-To: <20260323115711.353793-1-magnuskulke@linux.microsoft.com>
This function is copied verbatim from kvm_cpu_xsave_init(), for MSHV we
need to populate the offsets similarly.
Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
---
target/i386/mshv/mshv-cpu.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
index 3b392533b4..ee25eb5f6f 100644
--- a/target/i386/mshv/mshv-cpu.c
+++ b/target/i386/mshv/mshv-cpu.c
@@ -1706,11 +1706,42 @@ int mshv_arch_post_init_vm(int vm_fd)
return ret;
}
+static void mshv_cpu_xsave_init(void)
+{
+ static bool first = true;
+ uint32_t eax, ebx, ecx, edx;
+ int i;
+
+ if (!first) {
+ return;
+ }
+ first = false;
+
+ /* x87 and SSE states are in the legacy region of the XSAVE area. */
+ x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;
+ x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;
+
+ for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {
+ ExtSaveArea *esa = &x86_ext_save_areas[i];
+
+ if (!esa->size) {
+ continue;
+ }
+ host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx);
+ if (eax != 0) {
+ assert(esa->size == eax);
+ esa->offset = ebx;
+ esa->ecx = ecx;
+ }
+ }
+}
+
static void mshv_cpu_instance_init(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
host_cpu_instance_init(cpu);
+ mshv_cpu_xsave_init();
}
static void mshv_cpu_accel_class_init(ObjectClass *oc, const void *data)
--
2.34.1
next prev parent reply other threads:[~2026-03-23 11:58 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 11:57 [PATCH v3 0/9] Support QEMU cpu models in MSHV accelerator Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 1/9] accel/mshv: use mshv_create_partition_v2 payload Magnus Kulke
2026-03-27 4:16 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 2/9] target/i386/mshv: fix cpuid propagation bug Magnus Kulke
2026-03-27 4:15 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 3/9] target/i386/mshv: fix various cpuid traversal bugs Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 4/9] target/i386/mshv: change cpuid mask to UINT32_MAX Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 5/9] target/i386/mshv: set cpu model name on -cpu host Magnus Kulke
2026-03-23 11:57 ` [PATCH v3 6/9] target/i386: query mshv accel for supported cpuids Magnus Kulke
2026-03-23 11:57 ` Magnus Kulke [this message]
2026-03-27 4:37 ` [PATCH v3 7/9] target/i386/mshv: populate xsave area offsets Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 8/9] target/i386/mshv: filter out CET bits in cpuid Magnus Kulke
2026-03-27 4:41 ` Anirudh Rayabharam
2026-03-23 11:57 ` [PATCH v3 9/9] accel/mshv: disable la57 (5lvl paging) Magnus Kulke
2026-03-27 4:23 ` Anirudh Rayabharam
2026-03-27 16:08 ` Paolo Bonzini
2026-03-27 16:40 ` Magnus Kulke
2026-03-27 16:54 ` Magnus Kulke
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