[PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[Gray Huang]

The Khadas Edge 2L board uses the Ampak AP6275P (BCM43752) PCIe
Wi-Fi 6 module.

Enable the pcie0 controller and add the Wi-Fi module as its child
node. Additionally, enable the HYM8563 RTC to provide the 32.768kHz
LPO clock required by the Wi-Fi module, along with the necessary
CombPHY and fixed regulator.

Signed-off-by: Gray Huang <gray.huang@wesion.com>
---
 .../dts/rockchip/rk3576-khadas-edge-2l.dts    | 71 ++++++++++++++++++-
 1 file changed, 70 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
index 5781deae00d9..09cb0f0d6dcf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
@@ -47,7 +47,19 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
 		vin-supply = <&vcc_sys>;
 	};
 
-
+	vcc_wifi_reg_on: regulator-wifi-reg-on {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_reg_on>;
+		pinctrl-names = "default";
+		regulator-name = "wifi_reg_on";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_1v8_s3>;
+	};
 };
 
 &cpu_l0 {
@@ -431,6 +443,63 @@ regulator-state-mem {
 	};
 };
 
+&combphy0_ps {
+	status = "okay";
+};
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_rst>;
+	reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc_3v3_s3>;
+	status = "okay";
+
+	pcie@0,0 {
+		reg = <0x0 0 0 0 0>;
+		bus-range = <0x0 0xf>;
+		device_type = "pci";
+		ranges;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		wifi: wifi@0,0 {
+			compatible = "pci14e4,449d";
+			reg = <0x10000 0 0 0 0>;
+			clocks = <&hym8563>;
+			clock-names = "lpo";
+		};
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-output-names = "hym8563";
+		wakeup-source;
+	};
+};
+
+&pinctrl {
+	pcie0 {
+		pcie0_rst: pcie0-rst {
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wifi {
+		wifi_reg_on: wifi-reg-on {
+			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		wifi_wake_host: wifi-wake-host {
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+};
 
 &sdhci {
 	bus-width = <8>;
-- 
2.34.1

[PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[Gray Huang]

The Khadas Edge 2L board uses the Ampak AP6275P (BCM43752) PCIe
Wi-Fi 6 module.

Enable the pcie0 controller and add the Wi-Fi module as its child
node. Additionally, enable the HYM8563 RTC to provide the 32.768kHz
LPO clock required by the Wi-Fi module, along with the necessary
CombPHY and fixed regulator.

Signed-off-by: Gray Huang <gray.huang@wesion.com>
---
 .../dts/rockchip/rk3576-khadas-edge-2l.dts    | 71 ++++++++++++++++++-
 1 file changed, 70 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
index 5781deae00d9..09cb0f0d6dcf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
@@ -47,7 +47,19 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
 		vin-supply = <&vcc_sys>;
 	};
 
-
+	vcc_wifi_reg_on: regulator-wifi-reg-on {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_reg_on>;
+		pinctrl-names = "default";
+		regulator-name = "wifi_reg_on";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_1v8_s3>;
+	};
 };
 
 &cpu_l0 {
@@ -431,6 +443,63 @@ regulator-state-mem {
 	};
 };
 
+&combphy0_ps {
+	status = "okay";
+};
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_rst>;
+	reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc_3v3_s3>;
+	status = "okay";
+
+	pcie@0,0 {
+		reg = <0x0 0 0 0 0>;
+		bus-range = <0x0 0xf>;
+		device_type = "pci";
+		ranges;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		wifi: wifi@0,0 {
+			compatible = "pci14e4,449d";
+			reg = <0x10000 0 0 0 0>;
+			clocks = <&hym8563>;
+			clock-names = "lpo";
+		};
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-output-names = "hym8563";
+		wakeup-source;
+	};
+};
+
+&pinctrl {
+	pcie0 {
+		pcie0_rst: pcie0-rst {
+			rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wifi {
+		wifi_reg_on: wifi-reg-on {
+			rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		wifi_wake_host: wifi-wake-host {
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+};
 
 &sdhci {
 	bus-width = <8>;
-- 
2.34.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

Re: [PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[kernel test robot]

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260325054614.1497147-3-gray.huang@wesion.com>
References: <20260325054614.1497147-3-gray.huang@wesion.com>
TO: Gray Huang <gray.huang@wesion.com>
TO: robh@kernel.org
TO: krzk+dt@kernel.org
TO: conor+dt@kernel.org
TO: heiko@sntech.de
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-rockchip@lists.infradead.org
CC: linux-kernel@vger.kernel.org
CC: nick@khadas.com
CC: Gray Huang <gray.huang@wesion.com>

Hi Gray,

kernel test robot noticed the following build warnings:

[auto build test WARNING on rockchip/for-next]
[also build test WARNING on next-20260327]
[cannot apply to linus/master v7.0-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Gray-Huang/arm64-dts-rockchip-Add-PMIC-support-for-Khadas-Edge-2L/20260328-091622
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
patch link:    https://lore.kernel.org/r/20260325054614.1497147-3-gray.huang%40wesion.com
patch subject: [PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L
:::::: branch date: 20 hours ago
:::::: commit date: 20 hours ago
config: arm64-randconfig-2051-20260328 (https://download.01.org/0day-ci/archive/20260328/202603282237.SC4XPIst-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.5.0
dtschema: 2025.13.dev8+g0515abdd9
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260328/202603282237.SC4XPIst-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202603282237.SC4XPIst-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   	'rockchip,rk3228-spdif' was expected
   	'rockchip,rk3328-spdif' was expected
   	'rockchip,rk3366-spdif' was expected
   	'rockchip,rk3368-spdif' was expected
   	'rockchip,rk3399-spdif' was expected
   	'rockchip,rk3568-spdif' was expected
   	'rockchip,rk3576-spdif' is not one of ['rockchip,rk3128-spdif', 'rockchip,rk3188-spdif', 'rockchip,rk3288-spdif', 'rockchip,rk3308-spdif']
   	'rockchip,rk3576-spdif' is not one of ['rockchip,rk3588-spdif']
   	from schema $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml
   arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dtb: /soc/spdif-tx@2a680000: failed to match any schema with compatible: ['rockchip,rk3576-spdif', 'rockchip,rk3568-spdif']
>> arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dtb: hym8563@51 (haoyu,hym8563): $nodename:0: 'hym8563@51' does not match '^rtc(@.*|-([0-9]|[1-9][0-9]+))?$'
   	from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[Heiko Stuebner]

Am Mittwoch, 25. März 2026, 06:46:10 Mitteleuropäische Sommerzeit schrieb Gray Huang:
> The Khadas Edge 2L board uses the Ampak AP6275P (BCM43752) PCIe
> Wi-Fi 6 module.
> 
> Enable the pcie0 controller and add the Wi-Fi module as its child
> node. Additionally, enable the HYM8563 RTC to provide the 32.768kHz
> LPO clock required by the Wi-Fi module, along with the necessary
> CombPHY and fixed regulator.
> 
> Signed-off-by: Gray Huang <gray.huang@wesion.com>

Please make this 2 patches:
- add the rtc
- add the wifi using the rtc

> ---
>  .../dts/rockchip/rk3576-khadas-edge-2l.dts    | 71 ++++++++++++++++++-
>  1 file changed, 70 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> index 5781deae00d9..09cb0f0d6dcf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> @@ -47,7 +47,19 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
>  		vin-supply = <&vcc_sys>;
>  	};
>  
> -
> +	vcc_wifi_reg_on: regulator-wifi-reg-on {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> +		pinctrl-0 = <&wifi_reg_on>;
> +		pinctrl-names = "default";
> +		regulator-name = "wifi_reg_on";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_1v8_s3>;
> +	};
>  };
>  
>  &cpu_l0 {
> @@ -431,6 +443,63 @@ regulator-state-mem {
>  	};
>  };
>  
> +&combphy0_ps {
> +	status = "okay";
> +};

also please sort also phandles alphabetically, i.e. pcie2 between
c-something and i2c is the wrong place :-)


Heiko

> +
> +&pcie0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie0_rst>;

Re: [PATCH 2/6] arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L

[Heiko Stuebner]

Am Mittwoch, 25. März 2026, 06:46:10 Mitteleuropäische Sommerzeit schrieb Gray Huang:
> The Khadas Edge 2L board uses the Ampak AP6275P (BCM43752) PCIe
> Wi-Fi 6 module.
> 
> Enable the pcie0 controller and add the Wi-Fi module as its child
> node. Additionally, enable the HYM8563 RTC to provide the 32.768kHz
> LPO clock required by the Wi-Fi module, along with the necessary
> CombPHY and fixed regulator.
> 
> Signed-off-by: Gray Huang <gray.huang@wesion.com>

Please make this 2 patches:
- add the rtc
- add the wifi using the rtc

> ---
>  .../dts/rockchip/rk3576-khadas-edge-2l.dts    | 71 ++++++++++++++++++-
>  1 file changed, 70 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> index 5781deae00d9..09cb0f0d6dcf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts
> @@ -47,7 +47,19 @@ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
>  		vin-supply = <&vcc_sys>;
>  	};
>  
> -
> +	vcc_wifi_reg_on: regulator-wifi-reg-on {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> +		pinctrl-0 = <&wifi_reg_on>;
> +		pinctrl-names = "default";
> +		regulator-name = "wifi_reg_on";
> +		regulator-always-on;
> +		regulator-boot-on;
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		vin-supply = <&vcc_1v8_s3>;
> +	};
>  };
>  
>  &cpu_l0 {
> @@ -431,6 +443,63 @@ regulator-state-mem {
>  	};
>  };
>  
> +&combphy0_ps {
> +	status = "okay";
> +};

also please sort also phandles alphabetically, i.e. pcie2 between
c-something and i2c is the wrong place :-)


Heiko

> +
> +&pcie0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie0_rst>;




_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip