From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: Mohamed Mediouni <mohamed@unpredictable.fr>,
Zhao Liu <zhao1.liu@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Pedro Barbuda <pbarbuda@microsoft.com>
Subject: [PATCH v2 07/10] whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip
Date: Wed, 15 Apr 2026 15:29:23 +0200 [thread overview]
Message-ID: <20260415132926.58878-8-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20260415132926.58878-1-mohamed@unpredictable.fr>
Add support for an oddball HV_X64_MSR_GUEST_IDLE not-quite-an-HLT
that wakes the vCPU even if EFLAGS.IF is set.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
target/i386/whpx/whpx-all.c | 46 ++++++++++++++++++++++++++++++++++---
1 file changed, 43 insertions(+), 3 deletions(-)
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index 2e6679f40b..0b89fe093f 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -52,6 +52,7 @@
/* for kernel-irqchip=off */
#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
+#define HV_X64_MSR_GUEST_IDLE 0x400000f0
static bool is_modern_os = true;
@@ -1543,13 +1544,16 @@ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid)
}
}
-static int whpx_handle_halt(CPUState *cpu)
+static int whpx_handle_halt_generic(CPUState *cpu)
{
+ X86CPU *x86_cpu = X86_CPU(cpu);
+ CPUX86State *env = &x86_cpu->env;
+
int ret = 0;
bql_lock();
if (!(cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&
- (cpu_env(cpu)->eflags & IF_MASK)) &&
+ ((cpu_env(cpu)->eflags & IF_MASK) || env->hflags2 & HF2_HYPERV_HLT_MASK)) &&
!cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {
cpu->exception_index = EXCP_HLT;
cpu->halted = true;
@@ -1560,6 +1564,27 @@ static int whpx_handle_halt(CPUState *cpu)
return ret;
}
+static int whpx_handle_halt(CPUState *cpu)
+{
+ int ret = 0;
+
+ ret = whpx_handle_halt_generic(cpu);
+
+ return ret;
+}
+
+static int whpx_handle_hyperv_guestidle(CPUState *cpu)
+{
+ X86CPU *x86_cpu = X86_CPU(cpu);
+ CPUX86State *env = &x86_cpu->env;
+ int ret = 0;
+
+ env->hflags2 |= HF2_HYPERV_HLT_MASK;
+ ret = whpx_handle_halt_generic(cpu);
+
+ return ret;
+}
+
static void whpx_vcpu_kick_out_of_hlt(CPUState *cpu)
{
WHV_REGISTER_VALUE reg;
@@ -1763,9 +1788,10 @@ static void whpx_vcpu_process_async_events(CPUState *cpu)
}
if ((cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&
- (env->eflags & IF_MASK)) ||
+ ((env->eflags & IF_MASK) || env->hflags2 & HF2_HYPERV_HLT_MASK)) ||
cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {
cpu->halted = false;
+ env->hflags2 &= ~HF2_HYPERV_HLT_MASK;
}
if (cpu_test_interrupt(cpu, CPU_INTERRUPT_SIPI)) {
@@ -2035,6 +2061,20 @@ int whpx_vcpu_run(CPUState *cpu)
}
}
+ /*
+ * Windows and Linux both use this MSR.
+ * Windows 11 25H2 uses it even when not advertised.
+ */
+ if (vcpu->exit_ctx.MsrAccess.MsrNumber == HV_X64_MSR_GUEST_IDLE
+ && !vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite
+ && !whpx_irqchip_in_kernel()
+ && whpx->hyperv_enlightenments_enabled) {
+ is_known_msr = 1;
+ whpx_bump_rip(cpu, &vcpu->exit_ctx);
+ ret = whpx_handle_hyperv_guestidle(cpu);
+ break;
+ }
+
/*
* Linux tries to use it anyway even when not exposed.
* Ignore the write as the VP assist page is not used.
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2026-04-15 13:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 13:29 [PATCH v2 00/10] whpx: i386: Some more changes Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 01/10] whpx: i386: set apicbase value only on success Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 02/10] whpx: i386: unknown MSR configurability Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 03/10] whpx: i386: enable GuestIdleReg enlightenment Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 04/10] whpx: i386: tighten APIC base validity check Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 05/10] whpx: i386: ignore vpassist when kernel-irqchip=off Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 06/10] target: i386: HLT type that ignores EFLAGS.IF Mohamed Mediouni
2026-04-15 13:29 ` Mohamed Mediouni [this message]
2026-04-15 13:29 ` [PATCH v2 08/10] whpx: i386: one more CPUID Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 09/10] whpx: i386: some x2APIC awareness Mohamed Mediouni
2026-04-15 13:29 ` [PATCH v2 10/10] whpx: i386: set WHvX64RegisterInitialApicId Mohamed Mediouni
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