* [PATCH] accel/ivpu: Fix swapped register names in pwr_island_drive functions
@ 2026-04-21 9:39 Karol Wachowski
2026-04-23 7:55 ` Andrzej Kacprowski
0 siblings, 1 reply; 3+ messages in thread
From: Karol Wachowski @ 2026-04-21 9:39 UTC (permalink / raw)
To: dri-devel
Cc: oded.gabbay, jeff.hugo, maciej.falkowski, lizhi.hou,
andrzej.kacprowski, Karol Wachowski
pwr_island_drive_37xx and pwr_island_drive_40xx functions had incorrectly
swapped registers definitions. Bug is purely cosmetic as those registers
have exactly same offsets and layout in both 37XX and 40XX.
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
---
drivers/accel/ivpu/ivpu_hw_ip.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/ivpu_hw_ip.c
index 37f95a0551ed..81f0b1f8f5a6 100644
--- a/drivers/accel/ivpu/ivpu_hw_ip.c
+++ b/drivers/accel/ivpu/ivpu_hw_ip.c
@@ -308,26 +308,26 @@ static void pwr_island_trickle_drive_40xx(struct ivpu_device *vdev, bool enable)
static void pwr_island_drive_37xx(struct ivpu_device *vdev, bool enable)
{
- u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
+ u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
if (enable)
- val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
+ val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
else
- val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
+ val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
- REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
+ REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
}
static void pwr_island_drive_40xx(struct ivpu_device *vdev, bool enable)
{
- u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
+ u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
if (enable)
- val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
+ val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
else
- val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
+ val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
- REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
+ REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
}
static void pwr_island_enable(struct ivpu_device *vdev)
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] accel/ivpu: Fix swapped register names in pwr_island_drive functions
2026-04-21 9:39 [PATCH] accel/ivpu: Fix swapped register names in pwr_island_drive functions Karol Wachowski
@ 2026-04-23 7:55 ` Andrzej Kacprowski
2026-04-23 8:05 ` Karol Wachowski
0 siblings, 1 reply; 3+ messages in thread
From: Andrzej Kacprowski @ 2026-04-23 7:55 UTC (permalink / raw)
To: Karol Wachowski, dri-devel
Cc: oded.gabbay, jeff.hugo, maciej.falkowski, lizhi.hou
On 21-Apr-26 11:39 AM, Karol Wachowski wrote:
> pwr_island_drive_37xx and pwr_island_drive_40xx functions had incorrectly
> swapped registers definitions. Bug is purely cosmetic as those registers
> have exactly same offsets and layout in both 37XX and 40XX.
>
> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
> ---
> drivers/accel/ivpu/ivpu_hw_ip.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/ivpu_hw_ip.c
> index 37f95a0551ed..81f0b1f8f5a6 100644
> --- a/drivers/accel/ivpu/ivpu_hw_ip.c
> +++ b/drivers/accel/ivpu/ivpu_hw_ip.c
> @@ -308,26 +308,26 @@ static void pwr_island_trickle_drive_40xx(struct ivpu_device *vdev, bool enable)
>
> static void pwr_island_drive_37xx(struct ivpu_device *vdev, bool enable)
> {
> - u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
> + u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
>
> if (enable)
> - val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
> + val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
> else
> - val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
> + val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
>
> - REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
> + REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
> }
>
> static void pwr_island_drive_40xx(struct ivpu_device *vdev, bool enable)
> {
> - u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
> + u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
>
> if (enable)
> - val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
> + val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
> else
> - val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);
> + val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, CSS_CPU, val);
>
> - REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
> + REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
> }
>
> static void pwr_island_enable(struct ivpu_device *vdev)
Reviewed-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] accel/ivpu: Fix swapped register names in pwr_island_drive functions
2026-04-23 7:55 ` Andrzej Kacprowski
@ 2026-04-23 8:05 ` Karol Wachowski
0 siblings, 0 replies; 3+ messages in thread
From: Karol Wachowski @ 2026-04-23 8:05 UTC (permalink / raw)
To: Andrzej Kacprowski, dri-devel
Cc: oded.gabbay, jeff.hugo, maciej.falkowski, lizhi.hou
On 4/23/2026 9:55 AM, Andrzej Kacprowski wrote:
> On 21-Apr-26 11:39 AM, Karol Wachowski wrote:
>> pwr_island_drive_37xx and pwr_island_drive_40xx functions had incorrectly
>> swapped registers definitions. Bug is purely cosmetic as those registers
>> have exactly same offsets and layout in both 37XX and 40XX.
>>
>> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
>> ---
>> drivers/accel/ivpu/ivpu_hw_ip.c | 16 ++++++++--------
>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/
>> ivpu_hw_ip.c
>> index 37f95a0551ed..81f0b1f8f5a6 100644
>> --- a/drivers/accel/ivpu/ivpu_hw_ip.c
>> +++ b/drivers/accel/ivpu/ivpu_hw_ip.c
>> @@ -308,26 +308,26 @@ static void pwr_island_trickle_drive_40xx(struct
>> ivpu_device *vdev, bool enable)
>> static void pwr_island_drive_37xx(struct ivpu_device *vdev, bool
>> enable)
>> {
>> - u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
>> + u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
>> if (enable)
>> - val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> CSS_CPU, val);
>> + val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> MSS_CPU, val);
>> else
>> - val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> CSS_CPU, val);
>> + val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> MSS_CPU, val);
>> - REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
>> + REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
>> }
>> static void pwr_island_drive_40xx(struct ivpu_device *vdev, bool
>> enable)
>> {
>> - u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);
>> + u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);
>> if (enable)
>> - val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> MSS_CPU, val);
>> + val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> CSS_CPU, val);
>> else
>> - val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> MSS_CPU, val);
>> + val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0,
>> CSS_CPU, val);
>> - REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
>> + REGV_WR32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0, val);
>> }
>> static void pwr_island_enable(struct ivpu_device *vdev)
>
> Reviewed-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
Thank you, applied to drm-misc-next.
Karol
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-04-21 9:39 [PATCH] accel/ivpu: Fix swapped register names in pwr_island_drive functions Karol Wachowski
2026-04-23 7:55 ` Andrzej Kacprowski
2026-04-23 8:05 ` Karol Wachowski
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