From: Nicholas Piggin <npiggin@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>,
Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
"Chao Liu" <chao.liu.zevorn@gmail.com>,
"Michael Ellerman" <mpe@kernel.org>,
"Joel Stanley" <jms@oss.tenstorrent.com>,
"Anirudh Srinivasan" <asrinivasan@oss.tenstorrent.com>,
"Portia Stephens" <portias@oss.tenstorrent.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Joel Stanley" <joel@jms.id.au>
Subject: [PATCH v5 9/9] tests/functional/riscv64: Add tt-atlantis tests
Date: Thu, 7 May 2026 14:38:37 +1000 [thread overview]
Message-ID: <20260507043838.45652-10-npiggin@gmail.com> (raw)
In-Reply-To: <20260507043838.45652-1-npiggin@gmail.com>
Add OpenSBI and Linux boot tests for the tt-atlantis machine.
Based on tests/functional/riscv64/test_sifive_u.py.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
MAINTAINERS | 1 +
tests/functional/riscv64/meson.build | 1 +
tests/functional/riscv64/test_opensbi.py | 4 ++
tests/functional/riscv64/test_tt_atlantis.py | 57 ++++++++++++++++++++
4 files changed, 63 insertions(+)
create mode 100755 tests/functional/riscv64/test_tt_atlantis.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 1ab5f3e45b..e106cadb81 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1776,6 +1776,7 @@ S: Supported
F: docs/system/riscv/tt_*.rst
F: hw/riscv/tt_*.c
F: include/hw/riscv/tt_*.h
+F: tests/functional/riscv64/test_tt_*.py
AMD Microblaze-V Generic Board
M: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
diff --git a/tests/functional/riscv64/meson.build b/tests/functional/riscv64/meson.build
index b996c89d7d..c4456fabd7 100644
--- a/tests/functional/riscv64/meson.build
+++ b/tests/functional/riscv64/meson.build
@@ -13,5 +13,6 @@ tests_riscv64_system_quick = [
tests_riscv64_system_thorough = [
'boston',
'sifive_u',
+ 'tt_atlantis',
'tuxrun',
]
diff --git a/tests/functional/riscv64/test_opensbi.py b/tests/functional/riscv64/test_opensbi.py
index d077e40f42..0f8beb7e7a 100755
--- a/tests/functional/riscv64/test_opensbi.py
+++ b/tests/functional/riscv64/test_opensbi.py
@@ -28,6 +28,10 @@ def test_riscv_sifive_u(self):
self.set_machine('sifive_u')
self.boot_opensbi()
+ def test_riscv_tt_atlantis(self):
+ self.set_machine('tt-atlantis')
+ self.boot_opensbi()
+
def test_riscv_virt(self):
self.set_machine('virt')
self.boot_opensbi()
diff --git a/tests/functional/riscv64/test_tt_atlantis.py b/tests/functional/riscv64/test_tt_atlantis.py
new file mode 100755
index 0000000000..48abd5cd27
--- /dev/null
+++ b/tests/functional/riscv64/test_tt_atlantis.py
@@ -0,0 +1,57 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots a Linux kernel on a Tenstorrent Atlantis machine
+# and checks the console
+#
+# Copyright (c) Linaro Ltd.
+# Copyright 2026 Tenstorrent
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import Asset, LinuxKernelTest
+
+
+class TTAtlantis(LinuxKernelTest):
+
+ ASSET_KERNEL = Asset(
+ 'https://storage.tuxboot.com/kernels/6.11.9/riscv64/Image',
+ '174f8bb87f08961e54fa3fcd954a8e31f4645f6d6af4dd43983d5e9841490fb0')
+ ASSET_ROOTFS = Asset(
+ ('https://github.com/groeck/linux-build-test/raw/'
+ '9819da19e6eef291686fdd7b029ea00e764dc62f/rootfs/riscv64/'
+ 'rootfs.ext2.gz'),
+ 'b6ed95610310b7956f9bf20c4c9c0c05fea647900df441da9dfe767d24e8b28b')
+
+ def do_test_riscv64_tt_atlantis(self, connect_disk):
+ self.set_machine('tt-atlantis')
+ kernel_path = self.ASSET_KERNEL.fetch()
+ rootfs_path = self.uncompress(self.ASSET_ROOTFS)
+
+ self.vm.set_console()
+ kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE + 'earlycon=sbi '
+
+ if connect_disk:
+ kernel_command_line += 'root=/dev/vda panic=-1 noreboot rootwait '
+ self.vm.add_args('-device',
+ 'virtio-blk,drive=drive0,serial=0x1234,bus=pcie.0')
+ self.vm.add_args('-drive',
+ f'file={rootfs_path},if=none,id=drive0,format=raw')
+ pattern = 'Boot successful.'
+ else:
+ kernel_command_line += 'panic=0 noreboot '
+ pattern = 'Cannot open root device'
+
+ self.vm.add_args('-kernel', kernel_path,
+ '-append', kernel_command_line,
+ '-no-reboot')
+
+ self.vm.launch()
+ self.wait_for_console_pattern(pattern)
+
+ def test_riscv64_tt_atlantis(self):
+ # tt-atlantis machine has no PCI host yet, so no disk
+ self.do_test_riscv64_tt_atlantis(False)
+
+
+if __name__ == '__main__':
+ LinuxKernelTest.main()
--
2.53.0
prev parent reply other threads:[~2026-05-07 4:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 4:38 [PATCH v5 0/9] hw/riscv: Add the Tenstorrent Atlantis machine Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 1/9] hw/riscv/boot: Describe discontiguous memory in boot_info Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 2/9] hw/riscv/boot: Account for discontiguous memory when loading firmware Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 3/9] hw/riscv/virt: Move AIA initialisation to helper file Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 4/9] hw/riscv/aia: Provide number of irq sources Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 5/9] target/riscv: tt-ascalon: Enable Zkr extension Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 6/9] target/riscv: tt-ascalon: Enable Svadu by removing Svade Nicholas Piggin
2026-05-07 18:57 ` Andrew Jones
2026-05-08 3:54 ` Nicholas Piggin
2026-05-08 13:56 ` Andrew Jones
2026-05-07 4:38 ` [PATCH v5 7/9] hw/riscv: Add Tenstorrent Atlantis machine Nicholas Piggin
2026-05-07 4:38 ` [PATCH v5 8/9] hw/riscv/atlantis: Provide a simple halting payload Nicholas Piggin
2026-05-07 6:09 ` Philippe Mathieu-Daudé
2026-05-07 4:38 ` Nicholas Piggin [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260507043838.45652-10-npiggin@gmail.com \
--to=npiggin@gmail.com \
--cc=alistair.francis@wdc.com \
--cc=asrinivasan@oss.tenstorrent.com \
--cc=chao.liu.zevorn@gmail.com \
--cc=daniel.barboza@oss.qualcomm.com \
--cc=jms@oss.tenstorrent.com \
--cc=joel@jms.id.au \
--cc=mpe@kernel.org \
--cc=philmd@linaro.org \
--cc=portias@oss.tenstorrent.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.