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From: Jay Chang <jay.chang@sifive.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	Chao Liu <chao.liu.zevorn@gmail.com>,
	Jay Chang <jay.chang@sifive.com>
Subject: [PATCH v4 2/2] target/riscv: Use macros for PMP address alignment
Date: Mon, 18 May 2026 15:07:25 +0800	[thread overview]
Message-ID: <20260518070725.9816-3-jay.chang@sifive.com> (raw)
In-Reply-To: <20260518070725.9816-1-jay.chang@sifive.com>

Replace manual bit manipulation with alignment macros for better
readability:

- TOR: Use ROUND_DOWN() to clear lower bits
- NAPOT: Use ROUND_UP() to set lower bits

The behavior remains unchanged.

Signed-off-by: Jay Chang <jay.chang@sifive.com>
---
 target/riscv/pmp.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index de2157c830..238c7c5162 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -247,8 +247,9 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index)
     case PMP_AMATCH_TOR:
         /* Bits pmpaddr[G-1:0] do not affect the TOR address-matching logic. */
         if (g >= 1) {
-            prev_addr &= ~((1ULL << g) - 1ULL);
-            this_addr &= ~((1ULL << g) - 1ULL);
+            target_ulong granule = 1ULL << g;
+            prev_addr = ROUND_DOWN(prev_addr, granule);
+            this_addr = ROUND_DOWN(this_addr, granule);
         }
         if (prev_addr >= this_addr) {
             sa = ea = 0u;
@@ -266,7 +267,8 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index)
     case PMP_AMATCH_NAPOT:
         /* Bits [g-2:0] need to be all one to align pmp granularity */
         if (g >= 2) {
-            this_addr |= ((1ULL << (g - 1ULL)) - 1ULL);
+            target_ulong granule = 1ULL << (g - 1);
+            this_addr = ROUND_UP(this_addr + 1ULL, granule) - 1ULL;
         }
 
         pmp_decode_napot(this_addr, &sa, &ea);
@@ -641,13 +643,15 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index)
         case PMP_AMATCH_TOR:
             /* Bit [g-1:0] read all zero */
             if (g >= 1 && g < TARGET_LONG_BITS) {
-                val &= ~((1ULL << g) - 1ULL);
+                target_ulong granule = 1ULL << g;
+                val = ROUND_DOWN(val, granule);
             }
             break;
         case PMP_AMATCH_NAPOT:
             /* Bit [g-2:0] read all one */
             if (g >= 2 && g < TARGET_LONG_BITS) {
-                val |= ((1ULL << (g - 1)) - 1ULL);
+                target_ulong granule = 1ULL << (g - 1);
+                val = ROUND_UP(val + 1ULL, granule) - 1ULL;
             }
             break;
         default:
-- 
2.48.1



  parent reply	other threads:[~2026-05-18  7:08 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-18  7:07 [PATCH v4 0/2] target/riscv: Fix PMP address alignment Jay Chang
2026-05-18  7:07 ` [PATCH v4 1/2] target/riscv: Align pmp size to pmp-granularity Jay Chang
2026-05-18  7:13   ` Philippe Mathieu-Daudé
2026-05-18  7:07 ` Jay Chang [this message]
2026-05-18  7:19   ` [PATCH v4 2/2] target/riscv: Use macros for PMP address alignment Philippe Mathieu-Daudé
2026-05-18 16:53     ` Daniel Henrique Barboza
2026-05-18 17:12       ` Anton Johansson via qemu development

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