From: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Jay Chang" <jay.chang@sifive.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Chao Liu <chao.liu.zevorn@gmail.com>,
Anton Johansson <anjo@rev.ng>
Subject: Re: [PATCH v4 2/2] target/riscv: Use macros for PMP address alignment
Date: Mon, 18 May 2026 13:53:33 -0300 [thread overview]
Message-ID: <ccb35d50-514d-4b17-8018-8d6bf58934f8@oss.qualcomm.com> (raw)
In-Reply-To: <3bb15715-b11e-46a6-bba5-46a85c036632@linaro.org>
On 5/18/2026 4:19 AM, Philippe Mathieu-Daudé wrote:
> On 18/5/26 09:07, Jay Chang wrote:
>> Replace manual bit manipulation with alignment macros for better
>> readability:
>>
>> - TOR: Use ROUND_DOWN() to clear lower bits
>> - NAPOT: Use ROUND_UP() to set lower bits
>>
>> The behavior remains unchanged.
>>
>> Signed-off-by: Jay Chang <jay.chang@sifive.com>
>> ---
>> target/riscv/pmp.c | 14 +++++++++-----
>> 1 file changed, 9 insertions(+), 5 deletions(-)
>>
>> diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
>> index de2157c830..238c7c5162 100644
>> --- a/target/riscv/pmp.c
>> +++ b/target/riscv/pmp.c
>> @@ -247,8 +247,9 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index)
>> case PMP_AMATCH_TOR:
>> /* Bits pmpaddr[G-1:0] do not affect the TOR address-matching logic. */
>> if (g >= 1) {
>> - prev_addr &= ~((1ULL << g) - 1ULL);
>> - this_addr &= ~((1ULL << g) - 1ULL);
>> + target_ulong granule = 1ULL << g;
>
> Maybe better to directly use uint64_t, in preparation of
> https://lore.kernel.org/qemu-devel/20260515180437.23620-1-anjo@rev.ng/
Can we please CC qemu-riscv@nongnu.org for the next version? This might
be the first time the RISC-V reviewers are made aware that this series
exists. It surely is my first time :D
Cheers,
Daniel
>
>> + prev_addr = ROUND_DOWN(prev_addr, granule);
>> + this_addr = ROUND_DOWN(this_addr, granule);
>> }
next prev parent reply other threads:[~2026-05-18 16:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 7:07 [PATCH v4 0/2] target/riscv: Fix PMP address alignment Jay Chang
2026-05-18 7:07 ` [PATCH v4 1/2] target/riscv: Align pmp size to pmp-granularity Jay Chang
2026-05-18 7:13 ` Philippe Mathieu-Daudé
2026-05-18 7:07 ` [PATCH v4 2/2] target/riscv: Use macros for PMP address alignment Jay Chang
2026-05-18 7:19 ` Philippe Mathieu-Daudé
2026-05-18 16:53 ` Daniel Henrique Barboza [this message]
2026-05-18 17:12 ` Anton Johansson via qemu development
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ccb35d50-514d-4b17-8018-8d6bf58934f8@oss.qualcomm.com \
--to=daniel.barboza@oss.qualcomm.com \
--cc=alistair.francis@wdc.com \
--cc=anjo@rev.ng \
--cc=chao.liu.zevorn@gmail.com \
--cc=jay.chang@sifive.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.