Re: [PATCH v4 2/2] target/riscv: Use macros for PMP address alignment

[Anton Johansson via qemu development <qemu-devel@nongnu.org>]

On 18/05/26, Daniel Henrique Barboza wrote:
> 
> 
> On 5/18/2026 4:19 AM, Philippe Mathieu-Daudé wrote:
> > On 18/5/26 09:07, Jay Chang wrote:
> > > Replace manual bit manipulation with alignment macros for better
> > > readability:
> > > 
> > > - TOR: Use ROUND_DOWN() to clear lower bits
> > > - NAPOT: Use ROUND_UP() to set lower bits
> > > 
> > > The behavior remains unchanged.
> > > 
> > > Signed-off-by: Jay Chang <jay.chang@sifive.com>
> > > ---
> > >   target/riscv/pmp.c | 14 +++++++++-----
> > >   1 file changed, 9 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> > > index de2157c830..238c7c5162 100644
> > > --- a/target/riscv/pmp.c
> > > +++ b/target/riscv/pmp.c
> > > @@ -247,8 +247,9 @@ void pmp_update_rule_addr(CPURISCVState *env, uint32_t pmp_index)
> > >       case PMP_AMATCH_TOR:
> > >           /* Bits pmpaddr[G-1:0] do not affect the TOR address-matching logic. */
> > >           if (g >= 1) {
> > > -            prev_addr &= ~((1ULL << g) - 1ULL);
> > > -            this_addr &= ~((1ULL << g) - 1ULL);
> > > +            target_ulong granule = 1ULL << g;
> > 
> > Maybe better to directly use uint64_t, in preparation of
> > https://lore.kernel.org/qemu-devel/20260515180437.23620-1-anjo@rev.ng/
> 
> Can we please CC qemu-riscv@nongnu.org for the next version? This might
> be the first time the RISC-V reviewers are made aware that this series
> exists.  It surely is my first time :D

That's on me, will do!:)

-- 
Anton Johansson
rev.ng Labs Srl.