From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev, peter.maydell@linaro.org,
shaju.abraham@nutanix.com, khushit.shah@nutanix.com,
yangjinqian1@huawei.com, cohuck@redhat.com,
richard.henderson@linaro.org, sebott@redhat.com,
skolothumtho@nvidia.com, philmd@linaro.org
Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,
armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,
jdenemar@redhat.com
Subject: [PATCH v5 04/18] arm/cpu: Add infra to handle generated ID register definitions
Date: Tue, 19 May 2026 15:27:18 +0200 [thread overview]
Message-ID: <20260519132905.145643-5-eric.auger@redhat.com> (raw)
In-Reply-To: <20260519132905.145643-1-eric.auger@redhat.com>
The known ID regs are populated in a new initialization function
named initialize_cpu_sysreg_properties(). That code will be
automatically generated from AARCHMRS Registers.json. For the
time being let's just describe a single id reg, CTR_EL0. In this
description we only care about non RES/RAZ fields, ie. named fields.
The registers are populated in an array indexed by ARMIDRegisterIdx
and their fields are added in a sorted list.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
v4 -> v5
- ifdef TARGET_ARM_CPU_IDREGS_H
- s/g_list_append/g_list_prepend
- void arm64_sysreg_add_field()
---
target/arm/cpu-idregs.h | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 target/arm/cpu-idregs.h
diff --git a/target/arm/cpu-idregs.h b/target/arm/cpu-idregs.h
new file mode 100644
index 0000000000..664e2d6ddd
--- /dev/null
+++ b/target/arm/cpu-idregs.h
@@ -0,0 +1,33 @@
+/*
+ * handle ID registers and their fields
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef TARGET_ARM_CPU_IDREGS_H
+#define TARGET_ARM_CPU_IDREGS_H
+
+#include "qemu/osdep.h"
+#include "qemu/error-report.h"
+#include "cpu.h"
+#include "cpu-sysregs.h"
+
+typedef struct ARM64SysRegField {
+ const char *name; /* name of the field, for instance CTR_EL0_IDC */
+ ARMIDRegisterIdx index; /* parent register, e.g. CTR_EL0_IDX */
+ int shift; /* lsb of the field in the register */
+ int length; /* highest bit number */
+} ARM64SysRegField;
+
+typedef struct ARM64SysReg {
+ const char *name; /* name of the sysreg, for instance CTR_EL0 */
+ ARMIDRegisterIdx index; /* register index, e.g. CTR_EL0_IDX */
+ struct ARM64SysRegField *fields;
+ uint32_t fields_count;
+} ARM64SysReg;
+
+/*
+ * List of exposed ID regs (automatically populated from AARCHMRS Registers.json)
+ */
+extern ARM64SysReg arm64_id_regs[NUM_ID_IDX];
+
+#endif
--
2.53.0
next prev parent reply other threads:[~2026-05-19 13:29 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 13:27 [PATCH v5 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-05-19 13:27 ` [PATCH v5 01/18] scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py Eric Auger
2026-05-19 13:27 ` [PATCH v5 02/18] target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order Eric Auger
2026-06-01 14:07 ` Shameer Kolothum Thodi
2026-05-19 13:27 ` [PATCH v5 03/18] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-06-01 14:09 ` Shameer Kolothum Thodi
2026-05-19 13:27 ` Eric Auger [this message]
2026-05-21 13:23 ` [PATCH v5 04/18] arm/cpu: Add infra to handle generated ID register definitions Sebastian Ott
2026-06-01 14:28 ` Shameer Kolothum Thodi
2026-06-12 7:38 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 05/18] scripts: Introduce scripts/aarch64_sysreg_helpers module Eric Auger
2026-05-19 13:27 ` [PATCH v5 06/18] scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py Eric Auger
2026-05-27 14:35 ` Khushit Shah
2026-05-27 15:11 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 07/18] target/arm/cpu-idregs.h.inc: generate with script Eric Auger
2026-05-19 13:27 ` [PATCH v5 08/18] target/arm/cpu_idregs: generate tables for Arm64 ID registers and fields Eric Auger
2026-05-21 13:27 ` Sebastian Ott
2026-05-27 14:52 ` Khushit Shah
2026-05-27 15:14 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 09/18] target/arm/kvm: Introduce kvm_get_writable_id_regs Eric Auger
2026-05-21 13:43 ` Sebastian Ott
2026-06-01 15:26 ` Shameer Kolothum Thodi
2026-05-19 13:27 ` [PATCH v5 10/18] target/arm/cpu64: Retrieve writable ID reg map in aarch64_host_initfn() Eric Auger
2026-05-21 13:47 ` Sebastian Ott
2026-05-27 14:54 ` Khushit Shah
2026-05-27 15:17 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 11/18] arm/kvm: Initialize all writable ID registers from host Eric Auger
2026-05-21 14:22 ` Sebastian Ott
2026-05-27 15:02 ` Khushit Shah
2026-05-27 15:25 ` Eric Auger
2026-05-27 15:30 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 12/18] arm/kvm: write back modified ID regs to KVM Eric Auger
2026-05-27 14:42 ` Khushit Shah
2026-05-27 15:28 ` Khushit Shah
2026-05-27 15:33 ` Khushit Shah
2026-05-28 17:35 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 13/18] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Eric Auger
2026-05-26 14:42 ` Sebastian Ott
2026-05-27 15:08 ` Khushit Shah
2026-05-27 15:32 ` Eric Auger
2026-05-27 15:44 ` Khushit Shah
2026-05-27 16:19 ` Eric Auger
2026-05-28 5:07 ` Khushit Shah
2026-05-28 15:22 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 14/18] target/arm/kvm: Special case REVIDR_EL1 and AIDR_EL1 Eric Auger
2026-05-26 15:08 ` Sebastian Ott
2026-05-19 13:27 ` [PATCH v5 15/18] target/arm/kvm: Ignore some writable bits that shouldn't be Eric Auger
2026-05-27 14:46 ` Khushit Shah
2026-05-27 15:45 ` Eric Auger
2026-05-27 15:54 ` Khushit Shah
2026-05-27 16:01 ` Eric Auger
2026-05-27 16:16 ` Khushit Shah
2026-05-27 16:30 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 16/18] target/arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model Eric Auger
2026-05-26 14:51 ` Sebastian Ott
2026-05-27 15:16 ` Khushit Shah
2026-05-27 15:51 ` Eric Auger
2026-05-27 15:56 ` Khushit Shah
2026-05-27 16:04 ` Eric Auger
2026-05-27 16:11 ` Khushit Shah
2026-05-27 17:20 ` Eric Auger
2026-05-28 5:29 ` Khushit Shah
2026-05-28 17:31 ` Eric Auger
2026-05-28 15:14 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 17/18] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-05-27 6:29 ` Sebastian Ott
2026-05-27 15:17 ` Khushit Shah
2026-05-27 15:55 ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 18/18] arm/cpu-features: document ID reg properties Eric Auger
2026-05-27 6:37 ` Sebastian Ott
2026-06-04 6:08 ` [PATCH v5 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Jinqian Yang
2026-06-04 6:32 ` Jinqian Yang
2026-06-04 8:31 ` Eric Auger
2026-06-04 12:00 ` Jinqian Yang
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