From: Dinh Nguyen <dinguyen@kernel.org>
To: linux-i3c@lists.infradead.org
Cc: dinguyen@kernel.org, devicetree@vger.kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
adrian.ho.yin.ng@altera.com, alexandre.belloni@bootlin.com,
Frank.Li@nxp.com
Subject: [PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C
Date: Wed, 27 May 2026 12:42:20 -0500 [thread overview]
Message-ID: <20260527174221.79259-2-dinguyen@kernel.org> (raw)
In-Reply-To: <20260527174221.79259-1-dinguyen@kernel.org>
The I3C nodes are missing the resets and reset-name properties that are
needed to bring the IP out of reset.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add reset-names, remove reset property for NAND
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index b06c6d5d60eed..fc169b869443b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
reg = <0x10da0000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
+ resets = <&rst I3C0_RESET>;
+ reset-names = "core_rst";
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
status = "disabled";
@@ -255,6 +257,8 @@ i3c1: i3c@10da1000 {
reg = <0x10da1000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
+ resets = <&rst I3C1_RESET>;
+ reset-names = "core_rst";
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
status = "disabled";
--
2.42.0.411.g813d9a9188
--
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linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c
WARNING: multiple messages have this Message-ID (diff)
From: Dinh Nguyen <dinguyen@kernel.org>
To: linux-i3c@lists.infradead.org
Cc: dinguyen@kernel.org, devicetree@vger.kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
adrian.ho.yin.ng@altera.com, alexandre.belloni@bootlin.com,
Frank.Li@nxp.com
Subject: [PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C
Date: Wed, 27 May 2026 12:42:20 -0500 [thread overview]
Message-ID: <20260527174221.79259-2-dinguyen@kernel.org> (raw)
In-Reply-To: <20260527174221.79259-1-dinguyen@kernel.org>
The I3C nodes are missing the resets and reset-name properties that are
needed to bring the IP out of reset.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add reset-names, remove reset property for NAND
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index b06c6d5d60eed..fc169b869443b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
reg = <0x10da0000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
+ resets = <&rst I3C0_RESET>;
+ reset-names = "core_rst";
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
status = "disabled";
@@ -255,6 +257,8 @@ i3c1: i3c@10da1000 {
reg = <0x10da1000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
+ resets = <&rst I3C1_RESET>;
+ reset-names = "core_rst";
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
status = "disabled";
--
2.42.0.411.g813d9a9188
next prev parent reply other threads:[~2026-05-27 17:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-27 17:42 [PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names Dinh Nguyen
2026-05-27 17:42 ` Dinh Nguyen
2026-05-27 17:42 ` Dinh Nguyen [this message]
2026-05-27 17:42 ` [PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C Dinh Nguyen
2026-05-27 18:01 ` sashiko-bot
2026-05-27 18:03 ` [PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names sashiko-bot
2026-05-28 7:20 ` Krzysztof Kozlowski
2026-05-28 7:20 ` Krzysztof Kozlowski
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