* [PULL 01/37] hw/misc/aspeed_hace: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 02/37] hw/misc/aspeed_lpc: " Cédric Le Goater
` (36 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 6 standalone TypeInfo variables (aspeed_hace_info as abstract
base, aspeed_2400_hace_info, aspeed_2500_hace_info,
aspeed_2600_hace_info, aspeed_1030_hace_info, aspeed_2700_hace_info)
directly into the 'aspeed_hace_types[]' array, removing the need for
separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_hace.c | 81 ++++++++++++++++++-------------------------
1 file changed, 34 insertions(+), 47 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 4c9e913f6c66..c61efe50c4ff 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -696,14 +696,6 @@ static void aspeed_hace_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_aspeed_hace;
}
-static const TypeInfo aspeed_hace_info = {
- .name = TYPE_ASPEED_HACE,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedHACEState),
- .class_init = aspeed_hace_class_init,
- .class_size = sizeof(AspeedHACEClass)
-};
-
static void aspeed_ast2400_hace_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -718,12 +710,6 @@ static void aspeed_ast2400_hace_class_init(ObjectClass *klass, const void *data)
ahc->hash_mask = 0x000003ff; /* No SG or SHA512 modes */
}
-static const TypeInfo aspeed_ast2400_hace_info = {
- .name = TYPE_ASPEED_AST2400_HACE,
- .parent = TYPE_ASPEED_HACE,
- .class_init = aspeed_ast2400_hace_class_init,
-};
-
static void aspeed_ast2500_hace_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -738,12 +724,6 @@ static void aspeed_ast2500_hace_class_init(ObjectClass *klass, const void *data)
ahc->hash_mask = 0x000003ff; /* No SG or SHA512 modes */
}
-static const TypeInfo aspeed_ast2500_hace_info = {
- .name = TYPE_ASPEED_AST2500_HACE,
- .parent = TYPE_ASPEED_HACE,
- .class_init = aspeed_ast2500_hace_class_init,
-};
-
static void aspeed_ast2600_hace_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -758,12 +738,6 @@ static void aspeed_ast2600_hace_class_init(ObjectClass *klass, const void *data)
ahc->hash_mask = 0x00147FFF;
}
-static const TypeInfo aspeed_ast2600_hace_info = {
- .name = TYPE_ASPEED_AST2600_HACE,
- .parent = TYPE_ASPEED_HACE,
- .class_init = aspeed_ast2600_hace_class_init,
-};
-
static void aspeed_ast1030_hace_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -778,12 +752,6 @@ static void aspeed_ast1030_hace_class_init(ObjectClass *klass, const void *data)
ahc->hash_mask = 0x00147FFF;
}
-static const TypeInfo aspeed_ast1030_hace_info = {
- .name = TYPE_ASPEED_AST1030_HACE,
- .parent = TYPE_ASPEED_HACE,
- .class_init = aspeed_ast1030_hace_class_init,
-};
-
static void aspeed_ast2700_hace_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -823,20 +791,39 @@ static void aspeed_ast2700_hace_class_init(ObjectClass *klass, const void *data)
ahc->has_dma64 = true;
}
-static const TypeInfo aspeed_ast2700_hace_info = {
- .name = TYPE_ASPEED_AST2700_HACE,
- .parent = TYPE_ASPEED_HACE,
- .class_init = aspeed_ast2700_hace_class_init,
+static const TypeInfo aspeed_hace_types[] = {
+ {
+ .name = TYPE_ASPEED_HACE,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedHACEState),
+ .class_init = aspeed_hace_class_init,
+ .class_size = sizeof(AspeedHACEClass),
+ },
+ {
+ .name = TYPE_ASPEED_AST1030_HACE,
+ .parent = TYPE_ASPEED_HACE,
+ .class_init = aspeed_ast1030_hace_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_AST2400_HACE,
+ .parent = TYPE_ASPEED_HACE,
+ .class_init = aspeed_ast2400_hace_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_AST2500_HACE,
+ .parent = TYPE_ASPEED_HACE,
+ .class_init = aspeed_ast2500_hace_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_AST2600_HACE,
+ .parent = TYPE_ASPEED_HACE,
+ .class_init = aspeed_ast2600_hace_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_AST2700_HACE,
+ .parent = TYPE_ASPEED_HACE,
+ .class_init = aspeed_ast2700_hace_class_init,
+ }
};
-static void aspeed_hace_register_types(void)
-{
- type_register_static(&aspeed_ast2400_hace_info);
- type_register_static(&aspeed_ast2500_hace_info);
- type_register_static(&aspeed_ast2600_hace_info);
- type_register_static(&aspeed_ast1030_hace_info);
- type_register_static(&aspeed_ast2700_hace_info);
- type_register_static(&aspeed_hace_info);
-}
-
-type_init(aspeed_hace_register_types);
+DEFINE_TYPES(aspeed_hace_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 02/37] hw/misc/aspeed_lpc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
2026-06-08 5:47 ` [PULL 01/37] hw/misc/aspeed_hace: Convert to DEFINE_TYPES() with inlined TypeInfo Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 03/37] hw/misc/aspeed_ltpi: " Cédric Le Goater
` (35 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_lpc_info' TypeInfo variable directly
into the 'aspeed_lpc_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_lpc.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/misc/aspeed_lpc.c b/hw/misc/aspeed_lpc.c
index f69c48da125c..7f7e4f1a0985 100644
--- a/hw/misc/aspeed_lpc.c
+++ b/hw/misc/aspeed_lpc.c
@@ -470,17 +470,14 @@ static void aspeed_lpc_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_lpc_properties);
}
-static const TypeInfo aspeed_lpc_info = {
- .name = TYPE_ASPEED_LPC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedLPCState),
- .class_init = aspeed_lpc_class_init,
- .instance_init = aspeed_lpc_init,
+static const TypeInfo aspeed_lpc_types[] = {
+ {
+ .name = TYPE_ASPEED_LPC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedLPCState),
+ .class_init = aspeed_lpc_class_init,
+ .instance_init = aspeed_lpc_init,
+ }
};
-static void aspeed_lpc_register_types(void)
-{
- type_register_static(&aspeed_lpc_info);
-}
-
-type_init(aspeed_lpc_register_types);
+DEFINE_TYPES(aspeed_lpc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 03/37] hw/misc/aspeed_ltpi: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
2026-06-08 5:47 ` [PULL 01/37] hw/misc/aspeed_hace: Convert to DEFINE_TYPES() with inlined TypeInfo Cédric Le Goater
2026-06-08 5:47 ` [PULL 02/37] hw/misc/aspeed_lpc: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 04/37] hw/misc/aspeed_pwm: " Cédric Le Goater
` (34 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_ltpi_info' TypeInfo variable directly
into the 'aspeed_ltpi_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_ltpi.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/misc/aspeed_ltpi.c b/hw/misc/aspeed_ltpi.c
index 956e91d14361..2e413550b9fd 100644
--- a/hw/misc/aspeed_ltpi.c
+++ b/hw/misc/aspeed_ltpi.c
@@ -179,16 +179,13 @@ static void aspeed_ltpi_class_init(ObjectClass *klass, const void *data)
rc->phases.hold = aspeed_ltpi_reset_hold;
}
-static const TypeInfo aspeed_ltpi_info = {
- .name = TYPE_ASPEED_LTPI,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedLTPIState),
- .class_init = aspeed_ltpi_class_init,
+static const TypeInfo aspeed_ltpi_types[] = {
+ {
+ .name = TYPE_ASPEED_LTPI,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedLTPIState),
+ .class_init = aspeed_ltpi_class_init,
+ }
};
-static void aspeed_ltpi_register_types(void)
-{
- type_register_static(&aspeed_ltpi_info);
-}
-
-type_init(aspeed_ltpi_register_types);
+DEFINE_TYPES(aspeed_ltpi_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 04/37] hw/misc/aspeed_pwm: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (2 preceding siblings ...)
2026-06-08 5:47 ` [PULL 03/37] hw/misc/aspeed_ltpi: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 05/37] hw/misc/aspeed_sbc: " Cédric Le Goater
` (33 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_pwm_info' TypeInfo variable directly
into the 'aspeed_pwm_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_pwm.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/misc/aspeed_pwm.c b/hw/misc/aspeed_pwm.c
index 673a0f1346f0..dfb93ae7fb81 100644
--- a/hw/misc/aspeed_pwm.c
+++ b/hw/misc/aspeed_pwm.c
@@ -106,16 +106,13 @@ static void aspeed_pwm_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_aspeed_pwm;
}
-static const TypeInfo aspeed_pwm_info = {
- .name = TYPE_ASPEED_PWM,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedPWMState),
- .class_init = aspeed_pwm_class_init,
+static const TypeInfo aspeed_pwm_types[] = {
+ {
+ .name = TYPE_ASPEED_PWM,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedPWMState),
+ .class_init = aspeed_pwm_class_init,
+ }
};
-static void aspeed_pwm_register_types(void)
-{
- type_register_static(&aspeed_pwm_info);
-}
-
-type_init(aspeed_pwm_register_types);
+DEFINE_TYPES(aspeed_pwm_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 05/37] hw/misc/aspeed_sbc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (3 preceding siblings ...)
2026-06-08 5:47 ` [PULL 04/37] hw/misc/aspeed_pwm: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 06/37] hw/misc/aspeed_scu: " Cédric Le Goater
` (32 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 3 standalone TypeInfo variables (aspeed_2600_sbc_info,
aspeed_ast10x0_sbc_info, aspeed_sbc_info) directly into the
'aspeed_sbc_types[]' array, removing the need for separate
declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_sbc.c | 46 +++++++++++++++++++-------------------------
1 file changed, 20 insertions(+), 26 deletions(-)
diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c
index 6125d2f134e8..1dfcf14e5ba6 100644
--- a/hw/misc/aspeed_sbc.c
+++ b/hw/misc/aspeed_sbc.c
@@ -338,14 +338,6 @@ static void aspeed_sbc_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_sbc_properties);
}
-static const TypeInfo aspeed_sbc_info = {
- .name = TYPE_ASPEED_SBC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSBCState),
- .instance_init = aspeed_sbc_instance_init,
- .class_init = aspeed_sbc_class_init,
- .class_size = sizeof(AspeedSBCClass)
-};
static void aspeed_ast2600_sbc_class_init(ObjectClass *klass, const void *data)
{
@@ -356,12 +348,6 @@ static void aspeed_ast2600_sbc_class_init(ObjectClass *klass, const void *data)
sc->has_otp = true;
}
-static const TypeInfo aspeed_ast2600_sbc_info = {
- .name = TYPE_ASPEED_AST2600_SBC,
- .parent = TYPE_ASPEED_SBC,
- .class_init = aspeed_ast2600_sbc_class_init,
-};
-
static void aspeed_ast10x0_sbc_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -371,17 +357,25 @@ static void aspeed_ast10x0_sbc_class_init(ObjectClass *klass, const void *data)
sc->has_otp = true;
}
-static const TypeInfo aspeed_ast10x0_sbc_info = {
- .name = TYPE_ASPEED_AST10X0_SBC,
- .parent = TYPE_ASPEED_SBC,
- .class_init = aspeed_ast10x0_sbc_class_init,
+static const TypeInfo aspeed_sbc_types[] = {
+ {
+ .name = TYPE_ASPEED_SBC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSBCState),
+ .instance_init = aspeed_sbc_instance_init,
+ .class_init = aspeed_sbc_class_init,
+ .class_size = sizeof(AspeedSBCClass),
+ },
+ {
+ .name = TYPE_ASPEED_AST10X0_SBC,
+ .parent = TYPE_ASPEED_SBC,
+ .class_init = aspeed_ast10x0_sbc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_AST2600_SBC,
+ .parent = TYPE_ASPEED_SBC,
+ .class_init = aspeed_ast2600_sbc_class_init,
+ }
};
-static void aspeed_sbc_register_types(void)
-{
- type_register_static(&aspeed_ast2600_sbc_info);
- type_register_static(&aspeed_ast10x0_sbc_info);
- type_register_static(&aspeed_sbc_info);
-}
-
-type_init(aspeed_sbc_register_types);
+DEFINE_TYPES(aspeed_sbc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 06/37] hw/misc/aspeed_scu: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (4 preceding siblings ...)
2026-06-08 5:47 ` [PULL 05/37] hw/misc/aspeed_sbc: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 07/37] hw/misc/aspeed_sdmc: " Cédric Le Goater
` (31 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 7 standalone TypeInfo variables (aspeed_scu_info as abstract
base, aspeed_2400_scu_info, aspeed_2500_scu_info, aspeed_2600_scu_info,
aspeed_1030_scu_info, aspeed_2700_scu_info, aspeed_2700_scuio_info)
directly into the 'aspeed_scu_types[]' array, removing the need for
separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_scu.c | 107 +++++++++++++++++++------------------------
1 file changed, 46 insertions(+), 61 deletions(-)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 19da6c075fae..fe731a28bd50 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -624,15 +624,6 @@ static void aspeed_scu_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_scu_properties);
}
-static const TypeInfo aspeed_scu_info = {
- .name = TYPE_ASPEED_SCU,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_scu_class_init,
- .class_size = sizeof(AspeedSCUClass),
- .abstract = true,
-};
-
static void aspeed_2400_scu_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -648,13 +639,6 @@ static void aspeed_2400_scu_class_init(ObjectClass *klass, const void *data)
asc->ops = &aspeed_ast2400_scu_ops;
}
-static const TypeInfo aspeed_2400_scu_info = {
- .name = TYPE_ASPEED_2400_SCU,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_2400_scu_class_init,
-};
-
static void aspeed_2500_scu_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -670,13 +654,6 @@ static void aspeed_2500_scu_class_init(ObjectClass *klass, const void *data)
asc->ops = &aspeed_ast2500_scu_ops;
}
-static const TypeInfo aspeed_2500_scu_info = {
- .name = TYPE_ASPEED_2500_SCU,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_2500_scu_class_init,
-};
-
static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset,
unsigned size)
{
@@ -859,13 +836,6 @@ static void aspeed_2600_scu_class_init(ObjectClass *klass, const void *data)
asc->ops = &aspeed_ast2600_scu_ops;
}
-static const TypeInfo aspeed_2600_scu_info = {
- .name = TYPE_ASPEED_2600_SCU,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_2600_scu_class_init,
-};
-
static uint64_t aspeed_ast2700_scu_read(void *opaque, hwaddr offset,
unsigned size)
{
@@ -1099,20 +1069,6 @@ static void aspeed_2700_scuio_class_init(ObjectClass *klass, const void *data)
asc->ops = &aspeed_ast2700_scuio_ops;
}
-static const TypeInfo aspeed_2700_scu_info = {
- .name = TYPE_ASPEED_2700_SCU,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_2700_scu_class_init,
-};
-
-static const TypeInfo aspeed_2700_scuio_info = {
- .name = TYPE_ASPEED_2700_SCUIO,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_2700_scuio_class_init,
-};
-
static const uint32_t ast1030_a1_resets[ASPEED_AST2600_SCU_NR_REGS] = {
[AST2600_SYS_RST_CTRL] = 0xFFC3FED8,
[AST2600_SYS_RST_CTRL2] = 0x09FFFFFC,
@@ -1158,22 +1114,51 @@ static void aspeed_1030_scu_class_init(ObjectClass *klass, const void *data)
asc->ops = &aspeed_ast2600_scu_ops;
}
-static const TypeInfo aspeed_1030_scu_info = {
- .name = TYPE_ASPEED_1030_SCU,
- .parent = TYPE_ASPEED_SCU,
- .instance_size = sizeof(AspeedSCUState),
- .class_init = aspeed_1030_scu_class_init,
+static const TypeInfo aspeed_scu_types[] = {
+ {
+ .name = TYPE_ASPEED_SCU,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_scu_class_init,
+ .class_size = sizeof(AspeedSCUClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_1030_SCU,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_1030_scu_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2400_SCU,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_2400_scu_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_SCU,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_2500_scu_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_SCU,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_2600_scu_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_SCU,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_2700_scu_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_SCUIO,
+ .parent = TYPE_ASPEED_SCU,
+ .instance_size = sizeof(AspeedSCUState),
+ .class_init = aspeed_2700_scuio_class_init,
+ }
};
-static void aspeed_scu_register_types(void)
-{
- type_register_static(&aspeed_scu_info);
- type_register_static(&aspeed_2400_scu_info);
- type_register_static(&aspeed_2500_scu_info);
- type_register_static(&aspeed_2600_scu_info);
- type_register_static(&aspeed_1030_scu_info);
- type_register_static(&aspeed_2700_scu_info);
- type_register_static(&aspeed_2700_scuio_info);
-}
-
-type_init(aspeed_scu_register_types);
+DEFINE_TYPES(aspeed_scu_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 07/37] hw/misc/aspeed_sdmc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (5 preceding siblings ...)
2026-06-08 5:47 ` [PULL 06/37] hw/misc/aspeed_scu: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 08/37] hw/misc:aspeed_sli: " Cédric Le Goater
` (30 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 5 standalone TypeInfo variables (aspeed_sdmc_info as abstract
base, aspeed_2400_sdmc_info, aspeed_2500_sdmc_info,
aspeed_2600_sdmc_info, aspeed_2700_sdmc_info) directly into the
'aspeed_sdmc_types[]' array, removing the need for separate
declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_sdmc.c | 73 ++++++++++++++++++-------------------------
1 file changed, 31 insertions(+), 42 deletions(-)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 055abf7f50f0..f8fbaebee6ab 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -310,16 +310,6 @@ static void aspeed_sdmc_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_sdmc_properties);
}
-static const TypeInfo aspeed_sdmc_info = {
- .name = TYPE_ASPEED_SDMC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSDMCState),
- .instance_init = aspeed_sdmc_initfn,
- .class_init = aspeed_sdmc_class_init,
- .class_size = sizeof(AspeedSDMCClass),
- .abstract = true,
-};
-
static int aspeed_sdmc_get_ram_bits(AspeedSDMCState *s)
{
AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
@@ -393,12 +383,6 @@ static void aspeed_2400_sdmc_class_init(ObjectClass *klass, const void *data)
asc->valid_ram_sizes = aspeed_2400_ram_sizes;
}
-static const TypeInfo aspeed_2400_sdmc_info = {
- .name = TYPE_ASPEED_2400_SDMC,
- .parent = TYPE_ASPEED_SDMC,
- .class_init = aspeed_2400_sdmc_class_init,
-};
-
static uint32_t aspeed_2500_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data)
{
uint32_t fixed_conf = ASPEED_SDMC_HW_VERSION(1) |
@@ -461,12 +445,6 @@ static void aspeed_2500_sdmc_class_init(ObjectClass *klass, const void *data)
asc->valid_ram_sizes = aspeed_2500_ram_sizes;
}
-static const TypeInfo aspeed_2500_sdmc_info = {
- .name = TYPE_ASPEED_2500_SDMC,
- .parent = TYPE_ASPEED_SDMC,
- .class_init = aspeed_2500_sdmc_class_init,
-};
-
static uint32_t aspeed_2600_sdmc_compute_conf(AspeedSDMCState *s, uint32_t data)
{
uint32_t fixed_conf = ASPEED_SDMC_HW_VERSION(3) |
@@ -555,12 +533,6 @@ static void aspeed_2600_sdmc_class_init(ObjectClass *klass, const void *data)
asc->valid_ram_sizes = aspeed_2600_ram_sizes;
}
-static const TypeInfo aspeed_2600_sdmc_info = {
- .name = TYPE_ASPEED_2600_SDMC,
- .parent = TYPE_ASPEED_SDMC,
- .class_init = aspeed_2600_sdmc_class_init,
-};
-
static void aspeed_2700_sdmc_reset_hold(Object *obj, ResetType type)
{
AspeedSDMCState *s = ASPEED_SDMC(obj);
@@ -690,19 +662,36 @@ static void aspeed_2700_sdmc_class_init(ObjectClass *klass, const void *data)
asc->valid_ram_sizes = aspeed_2700_ram_sizes;
}
-static const TypeInfo aspeed_2700_sdmc_info = {
- .name = TYPE_ASPEED_2700_SDMC,
- .parent = TYPE_ASPEED_SDMC,
- .class_init = aspeed_2700_sdmc_class_init,
+static const TypeInfo aspeed_sdmc_types[] = {
+ {
+ .name = TYPE_ASPEED_SDMC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSDMCState),
+ .instance_init = aspeed_sdmc_initfn,
+ .class_init = aspeed_sdmc_class_init,
+ .class_size = sizeof(AspeedSDMCClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_2400_SDMC,
+ .parent = TYPE_ASPEED_SDMC,
+ .class_init = aspeed_2400_sdmc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_SDMC,
+ .parent = TYPE_ASPEED_SDMC,
+ .class_init = aspeed_2500_sdmc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_SDMC,
+ .parent = TYPE_ASPEED_SDMC,
+ .class_init = aspeed_2600_sdmc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_SDMC,
+ .parent = TYPE_ASPEED_SDMC,
+ .class_init = aspeed_2700_sdmc_class_init,
+ }
};
-static void aspeed_sdmc_register_types(void)
-{
- type_register_static(&aspeed_sdmc_info);
- type_register_static(&aspeed_2400_sdmc_info);
- type_register_static(&aspeed_2500_sdmc_info);
- type_register_static(&aspeed_2600_sdmc_info);
- type_register_static(&aspeed_2700_sdmc_info);
-}
-
-type_init(aspeed_sdmc_register_types);
+DEFINE_TYPES(aspeed_sdmc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 08/37] hw/misc:aspeed_sli: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (6 preceding siblings ...)
2026-06-08 5:47 ` [PULL 07/37] hw/misc/aspeed_sdmc: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 09/37] hw/misc/aspeed_xdma: " Cédric Le Goater
` (29 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 3 standalone TypeInfo variables (aspeed_sli_info as abstract
base, aspeed_2700_sli_info, aspeed_2700_sliio_info) directly into the
'aspeed_sli_types[]' array, removing the need for separate
declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_sli.c | 44 +++++++++++++++++++-------------------------
1 file changed, 19 insertions(+), 25 deletions(-)
diff --git a/hw/misc/aspeed_sli.c b/hw/misc/aspeed_sli.c
index 5b4d70cdc064..74ad02faf5ea 100644
--- a/hw/misc/aspeed_sli.c
+++ b/hw/misc/aspeed_sli.c
@@ -132,13 +132,6 @@ static void aspeed_sli_class_init(ObjectClass *klass, const void *data)
dc->realize = aspeed_sli_realize;
}
-static const TypeInfo aspeed_sli_info = {
- .name = TYPE_ASPEED_SLI,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSLIState),
- .class_init = aspeed_sli_class_init,
- .abstract = true,
-};
static void aspeed_2700_sli_class_init(ObjectClass *klass, const void *data)
{
@@ -155,23 +148,24 @@ static void aspeed_2700_sliio_class_init(ObjectClass *klass, const void *data)
dc->realize = aspeed_sliio_realize;
}
-static const TypeInfo aspeed_2700_sli_info = {
- .name = TYPE_ASPEED_2700_SLI,
- .parent = TYPE_ASPEED_SLI,
- .class_init = aspeed_2700_sli_class_init,
-};
-
-static const TypeInfo aspeed_2700_sliio_info = {
- .name = TYPE_ASPEED_2700_SLIIO,
- .parent = TYPE_ASPEED_SLI,
- .class_init = aspeed_2700_sliio_class_init,
+static const TypeInfo aspeed_sli_types[] = {
+ {
+ .name = TYPE_ASPEED_SLI,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSLIState),
+ .class_init = aspeed_sli_class_init,
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_2700_SLI,
+ .parent = TYPE_ASPEED_SLI,
+ .class_init = aspeed_2700_sli_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_SLIIO,
+ .parent = TYPE_ASPEED_SLI,
+ .class_init = aspeed_2700_sliio_class_init,
+ }
};
-static void aspeed_sli_register_types(void)
-{
- type_register_static(&aspeed_sli_info);
- type_register_static(&aspeed_2700_sli_info);
- type_register_static(&aspeed_2700_sliio_info);
-}
-
-type_init(aspeed_sli_register_types);
+DEFINE_TYPES(aspeed_sli_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 09/37] hw/misc/aspeed_xdma: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (7 preceding siblings ...)
2026-06-08 5:47 ` [PULL 08/37] hw/misc:aspeed_sli: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:47 ` [PULL 10/37] hw/adc/aspeed_adc: " Cédric Le Goater
` (28 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 4 standalone TypeInfo variables (aspeed_xdma_info as abstract
base, aspeed_2400_xdma_info, aspeed_2500_xdma_info,
aspeed_2600_xdma_info) directly into the 'aspeed_xdma_types[]'
array, removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/misc/aspeed_xdma.c | 58 +++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 33 deletions(-)
diff --git a/hw/misc/aspeed_xdma.c b/hw/misc/aspeed_xdma.c
index 80b32593336c..58a471ee0306 100644
--- a/hw/misc/aspeed_xdma.c
+++ b/hw/misc/aspeed_xdma.c
@@ -167,12 +167,6 @@ static void aspeed_2600_xdma_class_init(ObjectClass *klass, const void *data)
XDMA_AST2600_IRQ_STATUS_DS_COMP;
}
-static const TypeInfo aspeed_2600_xdma_info = {
- .name = TYPE_ASPEED_2600_XDMA,
- .parent = TYPE_ASPEED_XDMA,
- .class_init = aspeed_2600_xdma_class_init,
-};
-
static void aspeed_2500_xdma_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -189,12 +183,6 @@ static void aspeed_2500_xdma_class_init(ObjectClass *klass, const void *data)
axc->intr_complete = XDMA_IRQ_ENG_STAT_US_COMP | XDMA_IRQ_ENG_STAT_DS_COMP;
};
-static const TypeInfo aspeed_2500_xdma_info = {
- .name = TYPE_ASPEED_2500_XDMA,
- .parent = TYPE_ASPEED_XDMA,
- .class_init = aspeed_2500_xdma_class_init,
-};
-
static void aspeed_2400_xdma_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -211,12 +199,6 @@ static void aspeed_2400_xdma_class_init(ObjectClass *klass, const void *data)
axc->intr_complete = XDMA_IRQ_ENG_STAT_US_COMP | XDMA_IRQ_ENG_STAT_DS_COMP;
};
-static const TypeInfo aspeed_2400_xdma_info = {
- .name = TYPE_ASPEED_2400_XDMA,
- .parent = TYPE_ASPEED_XDMA,
- .class_init = aspeed_2400_xdma_class_init,
-};
-
static void aspeed_xdma_class_init(ObjectClass *classp, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(classp);
@@ -227,20 +209,30 @@ static void aspeed_xdma_class_init(ObjectClass *classp, const void *data)
dc->vmsd = &aspeed_xdma_vmstate;
}
-static const TypeInfo aspeed_xdma_info = {
- .name = TYPE_ASPEED_XDMA,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedXDMAState),
- .class_init = aspeed_xdma_class_init,
- .class_size = sizeof(AspeedXDMAClass),
- .abstract = true,
+static const TypeInfo aspeed_xdma_types[] = {
+ {
+ .name = TYPE_ASPEED_XDMA,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedXDMAState),
+ .class_init = aspeed_xdma_class_init,
+ .class_size = sizeof(AspeedXDMAClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_2400_XDMA,
+ .parent = TYPE_ASPEED_XDMA,
+ .class_init = aspeed_2400_xdma_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_XDMA,
+ .parent = TYPE_ASPEED_XDMA,
+ .class_init = aspeed_2500_xdma_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_XDMA,
+ .parent = TYPE_ASPEED_XDMA,
+ .class_init = aspeed_2600_xdma_class_init,
+ }
};
-static void aspeed_xdma_register_type(void)
-{
- type_register_static(&aspeed_xdma_info);
- type_register_static(&aspeed_2400_xdma_info);
- type_register_static(&aspeed_2500_xdma_info);
- type_register_static(&aspeed_2600_xdma_info);
-}
-type_init(aspeed_xdma_register_type);
+DEFINE_TYPES(aspeed_xdma_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 10/37] hw/adc/aspeed_adc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (8 preceding siblings ...)
2026-06-08 5:47 ` [PULL 09/37] hw/misc/aspeed_xdma: " Cédric Le Goater
@ 2026-06-08 5:47 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 11/37] hw/arm/aspeed_ast1700: " Cédric Le Goater
` (27 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:47 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 7 standalone TypeInfo variables (aspeed_adc_engine_info,
aspeed_adc_info as abstract base, aspeed_2400_adc_info,
aspeed_2500_adc_info, aspeed_2600_adc_info, aspeed_1030_adc_info,
aspeed_2700_adc_info) directly into the 'aspeed_adc_types[]' array,
removing the need for separate declarations. Note that aspeed_2400 and
aspeed_2500 variants carry only .name and .parent with no class_init.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/adc/aspeed_adc.c | 95 +++++++++++++++++++--------------------------
1 file changed, 40 insertions(+), 55 deletions(-)
diff --git a/hw/adc/aspeed_adc.c b/hw/adc/aspeed_adc.c
index 18b74898e16b..70655800a4d4 100644
--- a/hw/adc/aspeed_adc.c
+++ b/hw/adc/aspeed_adc.c
@@ -304,13 +304,6 @@ static void aspeed_adc_engine_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_aspeed_adc_engine;
}
-static const TypeInfo aspeed_adc_engine_info = {
- .name = TYPE_ASPEED_ADC_ENGINE,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedADCEngineState),
- .class_init = aspeed_adc_engine_class_init,
-};
-
static void aspeed_adc_instance_init(Object *obj)
{
AspeedADCState *s = ASPEED_ADC(obj);
@@ -408,53 +401,45 @@ static void aspeed_2700_adc_class_init(ObjectClass *klass, const void *data)
aac->nr_engines = 2;
}
-static const TypeInfo aspeed_adc_info = {
- .name = TYPE_ASPEED_ADC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = aspeed_adc_instance_init,
- .instance_size = sizeof(AspeedADCState),
- .class_init = aspeed_adc_class_init,
- .class_size = sizeof(AspeedADCClass),
- .abstract = true,
-};
-
-static const TypeInfo aspeed_2400_adc_info = {
- .name = TYPE_ASPEED_2400_ADC,
- .parent = TYPE_ASPEED_ADC,
-};
-
-static const TypeInfo aspeed_2500_adc_info = {
- .name = TYPE_ASPEED_2500_ADC,
- .parent = TYPE_ASPEED_ADC,
-};
-
-static const TypeInfo aspeed_2600_adc_info = {
- .name = TYPE_ASPEED_2600_ADC,
- .parent = TYPE_ASPEED_ADC,
- .class_init = aspeed_2600_adc_class_init,
-};
-
-static const TypeInfo aspeed_1030_adc_info = {
- .name = TYPE_ASPEED_1030_ADC,
- .parent = TYPE_ASPEED_ADC,
- .class_init = aspeed_1030_adc_class_init, /* No change since AST2600 */
-};
-
-static const TypeInfo aspeed_2700_adc_info = {
- .name = TYPE_ASPEED_2700_ADC,
- .parent = TYPE_ASPEED_ADC,
- .class_init = aspeed_2700_adc_class_init,
+static const TypeInfo aspeed_adc_types[] = {
+ {
+ .name = TYPE_ASPEED_ADC_ENGINE,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedADCEngineState),
+ .class_init = aspeed_adc_engine_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_ADC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_adc_instance_init,
+ .instance_size = sizeof(AspeedADCState),
+ .class_init = aspeed_adc_class_init,
+ .class_size = sizeof(AspeedADCClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_1030_ADC,
+ .parent = TYPE_ASPEED_ADC,
+ .class_init = aspeed_1030_adc_class_init, /* No change since AST2600 */
+ },
+ {
+ .name = TYPE_ASPEED_2400_ADC,
+ .parent = TYPE_ASPEED_ADC,
+ },
+ {
+ .name = TYPE_ASPEED_2500_ADC,
+ .parent = TYPE_ASPEED_ADC,
+ },
+ {
+ .name = TYPE_ASPEED_2600_ADC,
+ .parent = TYPE_ASPEED_ADC,
+ .class_init = aspeed_2600_adc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_ADC,
+ .parent = TYPE_ASPEED_ADC,
+ .class_init = aspeed_2700_adc_class_init,
+ }
};
-static void aspeed_adc_register_types(void)
-{
- type_register_static(&aspeed_adc_engine_info);
- type_register_static(&aspeed_adc_info);
- type_register_static(&aspeed_2400_adc_info);
- type_register_static(&aspeed_2500_adc_info);
- type_register_static(&aspeed_2600_adc_info);
- type_register_static(&aspeed_1030_adc_info);
- type_register_static(&aspeed_2700_adc_info);
-}
-
-type_init(aspeed_adc_register_types);
+DEFINE_TYPES(aspeed_adc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 11/37] hw/arm/aspeed_ast1700: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (9 preceding siblings ...)
2026-06-08 5:47 ` [PULL 10/37] hw/adc/aspeed_adc: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 12/37] hw/gpio/aspeed_gpio: " Cédric Le Goater
` (26 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone TypeInfo variable directly into the
'aspeed_ast1700_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-12-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1700.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c
index e90302c11bcd..5af5da5b8a73 100644
--- a/hw/arm/aspeed_ast1700.c
+++ b/hw/arm/aspeed_ast1700.c
@@ -260,17 +260,14 @@ static void aspeed_ast1700_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_ast1700_props);
}
-static const TypeInfo aspeed_ast1700_info = {
- .name = TYPE_ASPEED_AST1700,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedAST1700SoCState),
- .class_init = aspeed_ast1700_class_init,
- .instance_init = aspeed_ast1700_instance_init,
+static const TypeInfo aspeed_ast1700_types[] = {
+ {
+ .name = TYPE_ASPEED_AST1700,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedAST1700SoCState),
+ .class_init = aspeed_ast1700_class_init,
+ .instance_init = aspeed_ast1700_instance_init,
+ }
};
-static void aspeed_ast1700_register_types(void)
-{
- type_register_static(&aspeed_ast1700_info);
-}
-
-type_init(aspeed_ast1700_register_types);
+DEFINE_TYPES(aspeed_ast1700_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 12/37] hw/gpio/aspeed_gpio: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (10 preceding siblings ...)
2026-06-08 5:48 ` [PULL 11/37] hw/arm/aspeed_ast1700: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 13/37] hw/gpio/aspeed_sgpio: " Cédric Le Goater
` (25 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 7 standalone TypeInfo variables (aspeed_gpio_info as abstract
base, aspeed_2400_gpio_info, aspeed_2500_gpio_info,
aspeed_2600_1_8v_gpio_info, aspeed_2600_3_3v_gpio_info,
aspeed_1030_gpio_info, aspeed_2700_gpio_info)
directly into the 'aspeed_gpio_types[]'
array, removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/gpio/aspeed_gpio.c | 107 ++++++++++++++++++------------------------
1 file changed, 46 insertions(+), 61 deletions(-)
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index ef321b738620..1cf6f5df5505 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -1620,66 +1620,51 @@ static void aspeed_gpio_2700_class_init(ObjectClass *klass, const void *data)
agc->reg_ops = &aspeed_gpio_2700_ops;
}
-static const TypeInfo aspeed_gpio_info = {
- .name = TYPE_ASPEED_GPIO,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedGPIOState),
- .class_size = sizeof(AspeedGPIOClass),
- .class_init = aspeed_gpio_class_init,
- .abstract = true,
-};
-
-static const TypeInfo aspeed_gpio_ast2400_info = {
- .name = TYPE_ASPEED_GPIO "-ast2400",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_ast2400_class_init,
- .instance_init = aspeed_gpio_init,
-};
-
-static const TypeInfo aspeed_gpio_ast2500_info = {
- .name = TYPE_ASPEED_GPIO "-ast2500",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_2500_class_init,
- .instance_init = aspeed_gpio_init,
-};
-
-static const TypeInfo aspeed_gpio_ast2600_3_3v_info = {
- .name = TYPE_ASPEED_GPIO "-ast2600",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_ast2600_3_3v_class_init,
- .instance_init = aspeed_gpio_init,
-};
-
-static const TypeInfo aspeed_gpio_ast2600_1_8v_info = {
- .name = TYPE_ASPEED_GPIO "-ast2600-1_8v",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_ast2600_1_8v_class_init,
- .instance_init = aspeed_gpio_init,
-};
-
-static const TypeInfo aspeed_gpio_ast1030_info = {
- .name = TYPE_ASPEED_GPIO "-ast1030",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_1030_class_init,
- .instance_init = aspeed_gpio_init,
-};
-
-static const TypeInfo aspeed_gpio_ast2700_info = {
- .name = TYPE_ASPEED_GPIO "-ast2700",
- .parent = TYPE_ASPEED_GPIO,
- .class_init = aspeed_gpio_2700_class_init,
- .instance_init = aspeed_gpio_init,
+static const TypeInfo aspeed_gpio_types[] = {
+ {
+ .name = TYPE_ASPEED_GPIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedGPIOState),
+ .class_size = sizeof(AspeedGPIOClass),
+ .class_init = aspeed_gpio_class_init,
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast1030",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_1030_class_init,
+ .instance_init = aspeed_gpio_init,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast2400",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_ast2400_class_init,
+ .instance_init = aspeed_gpio_init,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast2500",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_2500_class_init,
+ .instance_init = aspeed_gpio_init,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast2600",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_ast2600_3_3v_class_init,
+ .instance_init = aspeed_gpio_init,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast2600-1_8v",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_ast2600_1_8v_class_init,
+ .instance_init = aspeed_gpio_init,
+ },
+ {
+ .name = TYPE_ASPEED_GPIO "-ast2700",
+ .parent = TYPE_ASPEED_GPIO,
+ .class_init = aspeed_gpio_2700_class_init,
+ .instance_init = aspeed_gpio_init,
+ }
};
-static void aspeed_gpio_register_types(void)
-{
- type_register_static(&aspeed_gpio_info);
- type_register_static(&aspeed_gpio_ast2400_info);
- type_register_static(&aspeed_gpio_ast2500_info);
- type_register_static(&aspeed_gpio_ast2600_3_3v_info);
- type_register_static(&aspeed_gpio_ast2600_1_8v_info);
- type_register_static(&aspeed_gpio_ast1030_info);
- type_register_static(&aspeed_gpio_ast2700_info);
-}
-
-type_init(aspeed_gpio_register_types);
+DEFINE_TYPES(aspeed_gpio_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 13/37] hw/gpio/aspeed_sgpio: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (11 preceding siblings ...)
2026-06-08 5:48 ` [PULL 12/37] hw/gpio/aspeed_gpio: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 14/37] hw/intc/aspeed_intc: convert " Cédric Le Goater
` (24 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 2 standalone TypeInfo variables (aspeed_sgpio_info and
aspeed_sgpio_ast2700_info) directly into the 'aspeed_sgpio_types[]'
array, removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-14-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/gpio/aspeed_sgpio.c | 37 ++++++++++++++++---------------------
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/hw/gpio/aspeed_sgpio.c b/hw/gpio/aspeed_sgpio.c
index 0c53b03464e4..7d2f73699520 100644
--- a/hw/gpio/aspeed_sgpio.c
+++ b/hw/gpio/aspeed_sgpio.c
@@ -321,26 +321,21 @@ static void aspeed_sgpio_2700_class_init(ObjectClass *klass, const void *data)
agc->reg_ops = &aspeed_sgpio_2700_ops;
}
-static const TypeInfo aspeed_sgpio_info = {
- .name = TYPE_ASPEED_SGPIO,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSGPIOState),
- .class_size = sizeof(AspeedSGPIOClass),
- .class_init = aspeed_sgpio_class_init,
- .abstract = true,
-};
-
-static const TypeInfo aspeed_sgpio_ast2700_info = {
- .name = TYPE_ASPEED_SGPIO "-ast2700",
- .parent = TYPE_ASPEED_SGPIO,
- .class_init = aspeed_sgpio_2700_class_init,
- .instance_init = aspeed_sgpio_init,
+static const TypeInfo aspeed_sgpio_types[] = {
+ {
+ .name = TYPE_ASPEED_SGPIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSGPIOState),
+ .class_size = sizeof(AspeedSGPIOClass),
+ .class_init = aspeed_sgpio_class_init,
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_SGPIO "-ast2700",
+ .parent = TYPE_ASPEED_SGPIO,
+ .class_init = aspeed_sgpio_2700_class_init,
+ .instance_init = aspeed_sgpio_init,
+ }
};
-static void aspeed_sgpio_register_types(void)
-{
- type_register_static(&aspeed_sgpio_info);
- type_register_static(&aspeed_sgpio_ast2700_info);
-}
-
-type_init(aspeed_sgpio_register_types);
+DEFINE_TYPES(aspeed_sgpio_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 14/37] hw/intc/aspeed_intc: convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (12 preceding siblings ...)
2026-06-08 5:48 ` [PULL 13/37] hw/gpio/aspeed_sgpio: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 15/37] hw/intc/aspeed_vic: Convert " Cédric Le Goater
` (23 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 9 standalone TypeInfo variables (aspeed_intc_info as abstract
base, aspeed_2700_intc_info, aspeed_2700_intcio_info,
aspeed_2700_intcioexp1_info, aspeed_2700_intcioexp2_info,
aspeed_2700ssp_intc_info, aspeed_2700ssp_intcio_info,
aspeed_2700tsp_intc_info, aspeed_2700tsp_intcio_info) directly into
the 'aspeed_intc_types[]' array, removing the need for separate
declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-15-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/intc/aspeed_intc.c | 121 ++++++++++++++++++------------------------
1 file changed, 51 insertions(+), 70 deletions(-)
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 389280943091..5a36fff52040 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -758,16 +758,6 @@ static void aspeed_intc_class_init(ObjectClass *klass, const void *data)
aic->reg_ops = &aspeed_intc_ops;
}
-static const TypeInfo aspeed_intc_info = {
- .name = TYPE_ASPEED_INTC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = aspeed_intc_instance_init,
- .instance_size = sizeof(AspeedINTCState),
- .class_init = aspeed_intc_class_init,
- .class_size = sizeof(AspeedINTCClass),
- .abstract = true,
-};
-
static AspeedINTCIRQ aspeed_2700_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_GICINT192_201_EN, R_GICINT192_201_STATUS},
};
@@ -788,12 +778,6 @@ static void aspeed_2700_intc_class_init(ObjectClass *klass, const void *data)
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intc_irqs);
}
-static const TypeInfo aspeed_2700_intc_info = {
- .name = TYPE_ASPEED_2700_INTC,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700_intc_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700_intcioexp2_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 8, 1, R_GICINT192_EN, R_GICINT192_STATUS},
{1, 9, 1, R_GICINT193_EN, R_GICINT193_STATUS},
@@ -817,12 +801,6 @@ static void aspeed_2700_intcioexp2_class_init(ObjectClass *klass,
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcioexp2_irqs);
}
-static const TypeInfo aspeed_2700_intcioexp2_info = {
- .name = TYPE_ASPEED_2700_INTCIOEXP2,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700_intcioexp2_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700_intcioexp1_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 6, 1, R_GICINT192_EN, R_GICINT192_STATUS},
{1, 7, 1, R_GICINT193_EN, R_GICINT193_STATUS},
@@ -846,12 +824,6 @@ static void aspeed_2700_intcioexp1_class_init(ObjectClass *klass,
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcioexp1_irqs);
}
-static const TypeInfo aspeed_2700_intcioexp1_info = {
- .name = TYPE_ASPEED_2700_INTCIOEXP1,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700_intcioexp1_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 1, R_GICINT192_EN, R_GICINT192_STATUS},
{1, 1, 1, R_GICINT193_EN, R_GICINT193_STATUS},
@@ -878,12 +850,6 @@ static void aspeed_2700_intcio_class_init(ObjectClass *klass, const void *data)
aic->irq_table_count = ARRAY_SIZE(aspeed_2700_intcio_irqs);
}
-static const TypeInfo aspeed_2700_intcio_info = {
- .name = TYPE_ASPEED_2700_INTCIO,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700_intcio_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700ssp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_SSPINT160_169_EN, R_SSPINT160_169_STATUS},
};
@@ -905,12 +871,6 @@ static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
aic->irq_table_count = ARRAY_SIZE(aspeed_2700ssp_intc_irqs);
}
-static const TypeInfo aspeed_2700ssp_intc_info = {
- .name = TYPE_ASPEED_2700SSP_INTC,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700ssp_intc_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700ssp_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 1, R_SSPINT160_EN, R_SSPINT160_STATUS},
{1, 1, 1, R_SSPINT161_EN, R_SSPINT161_STATUS},
@@ -938,12 +898,6 @@ static void aspeed_2700ssp_intcio_class_init(ObjectClass *klass,
aic->irq_table_count = ARRAY_SIZE(aspeed_2700ssp_intcio_irqs);
}
-static const TypeInfo aspeed_2700ssp_intcio_info = {
- .name = TYPE_ASPEED_2700SSP_INTCIO,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700ssp_intcio_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700tsp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_TSPINT160_169_EN, R_TSPINT160_169_STATUS},
};
@@ -965,12 +919,6 @@ static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
aic->irq_table_count = ARRAY_SIZE(aspeed_2700tsp_intc_irqs);
}
-static const TypeInfo aspeed_2700tsp_intc_info = {
- .name = TYPE_ASPEED_2700TSP_INTC,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700tsp_intc_class_init,
-};
-
static AspeedINTCIRQ aspeed_2700tsp_intcio_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 1, R_TSPINT160_EN, R_TSPINT160_STATUS},
{1, 1, 1, R_TSPINT161_EN, R_TSPINT161_STATUS},
@@ -998,23 +946,56 @@ static void aspeed_2700tsp_intcio_class_init(ObjectClass *klass,
aic->irq_table_count = ARRAY_SIZE(aspeed_2700tsp_intcio_irqs);
}
-static const TypeInfo aspeed_2700tsp_intcio_info = {
- .name = TYPE_ASPEED_2700TSP_INTCIO,
- .parent = TYPE_ASPEED_INTC,
- .class_init = aspeed_2700tsp_intcio_class_init,
+static const TypeInfo aspeed_intc_types[] = {
+ {
+ .name = TYPE_ASPEED_INTC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_intc_instance_init,
+ .instance_size = sizeof(AspeedINTCState),
+ .class_init = aspeed_intc_class_init,
+ .class_size = sizeof(AspeedINTCClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_2700_INTC,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700_intc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_INTCIO,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700_intcio_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700SSP_INTC,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700ssp_intc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700SSP_INTCIO,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700ssp_intcio_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700TSP_INTC,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700tsp_intc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700TSP_INTCIO,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700tsp_intcio_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_INTCIOEXP1,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700_intcioexp1_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_INTCIOEXP2,
+ .parent = TYPE_ASPEED_INTC,
+ .class_init = aspeed_2700_intcioexp2_class_init,
+ }
};
-static void aspeed_intc_register_types(void)
-{
- type_register_static(&aspeed_intc_info);
- type_register_static(&aspeed_2700_intc_info);
- type_register_static(&aspeed_2700_intcio_info);
- type_register_static(&aspeed_2700_intcioexp1_info);
- type_register_static(&aspeed_2700_intcioexp2_info);
- type_register_static(&aspeed_2700ssp_intc_info);
- type_register_static(&aspeed_2700ssp_intcio_info);
- type_register_static(&aspeed_2700tsp_intc_info);
- type_register_static(&aspeed_2700tsp_intcio_info);
-}
-
-type_init(aspeed_intc_register_types);
+DEFINE_TYPES(aspeed_intc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 15/37] hw/intc/aspeed_vic: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (13 preceding siblings ...)
2026-06-08 5:48 ` [PULL 14/37] hw/intc/aspeed_intc: convert " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 16/37] hw/rtc/aspeed_rtc: " Cédric Le Goater
` (22 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_vic_info' TypeInfo variable directly
into the 'aspeed_vic_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-16-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/intc/aspeed_vic.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/intc/aspeed_vic.c b/hw/intc/aspeed_vic.c
index 13d8423d835a..bd0c87802e67 100644
--- a/hw/intc/aspeed_vic.c
+++ b/hw/intc/aspeed_vic.c
@@ -349,16 +349,13 @@ static void aspeed_vic_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_aspeed_vic;
}
-static const TypeInfo aspeed_vic_info = {
- .name = TYPE_ASPEED_VIC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedVICState),
- .class_init = aspeed_vic_class_init,
+static const TypeInfo aspeed_vic_types[] = {
+ {
+ .name = TYPE_ASPEED_VIC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedVICState),
+ .class_init = aspeed_vic_class_init,
+ }
};
-static void aspeed_vic_register_types(void)
-{
- type_register_static(&aspeed_vic_info);
-}
-
-type_init(aspeed_vic_register_types);
+DEFINE_TYPES(aspeed_vic_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 16/37] hw/rtc/aspeed_rtc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (14 preceding siblings ...)
2026-06-08 5:48 ` [PULL 15/37] hw/intc/aspeed_vic: Convert " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 17/37] hw/watchdog/wdt_aspeed: " Cédric Le Goater
` (21 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_rtc_info' TypeInfo variable directly
into the 'aspeed_rtc_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-17-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/rtc/aspeed_rtc.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/rtc/aspeed_rtc.c b/hw/rtc/aspeed_rtc.c
index 5245f3f95633..34d9fcfa36c4 100644
--- a/hw/rtc/aspeed_rtc.c
+++ b/hw/rtc/aspeed_rtc.c
@@ -166,16 +166,13 @@ static void aspeed_rtc_class_init(ObjectClass *klass, const void *data)
rc->phases.hold = aspeed_rtc_reset_hold;
}
-static const TypeInfo aspeed_rtc_info = {
- .name = TYPE_ASPEED_RTC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedRtcState),
- .class_init = aspeed_rtc_class_init,
+static const TypeInfo aspeed_rtc_types[] = {
+ {
+ .name = TYPE_ASPEED_RTC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedRtcState),
+ .class_init = aspeed_rtc_class_init,
+ }
};
-static void aspeed_rtc_register_types(void)
-{
- type_register_static(&aspeed_rtc_info);
-}
-
-type_init(aspeed_rtc_register_types)
+DEFINE_TYPES(aspeed_rtc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 17/37] hw/watchdog/wdt_aspeed: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (15 preceding siblings ...)
2026-06-08 5:48 ` [PULL 16/37] hw/rtc/aspeed_rtc: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 18/37] hw/nvram/aspeed_otp: " Cédric Le Goater
` (20 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 6 standalone TypeInfo variables (aspeed_wdt_info as abstract
base, aspeed_2400_wdt_info, aspeed_2500_wdt_info, aspeed_2600_wdt_info,
aspeed_1030_wdt_info, aspeed_2700_wdt_info) directly into the
'aspeed_wdt_types[]' array, removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-18-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/watchdog/wdt_aspeed.c | 93 +++++++++++++++++-----------------------
1 file changed, 40 insertions(+), 53 deletions(-)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index ae411593c583..deed970c89b9 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -321,15 +321,6 @@ static void aspeed_wdt_class_init(ObjectClass *klass, const void *data)
dc->desc = "Aspeed watchdog device";
}
-static const TypeInfo aspeed_wdt_info = {
- .parent = TYPE_SYS_BUS_DEVICE,
- .name = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_wdt_class_init,
- .class_size = sizeof(AspeedWDTClass),
- .abstract = true,
-};
-
static void aspeed_2400_wdt_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -345,13 +336,6 @@ static void aspeed_2400_wdt_class_init(ObjectClass *klass, const void *data)
awc->default_reload_value = 0x03EF1480;
}
-static const TypeInfo aspeed_2400_wdt_info = {
- .name = TYPE_ASPEED_2400_WDT,
- .parent = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_2400_wdt_class_init,
-};
-
static void aspeed_2500_wdt_reset_pulse(AspeedWDTState *s, uint32_t property)
{
if (property) {
@@ -383,13 +367,6 @@ static void aspeed_2500_wdt_class_init(ObjectClass *klass, const void *data)
awc->default_reload_value = 0x014FB180;
}
-static const TypeInfo aspeed_2500_wdt_info = {
- .name = TYPE_ASPEED_2500_WDT,
- .parent = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_2500_wdt_class_init,
-};
-
static void aspeed_2600_wdt_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -406,13 +383,6 @@ static void aspeed_2600_wdt_class_init(ObjectClass *klass, const void *data)
awc->default_reload_value = 0x014FB180;
}
-static const TypeInfo aspeed_2600_wdt_info = {
- .name = TYPE_ASPEED_2600_WDT,
- .parent = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_2600_wdt_class_init,
-};
-
static void aspeed_1030_wdt_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -429,13 +399,6 @@ static void aspeed_1030_wdt_class_init(ObjectClass *klass, const void *data)
awc->default_reload_value = 0x014FB180;
}
-static const TypeInfo aspeed_1030_wdt_info = {
- .name = TYPE_ASPEED_1030_WDT,
- .parent = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_1030_wdt_class_init,
-};
-
static void aspeed_2700_wdt_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -452,21 +415,45 @@ static void aspeed_2700_wdt_class_init(ObjectClass *klass, const void *data)
awc->default_reload_value = 0x014FB180;
}
-static const TypeInfo aspeed_2700_wdt_info = {
- .name = TYPE_ASPEED_2700_WDT,
- .parent = TYPE_ASPEED_WDT,
- .instance_size = sizeof(AspeedWDTState),
- .class_init = aspeed_2700_wdt_class_init,
+static const TypeInfo aspeed_wdt_types[] = {
+ {
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .name = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_wdt_class_init,
+ .class_size = sizeof(AspeedWDTClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_1030_WDT,
+ .parent = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_1030_wdt_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2400_WDT,
+ .parent = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_2400_wdt_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_WDT,
+ .parent = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_2500_wdt_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_WDT,
+ .parent = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_2600_wdt_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_WDT,
+ .parent = TYPE_ASPEED_WDT,
+ .instance_size = sizeof(AspeedWDTState),
+ .class_init = aspeed_2700_wdt_class_init,
+ }
};
-static void wdt_aspeed_register_types(void)
-{
- type_register_static(&aspeed_wdt_info);
- type_register_static(&aspeed_2400_wdt_info);
- type_register_static(&aspeed_2500_wdt_info);
- type_register_static(&aspeed_2600_wdt_info);
- type_register_static(&aspeed_2700_wdt_info);
- type_register_static(&aspeed_1030_wdt_info);
-}
-
-type_init(wdt_aspeed_register_types)
+DEFINE_TYPES(aspeed_wdt_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 18/37] hw/nvram/aspeed_otp: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (16 preceding siblings ...)
2026-06-08 5:48 ` [PULL 17/37] hw/watchdog/wdt_aspeed: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 19/37] hw/timer/aspeed_timer: " Cédric Le Goater
` (19 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline the standalone 'aspeed_otp_info' TypeInfo variable directly
into the 'aspeed_otp_types[]' array, removing the need for a separate
declaration.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-19-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/nvram/aspeed_otp.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/nvram/aspeed_otp.c b/hw/nvram/aspeed_otp.c
index 1a9d3841b8d6..81304bda3abe 100644
--- a/hw/nvram/aspeed_otp.c
+++ b/hw/nvram/aspeed_otp.c
@@ -174,16 +174,13 @@ static void aspeed_otp_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_otp_properties);
}
-static const TypeInfo aspeed_otp_info = {
- .name = TYPE_ASPEED_OTP,
- .parent = TYPE_DEVICE,
- .instance_size = sizeof(AspeedOTPState),
- .class_init = aspeed_otp_class_init,
+static const TypeInfo aspeed_otp_types[] = {
+ {
+ .name = TYPE_ASPEED_OTP,
+ .parent = TYPE_DEVICE,
+ .instance_size = sizeof(AspeedOTPState),
+ .class_init = aspeed_otp_class_init,
+ }
};
-static void aspeed_otp_register_types(void)
-{
- type_register_static(&aspeed_otp_info);
-}
-
-type_init(aspeed_otp_register_types)
+DEFINE_TYPES(aspeed_otp_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 19/37] hw/timer/aspeed_timer: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (17 preceding siblings ...)
2026-06-08 5:48 ` [PULL 18/37] hw/nvram/aspeed_otp: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 20/37] hw/fsi/aspeed_apb2opb: " Cédric Le Goater
` (18 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 6 standalone TypeInfo variables (aspeed_timer_info as abstract
base, aspeed_2400_timer_info, aspeed_2500_timer_info,
aspeed_2600_timer_info, aspeed_1030_timer_info, aspeed_2700_timer_info)
directly into the 'aspeed_timer_types[]' array, removing the need for
separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-20-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/timer/aspeed_timer.c | 83 +++++++++++++++++------------------------
1 file changed, 35 insertions(+), 48 deletions(-)
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 69f5c89215c5..a607736387c8 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -907,15 +907,6 @@ static void timer_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_timer_properties);
}
-static const TypeInfo aspeed_timer_info = {
- .name = TYPE_ASPEED_TIMER,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedTimerCtrlState),
- .class_init = timer_class_init,
- .class_size = sizeof(AspeedTimerClass),
- .abstract = true,
-};
-
static void aspeed_2400_timer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -926,12 +917,6 @@ static void aspeed_2400_timer_class_init(ObjectClass *klass, const void *data)
awc->write = aspeed_2400_timer_write;
}
-static const TypeInfo aspeed_2400_timer_info = {
- .name = TYPE_ASPEED_2400_TIMER,
- .parent = TYPE_ASPEED_TIMER,
- .class_init = aspeed_2400_timer_class_init,
-};
-
static void aspeed_2500_timer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -942,12 +927,6 @@ static void aspeed_2500_timer_class_init(ObjectClass *klass, const void *data)
awc->write = aspeed_2500_timer_write;
}
-static const TypeInfo aspeed_2500_timer_info = {
- .name = TYPE_ASPEED_2500_TIMER,
- .parent = TYPE_ASPEED_TIMER,
- .class_init = aspeed_2500_timer_class_init,
-};
-
static void aspeed_2600_timer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -958,12 +937,6 @@ static void aspeed_2600_timer_class_init(ObjectClass *klass, const void *data)
awc->write = aspeed_2600_timer_write;
}
-static const TypeInfo aspeed_2600_timer_info = {
- .name = TYPE_ASPEED_2600_TIMER,
- .parent = TYPE_ASPEED_TIMER,
- .class_init = aspeed_2600_timer_class_init,
-};
-
static void aspeed_1030_timer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -974,12 +947,6 @@ static void aspeed_1030_timer_class_init(ObjectClass *klass, const void *data)
awc->write = aspeed_2600_timer_write;
}
-static const TypeInfo aspeed_1030_timer_info = {
- .name = TYPE_ASPEED_1030_TIMER,
- .parent = TYPE_ASPEED_TIMER,
- .class_init = aspeed_1030_timer_class_init,
-};
-
static void aspeed_2700_timer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -990,20 +957,40 @@ static void aspeed_2700_timer_class_init(ObjectClass *klass, const void *data)
awc->write = aspeed_2700_timer_write;
}
-static const TypeInfo aspeed_2700_timer_info = {
- .name = TYPE_ASPEED_2700_TIMER,
- .parent = TYPE_ASPEED_TIMER,
- .class_init = aspeed_2700_timer_class_init,
+static const TypeInfo aspeed_timer_types[] = {
+ {
+ .name = TYPE_ASPEED_TIMER,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedTimerCtrlState),
+ .class_init = timer_class_init,
+ .class_size = sizeof(AspeedTimerClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_1030_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_1030_timer_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2400_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_2400_timer_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_2500_timer_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_2600_timer_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_TIMER,
+ .parent = TYPE_ASPEED_TIMER,
+ .class_init = aspeed_2700_timer_class_init,
+ }
};
-static void aspeed_timer_register_types(void)
-{
- type_register_static(&aspeed_timer_info);
- type_register_static(&aspeed_2400_timer_info);
- type_register_static(&aspeed_2500_timer_info);
- type_register_static(&aspeed_2600_timer_info);
- type_register_static(&aspeed_1030_timer_info);
- type_register_static(&aspeed_2700_timer_info);
-}
-
-type_init(aspeed_timer_register_types)
+DEFINE_TYPES(aspeed_timer_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 20/37] hw/fsi/aspeed_apb2opb: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (18 preceding siblings ...)
2026-06-08 5:48 ` [PULL 19/37] hw/timer/aspeed_timer: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 21/37] hw/pci-host/aspeed_pcie: " Cédric Le Goater
` (17 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
This file contains two independent subsystems (aspeed_apb2opb and
fsi_opb), each with its own type_init() call. Both are converted to
separate DEFINE_TYPES() blocks to preserve the original registration
boundary.
Inline the standalone 'aspeed_apb2opb_info' and 'fsi_opb_info'
TypeInfo variables directly into their respective types arrays,
removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-21-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/fsi/aspeed_apb2opb.c | 42 ++++++++++++++++++-----------------------
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/hw/fsi/aspeed_apb2opb.c b/hw/fsi/aspeed_apb2opb.c
index f2d9a9669ada..7a37770a4303 100644
--- a/hw/fsi/aspeed_apb2opb.c
+++ b/hw/fsi/aspeed_apb2opb.c
@@ -319,20 +319,17 @@ static void fsi_aspeed_apb2opb_class_init(ObjectClass *klass, const void *data)
rc->phases.hold = fsi_aspeed_apb2opb_reset_hold;
}
-static const TypeInfo aspeed_apb2opb_info = {
- .name = TYPE_ASPEED_APB2OPB,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = fsi_aspeed_apb2opb_init,
- .instance_size = sizeof(AspeedAPB2OPBState),
- .class_init = fsi_aspeed_apb2opb_class_init,
+static const TypeInfo aspeed_apb2opb_types[] = {
+ {
+ .name = TYPE_ASPEED_APB2OPB,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = fsi_aspeed_apb2opb_init,
+ .instance_size = sizeof(AspeedAPB2OPBState),
+ .class_init = fsi_aspeed_apb2opb_class_init,
+ }
};
-static void aspeed_apb2opb_register_types(void)
-{
- type_register_static(&aspeed_apb2opb_info);
-}
-
-type_init(aspeed_apb2opb_register_types);
+DEFINE_TYPES(aspeed_apb2opb_types)
static void fsi_opb_init(Object *o)
{
@@ -363,17 +360,14 @@ static void fsi_opb_class_init(ObjectClass *klass, const void *data)
bc->unrealize = fsi_opb_unrealize;
}
-static const TypeInfo opb_info = {
- .name = TYPE_OP_BUS,
- .parent = TYPE_BUS,
- .instance_init = fsi_opb_init,
- .instance_size = sizeof(OPBus),
- .class_init = fsi_opb_class_init,
+static const TypeInfo fsi_opb_types[] = {
+ {
+ .name = TYPE_OP_BUS,
+ .parent = TYPE_BUS,
+ .instance_init = fsi_opb_init,
+ .instance_size = sizeof(OPBus),
+ .class_init = fsi_opb_class_init,
+ }
};
-static void fsi_opb_register_types(void)
-{
- type_register_static(&opb_info);
-}
-
-type_init(fsi_opb_register_types);
+DEFINE_TYPES(fsi_opb_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 21/37] hw/pci-host/aspeed_pcie: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (19 preceding siblings ...)
2026-06-08 5:48 ` [PULL 20/37] hw/fsi/aspeed_apb2opb: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 22/37] hw/i2c/aspeed_i2c: " Cédric Le Goater
` (16 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 6 standalone TypeInfo variables (aspeed_pcie_phy_info, aspeed_2700_pcie_phy_info
aspeed_pcie_root_port_info, aspeed_pcie_rc_info, aspeed_pcie_cfg_info and
aspeed_2700_pcie_cfg_info directly into the 'aspeed_pcie_types[]'
array, removing the need for separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-22-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/pci-host/aspeed_pcie.c | 94 +++++++++++++++++----------------------
1 file changed, 41 insertions(+), 53 deletions(-)
diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c
index 186e5aeea298..b46eb74234bb 100644
--- a/hw/pci-host/aspeed_pcie.c
+++ b/hw/pci-host/aspeed_pcie.c
@@ -83,13 +83,6 @@ static void aspeed_pcie_root_port_class_init(ObjectClass *klass,
rpc->ssid = 0x1150;
}
-static const TypeInfo aspeed_pcie_root_port_info = {
- .name = TYPE_ASPEED_PCIE_ROOT_PORT,
- .parent = TYPE_PCIE_ROOT_PORT,
- .instance_size = sizeof(AspeedPCIERootPortState),
- .class_init = aspeed_pcie_root_port_class_init,
-};
-
/*
* PCIe Root Complex (RC)
*/
@@ -305,14 +298,6 @@ static void aspeed_pcie_rc_class_init(ObjectClass *klass, const void *data)
msi_nonbroken = true;
}
-static const TypeInfo aspeed_pcie_rc_info = {
- .name = TYPE_ASPEED_PCIE_RC,
- .parent = TYPE_PCIE_HOST_BRIDGE,
- .instance_size = sizeof(AspeedPCIERcState),
- .instance_init = aspeed_pcie_rc_instance_init,
- .class_init = aspeed_pcie_rc_class_init,
-};
-
/*
* PCIe Config
*
@@ -679,15 +664,6 @@ static void aspeed_pcie_cfg_class_init(ObjectClass *klass, const void *data)
apc->rc_rp_addr = PCI_DEVFN(8, 0);
}
-static const TypeInfo aspeed_pcie_cfg_info = {
- .name = TYPE_ASPEED_PCIE_CFG,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = aspeed_pcie_cfg_instance_init,
- .instance_size = sizeof(AspeedPCIECfgState),
- .class_init = aspeed_pcie_cfg_class_init,
- .class_size = sizeof(AspeedPCIECfgClass),
-};
-
static void aspeed_2700_pcie_cfg_write(void *opaque, hwaddr addr,
uint64_t data, unsigned int size)
{
@@ -798,12 +774,6 @@ static void aspeed_2700_pcie_cfg_class_init(ObjectClass *klass,
apc->rc_rp_addr = PCI_DEVFN(0, 0);
}
-static const TypeInfo aspeed_2700_pcie_cfg_info = {
- .name = TYPE_ASPEED_2700_PCIE_CFG,
- .parent = TYPE_ASPEED_PCIE_CFG,
- .class_init = aspeed_2700_pcie_cfg_class_init,
-};
-
/*
* PCIe PHY
*
@@ -926,14 +896,6 @@ static void aspeed_pcie_phy_class_init(ObjectClass *klass, const void *data)
apc->nr_regs = 0x100 >> 2;
}
-static const TypeInfo aspeed_pcie_phy_info = {
- .name = TYPE_ASPEED_PCIE_PHY,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedPCIEPhyState),
- .class_init = aspeed_pcie_phy_class_init,
- .class_size = sizeof(AspeedPCIEPhyClass),
-};
-
static void aspeed_2700_pcie_phy_reset_hold(Object *obj, ResetType type)
{
AspeedPCIEPhyState *s = ASPEED_PCIE_PHY(obj);
@@ -961,21 +923,47 @@ static void aspeed_2700_pcie_phy_class_init(ObjectClass *klass,
apc->nr_regs = 0x800 >> 2;
}
-static const TypeInfo aspeed_2700_pcie_phy_info = {
- .name = TYPE_ASPEED_2700_PCIE_PHY,
- .parent = TYPE_ASPEED_PCIE_PHY,
- .class_init = aspeed_2700_pcie_phy_class_init,
-};
+static const TypeInfo aspeed_pcie_types[] = {
+ {
+ .name = TYPE_ASPEED_PCIE_RC,
+ .parent = TYPE_PCIE_HOST_BRIDGE,
+ .instance_size = sizeof(AspeedPCIERcState),
+ .instance_init = aspeed_pcie_rc_instance_init,
+ .class_init = aspeed_pcie_rc_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_PCIE_ROOT_PORT,
+ .parent = TYPE_PCIE_ROOT_PORT,
+ .instance_size = sizeof(AspeedPCIERootPortState),
+ .class_init = aspeed_pcie_root_port_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_PCIE_CFG,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_pcie_cfg_instance_init,
+ .instance_size = sizeof(AspeedPCIECfgState),
+ .class_init = aspeed_pcie_cfg_class_init,
+ .class_size = sizeof(AspeedPCIECfgClass),
+ },
+ {
+ .name = TYPE_ASPEED_PCIE_PHY,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedPCIEPhyState),
+ .class_init = aspeed_pcie_phy_class_init,
+ .class_size = sizeof(AspeedPCIEPhyClass),
+ },
+ {
+ .name = TYPE_ASPEED_2700_PCIE_PHY,
+ .parent = TYPE_ASPEED_PCIE_PHY,
+ .class_init = aspeed_2700_pcie_phy_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_PCIE_CFG,
+ .parent = TYPE_ASPEED_PCIE_CFG,
+ .class_init = aspeed_2700_pcie_cfg_class_init,
+ }
-static void aspeed_pcie_register_types(void)
-{
- type_register_static(&aspeed_pcie_rc_info);
- type_register_static(&aspeed_pcie_root_port_info);
- type_register_static(&aspeed_pcie_cfg_info);
- type_register_static(&aspeed_2700_pcie_cfg_info);
- type_register_static(&aspeed_pcie_phy_info);
- type_register_static(&aspeed_2700_pcie_phy_info);
-}
+};
-type_init(aspeed_pcie_register_types);
+DEFINE_TYPES(aspeed_pcie_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 22/37] hw/i2c/aspeed_i2c: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (20 preceding siblings ...)
2026-06-08 5:48 ` [PULL 21/37] hw/pci-host/aspeed_pcie: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 23/37] hw/net/ftgmac100: " Cédric Le Goater
` (15 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 9 standalone TypeInfo variables (aspeed_i2c_bus_info,
aspeed_i2c_bus_slave_info, aspeed_i2c_info as abstract base,
aspeed_2400_i2c_info, aspeed_2500_i2c_info, aspeed_2600_i2c_info,
aspeed_1030_i2c_info and aspeed_2700_i2c_info) directly into the
'aspeed_i2c_types[]' array, removing the need for
separate declarations.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-23-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/i2c/aspeed_i2c.c | 113 +++++++++++++++++++-------------------------
1 file changed, 48 insertions(+), 65 deletions(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 80c445750059..4a6732a18554 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1372,16 +1372,6 @@ static void aspeed_i2c_class_init(ObjectClass *klass, const void *data)
dc->desc = "Aspeed I2C Controller";
}
-static const TypeInfo aspeed_i2c_info = {
- .name = TYPE_ASPEED_I2C,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = aspeed_i2c_instance_init,
- .instance_size = sizeof(AspeedI2CState),
- .class_init = aspeed_i2c_class_init,
- .class_size = sizeof(AspeedI2CClass),
- .abstract = true,
-};
-
static int aspeed_i2c_bus_new_slave_event(AspeedI2CBus *bus,
enum i2c_event event)
{
@@ -1500,13 +1490,6 @@ static void aspeed_i2c_bus_slave_class_init(ObjectClass *klass,
sc->send_async = aspeed_i2c_bus_slave_send_async;
}
-static const TypeInfo aspeed_i2c_bus_slave_info = {
- .name = TYPE_ASPEED_I2C_BUS_SLAVE,
- .parent = TYPE_I2C_SLAVE,
- .instance_size = sizeof(AspeedI2CBusSlave),
- .class_init = aspeed_i2c_bus_slave_class_init,
-};
-
static void aspeed_i2c_bus_reset_hold(Object *obj, ResetType type)
{
AspeedI2CBus *s = ASPEED_I2C_BUS(obj);
@@ -1565,13 +1548,6 @@ static void aspeed_i2c_bus_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_i2c_bus_properties);
}
-static const TypeInfo aspeed_i2c_bus_info = {
- .name = TYPE_ASPEED_I2C_BUS,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedI2CBus),
- .class_init = aspeed_i2c_bus_class_init,
-};
-
static qemu_irq aspeed_2400_i2c_bus_get_irq(AspeedI2CBus *bus)
{
return bus->controller->irq;
@@ -1605,12 +1581,6 @@ static void aspeed_2400_i2c_class_init(ObjectClass *klass, const void *data)
aic->mem_size = 0x1000;
}
-static const TypeInfo aspeed_2400_i2c_info = {
- .name = TYPE_ASPEED_2400_I2C,
- .parent = TYPE_ASPEED_I2C,
- .class_init = aspeed_2400_i2c_class_init,
-};
-
static qemu_irq aspeed_2500_i2c_bus_get_irq(AspeedI2CBus *bus)
{
return bus->controller->irq;
@@ -1640,12 +1610,6 @@ static void aspeed_2500_i2c_class_init(ObjectClass *klass, const void *data)
aic->mem_size = 0x1000;
}
-static const TypeInfo aspeed_2500_i2c_info = {
- .name = TYPE_ASPEED_2500_I2C,
- .parent = TYPE_ASPEED_I2C,
- .class_init = aspeed_2500_i2c_class_init,
-};
-
static qemu_irq aspeed_2600_i2c_bus_get_irq(AspeedI2CBus *bus)
{
return bus->irq;
@@ -1669,12 +1633,6 @@ static void aspeed_2600_i2c_class_init(ObjectClass *klass, const void *data)
aic->mem_size = 0x1000;
}
-static const TypeInfo aspeed_2600_i2c_info = {
- .name = TYPE_ASPEED_2600_I2C,
- .parent = TYPE_ASPEED_I2C,
- .class_init = aspeed_2600_i2c_class_init,
-};
-
static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1693,12 +1651,6 @@ static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
aic->mem_size = 0x10000;
}
-static const TypeInfo aspeed_1030_i2c_info = {
- .name = TYPE_ASPEED_1030_I2C,
- .parent = TYPE_ASPEED_I2C,
- .class_init = aspeed_1030_i2c_class_init,
-};
-
static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1720,25 +1672,56 @@ static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
aic->has_dma64 = true;
}
-static const TypeInfo aspeed_2700_i2c_info = {
- .name = TYPE_ASPEED_2700_I2C,
- .parent = TYPE_ASPEED_I2C,
- .class_init = aspeed_2700_i2c_class_init,
+static const TypeInfo aspeed_i2c_types[] = {
+ {
+ .name = TYPE_ASPEED_I2C_BUS,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedI2CBus),
+ .class_init = aspeed_i2c_bus_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_I2C_BUS_SLAVE,
+ .parent = TYPE_I2C_SLAVE,
+ .instance_size = sizeof(AspeedI2CBusSlave),
+ .class_init = aspeed_i2c_bus_slave_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_I2C,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_i2c_instance_init,
+ .instance_size = sizeof(AspeedI2CState),
+ .class_init = aspeed_i2c_class_init,
+ .class_size = sizeof(AspeedI2CClass),
+ .abstract = true,
+ },
+ {
+ .name = TYPE_ASPEED_1030_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_1030_i2c_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2400_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_2400_i2c_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2500_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_2500_i2c_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2600_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_2600_i2c_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_2700_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_2700_i2c_class_init,
+ }
};
-static void aspeed_i2c_register_types(void)
-{
- type_register_static(&aspeed_i2c_bus_info);
- type_register_static(&aspeed_i2c_bus_slave_info);
- type_register_static(&aspeed_i2c_info);
- type_register_static(&aspeed_2400_i2c_info);
- type_register_static(&aspeed_2500_i2c_info);
- type_register_static(&aspeed_2600_i2c_info);
- type_register_static(&aspeed_1030_i2c_info);
- type_register_static(&aspeed_2700_i2c_info);
-}
-
-type_init(aspeed_i2c_register_types)
+DEFINE_TYPES(aspeed_i2c_types)
I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 23/37] hw/net/ftgmac100: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (21 preceding siblings ...)
2026-06-08 5:48 ` [PULL 22/37] hw/i2c/aspeed_i2c: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 24/37] hw/ssi/aspeed_smc: " Cédric Le Goater
` (14 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 2 standalone TypeInfo variables (ftgmac100_info,
aspeed_mii_info) directly into the 'ftgmac100_types[]' array,
removing the need for separate declarations. Note that this file
covers both the Faraday FTGMAC100 Gigabit Ethernet controller and
the Aspeed MII controller, which share the same type registration.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-24-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/net/ftgmac100.c | 32 ++++++++++++++------------------
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 2bec817b9dec..a53c840c3725 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -1279,12 +1279,6 @@ static void ftgmac100_class_init(ObjectClass *klass, const void *data)
dc->desc = "Faraday FTGMAC100 Gigabit Ethernet emulation";
}
-static const TypeInfo ftgmac100_info = {
- .name = TYPE_FTGMAC100,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(FTGMAC100State),
- .class_init = ftgmac100_class_init,
-};
/*
* AST2600 MII controller
@@ -1438,17 +1432,19 @@ static void aspeed_mii_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_mii_properties);
}
-static const TypeInfo aspeed_mii_info = {
- .name = TYPE_ASPEED_MII,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedMiiState),
- .class_init = aspeed_mii_class_init,
+static const TypeInfo ftgmac100_types[] = {
+ {
+ .name = TYPE_FTGMAC100,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(FTGMAC100State),
+ .class_init = ftgmac100_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_MII,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedMiiState),
+ .class_init = aspeed_mii_class_init,
+ }
};
-static void ftgmac100_register_types(void)
-{
- type_register_static(&ftgmac100_info);
- type_register_static(&aspeed_mii_info);
-}
-
-type_init(ftgmac100_register_types)
+DEFINE_TYPES(ftgmac100_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 24/37] hw/ssi/aspeed_smc: Convert to DEFINE_TYPES() with inlined TypeInfo
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (22 preceding siblings ...)
2026-06-08 5:48 ` [PULL 23/37] hw/net/ftgmac100: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 25/37] hw/i2c/aspeed_i2c: Introduce dma_addr_lo_mask to unify DMA address handling Cédric Le Goater
` (13 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Replace the legacy type_register_static()/type_init() registration
pattern with the modern DEFINE_TYPES() macro.
Inline 18 standalone TypeInfo variables (aspeed_smc_flash_info,
aspeed_smc_info as abstract base, aspeed_2400_smc_info,
aspeed_2400_fmc_info, aspeed_2400_spi1_info, aspeed_2500_fmc_info,
aspeed_2500_spi1_info, aspeed_2500_spi2_info, aspeed_2600_fmc_info,
aspeed_2600_spi1_info, aspeed_2600_spi2_info, aspeed_1030_fmc_info,
aspeed_1030_spi1_info, aspeed_1030_spi2_info, aspeed_2700_fmc_info,
aspeed_2700_spi0_info, aspeed_2700_spi1_info, aspeed_2700_spi2_info)
directly into the 'aspeed_smc_types[]' array, removing the need for
separate declarations.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260601024959.2347639-25-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/ssi/aspeed_smc.c | 228 +++++++++++++++++++-------------------------
1 file changed, 96 insertions(+), 132 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 3767ad0c7a3e..d87fbd798c62 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -1312,16 +1312,6 @@ static void aspeed_smc_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_aspeed_smc;
}
-static const TypeInfo aspeed_smc_info = {
- .name = TYPE_ASPEED_SMC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = aspeed_smc_instance_init,
- .instance_size = sizeof(AspeedSMCState),
- .class_size = sizeof(AspeedSMCClass),
- .class_init = aspeed_smc_class_init,
- .abstract = true,
-};
-
static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
{
AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
@@ -1358,13 +1348,6 @@ static void aspeed_smc_flash_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, aspeed_smc_flash_properties);
}
-static const TypeInfo aspeed_smc_flash_info = {
- .name = TYPE_ASPEED_SMC_FLASH,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(AspeedSMCFlash),
- .class_init = aspeed_smc_flash_class_init,
-};
-
/*
* The Segment Registers of the AST2400 and AST2500 have a 8MB
* unit. The address range of a flash SPI peripheral is encoded with
@@ -1415,12 +1398,6 @@ static void aspeed_2400_smc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2400_smc_info = {
- .name = "aspeed.smc-ast2400",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2400_smc_class_init,
-};
-
static const uint32_t aspeed_2400_fmc_resets[ASPEED_SMC_R_MAX] = {
/*
* CE0 and CE1 types are HW strapped in SCU70. Do it here to
@@ -1466,12 +1443,6 @@ static void aspeed_2400_fmc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2400_fmc_info = {
- .name = "aspeed.fmc-ast2400",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2400_fmc_class_init,
-};
-
static const AspeedSegments aspeed_2400_spi1_segments[] = {
{ 0x30000000, 64 * MiB },
};
@@ -1506,12 +1477,6 @@ static void aspeed_2400_spi1_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2400_spi1_info = {
- .name = "aspeed.spi1-ast2400",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2400_spi1_class_init,
-};
-
static const uint32_t aspeed_2500_fmc_resets[ASPEED_SMC_R_MAX] = {
[R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 |
CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1),
@@ -1552,12 +1517,6 @@ static void aspeed_2500_fmc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2500_fmc_info = {
- .name = "aspeed.fmc-ast2500",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2500_fmc_class_init,
-};
-
static const AspeedSegments aspeed_2500_spi1_segments[] = {
{ 0x30000000, 32 * MiB }, /* start address is readonly */
{ 0x32000000, 96 * MiB }, /* end address is readonly */
@@ -1588,12 +1547,6 @@ static void aspeed_2500_spi1_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2500_spi1_info = {
- .name = "aspeed.spi1-ast2500",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2500_spi1_class_init,
-};
-
static const AspeedSegments aspeed_2500_spi2_segments[] = {
{ 0x38000000, 32 * MiB }, /* start address is readonly */
{ 0x3A000000, 96 * MiB }, /* end address is readonly */
@@ -1624,12 +1577,6 @@ static void aspeed_2500_spi2_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2500_spi2_info = {
- .name = "aspeed.spi2-ast2500",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2500_spi2_class_init,
-};
-
/*
* The Segment Registers of the AST2600 have a 1MB unit. The address
* range of a flash SPI peripheral is encoded with offsets in the overall
@@ -1712,12 +1659,6 @@ static void aspeed_2600_fmc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2600_fmc_info = {
- .name = "aspeed.fmc-ast2600",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2600_fmc_class_init,
-};
-
static const AspeedSegments aspeed_2600_spi1_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -1752,12 +1693,6 @@ static void aspeed_2600_spi1_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2600_spi1_info = {
- .name = "aspeed.spi1-ast2600",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2600_spi1_class_init,
-};
-
static const AspeedSegments aspeed_2600_spi2_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -1793,12 +1728,6 @@ static void aspeed_2600_spi2_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_2600_spi2_info = {
- .name = "aspeed.spi2-ast2600",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2600_spi2_class_init,
-};
-
/*
* The FMC Segment Registers of the AST1030 have a 512KB unit.
* Only bits [27:19] are used for decoding.
@@ -1877,12 +1806,6 @@ static void aspeed_1030_fmc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_1030_fmc_info = {
- .name = "aspeed.fmc-ast1030",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_1030_fmc_class_init,
-};
-
static const AspeedSegments aspeed_1030_spi1_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -1916,11 +1839,6 @@ static void aspeed_1030_spi1_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_1030_spi1_info = {
- .name = "aspeed.spi1-ast1030",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_1030_spi1_class_init,
-};
static const AspeedSegments aspeed_1030_spi2_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -1954,12 +1872,6 @@ static void aspeed_1030_spi2_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_smc_flash_ops;
}
-static const TypeInfo aspeed_1030_spi2_info = {
- .name = "aspeed.spi2-ast1030",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_1030_spi2_class_init,
-};
-
/*
* The FMC Segment Registers of the AST2700 have a 64KB unit.
* Only bits [31:16] are used for decoding.
@@ -2061,12 +1973,6 @@ static void aspeed_2700_fmc_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_2700_smc_flash_ops;
}
-static const TypeInfo aspeed_2700_fmc_info = {
- .name = "aspeed.fmc-ast2700",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2700_fmc_class_init,
-};
-
static const AspeedSegments aspeed_2700_spi0_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 128 * MiB, 128 * MiB }, /* start address is readonly */
@@ -2102,12 +2008,6 @@ static void aspeed_2700_spi0_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_2700_smc_flash_ops;
}
-static const TypeInfo aspeed_2700_spi0_info = {
- .name = "aspeed.spi0-ast2700",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2700_spi0_class_init,
-};
-
static const AspeedSegments aspeed_2700_spi1_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -2142,12 +2042,6 @@ static void aspeed_2700_spi1_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_2700_smc_flash_ops;
}
-static const TypeInfo aspeed_2700_spi1_info = {
- .name = "aspeed.spi1-ast2700",
- .parent = TYPE_ASPEED_SMC,
- .class_init = aspeed_2700_spi1_class_init,
-};
-
static const AspeedSegments aspeed_2700_spi2_segments[] = {
{ 0x0, 128 * MiB }, /* start address is readonly */
{ 0x0, 0 }, /* disabled */
@@ -2182,32 +2076,102 @@ static void aspeed_2700_spi2_class_init(ObjectClass *klass, const void *data)
asc->reg_ops = &aspeed_2700_smc_flash_ops;
}
-static const TypeInfo aspeed_2700_spi2_info = {
- .name = "aspeed.spi2-ast2700",
- .parent = TYPE_ASPEED_SMC,
+static const TypeInfo aspeed_smc_types[] = {
+ {
+ .name = TYPE_ASPEED_SMC_FLASH,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSMCFlash),
+ .class_init = aspeed_smc_flash_class_init,
+ },
+ {
+ .name = TYPE_ASPEED_SMC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_smc_instance_init,
+ .instance_size = sizeof(AspeedSMCState),
+ .class_size = sizeof(AspeedSMCClass),
+ .class_init = aspeed_smc_class_init,
+ .abstract = true,
+ },
+ {
+ .name = "aspeed.fmc-ast1030",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_1030_fmc_class_init,
+ },
+ {
+ .name = "aspeed.spi1-ast1030",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_1030_spi1_class_init,
+ },
+ {
+ .name = "aspeed.spi2-ast1030",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_1030_spi2_class_init,
+ },
+ {
+ .name = "aspeed.smc-ast2400",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2400_smc_class_init,
+ },
+ {
+ .name = "aspeed.fmc-ast2400",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2400_fmc_class_init,
+ },
+ {
+ .name = "aspeed.spi1-ast2400",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2400_spi1_class_init,
+ },
+ {
+ .name = "aspeed.fmc-ast2500",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2500_fmc_class_init,
+ },
+ {
+ .name = "aspeed.spi1-ast2500",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2500_spi1_class_init,
+ },
+ {
+ .name = "aspeed.spi2-ast2500",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2500_spi2_class_init,
+ },
+ {
+ .name = "aspeed.fmc-ast2600",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2600_fmc_class_init,
+ },
+ {
+ .name = "aspeed.spi1-ast2600",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2600_spi1_class_init,
+ },
+ {
+ .name = "aspeed.spi2-ast2600",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2600_spi2_class_init,
+ },
+ {
+ .name = "aspeed.fmc-ast2700",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2700_fmc_class_init,
+ },
+ {
+ .name = "aspeed.spi0-ast2700",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2700_spi0_class_init,
+ },
+ {
+ .name = "aspeed.spi1-ast2700",
+ .parent = TYPE_ASPEED_SMC,
+ .class_init = aspeed_2700_spi1_class_init,
+ },
+ {
+ .name = "aspeed.spi2-ast2700",
+ .parent = TYPE_ASPEED_SMC,
.class_init = aspeed_2700_spi2_class_init,
+ }
};
-static void aspeed_smc_register_types(void)
-{
- type_register_static(&aspeed_smc_flash_info);
- type_register_static(&aspeed_smc_info);
- type_register_static(&aspeed_2400_smc_info);
- type_register_static(&aspeed_2400_fmc_info);
- type_register_static(&aspeed_2400_spi1_info);
- type_register_static(&aspeed_2500_fmc_info);
- type_register_static(&aspeed_2500_spi1_info);
- type_register_static(&aspeed_2500_spi2_info);
- type_register_static(&aspeed_2600_fmc_info);
- type_register_static(&aspeed_2600_spi1_info);
- type_register_static(&aspeed_2600_spi2_info);
- type_register_static(&aspeed_1030_fmc_info);
- type_register_static(&aspeed_1030_spi1_info);
- type_register_static(&aspeed_1030_spi2_info);
- type_register_static(&aspeed_2700_fmc_info);
- type_register_static(&aspeed_2700_spi0_info);
- type_register_static(&aspeed_2700_spi1_info);
- type_register_static(&aspeed_2700_spi2_info);
-}
-
-type_init(aspeed_smc_register_types)
+DEFINE_TYPES(aspeed_smc_types)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 25/37] hw/i2c/aspeed_i2c: Introduce dma_addr_lo_mask to unify DMA address handling
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (23 preceding siblings ...)
2026-06-08 5:48 ` [PULL 24/37] hw/ssi/aspeed_smc: " Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 26/37] hw/i2c/aspeed_i2c: Increase AST2700 buffer mode size and adjust offset Cédric Le Goater
` (12 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The Aspeed I2C controller has two register layouts.
The AST2500 uses the old mode with a single DMA address register (I2CD_DMA_ADDR)
where the address is 4-byte aligned and masked to 0x3ffffffc.
>From AST2600 onwards, the new mode provides separate master TX/RX and slave RX DMA
address registers (I2CM_DMA_TX_ADDR, I2CM_DMA_RX_ADDR, I2CS_DMA_RX_ADDR)
with different address widths per SoC:
AST2600 (new mode): 0x7fffffff - bits[30:0]
AST1030 (new mode): 0x7fffffff - bits[30:0]
AST1060 (new mode): 0x7fffffff - bits[30:0]
AST2700 (new mode): 0xffffffff - bits[31:0]
Introduce dma_addr_lo_mask as a per-class attribute and apply it
uniformly when storing DMA address register writes and when loading
the address into dma_dram_offset for both master and slave paths.
This replaces the previous FIELD_EX32 extractions (which incorrectly
stripped bit 31 on AST2700) and the hardcoded 0x3ffffffc literal in
the old-mode path.
Fixes: 1809ab6a67359e0876981cd05d2a50b2843eabad ("hw/i2c/aspeed: Add AST2700 support")
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/i2c/aspeed_i2c.h | 5 +----
hw/i2c/aspeed_i2c.c | 24 ++++++++++++++----------
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index d42cb4865aa5..1fc229f69919 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -209,13 +209,9 @@ REG32(I2CS_DMA_LEN, 0x2c)
FIELD(I2CS_DMA_LEN, TX_BUF_LEN_W1T, 15, 1)
FIELD(I2CS_DMA_LEN, TX_BUF_LEN, 0, 11)
REG32(I2CM_DMA_TX_ADDR, 0x30)
- FIELD(I2CM_DMA_TX_ADDR, ADDR, 0, 31)
REG32(I2CM_DMA_RX_ADDR, 0x34)
- FIELD(I2CM_DMA_RX_ADDR, ADDR, 0, 31)
REG32(I2CS_DMA_TX_ADDR, 0x38)
- FIELD(I2CS_DMA_TX_ADDR, ADDR, 0, 31)
REG32(I2CS_DMA_RX_ADDR, 0x3c)
- FIELD(I2CS_DMA_RX_ADDR, ADDR, 0, 31)
REG32(I2CS_DEV_ADDR, 0x40)
REG32(I2CM_DMA_LEN_STS, 0x48)
FIELD(I2CM_DMA_LEN_STS, RX_LEN, 16, 13)
@@ -303,6 +299,7 @@ struct AspeedI2CClass {
bool has_share_pool;
uint64_t mem_size;
bool has_dma64;
+ uint32_t dma_addr_lo_mask;
};
static inline bool aspeed_i2c_is_new_mode(AspeedI2CState *s)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 4a6732a18554..9d4e72c8585e 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -236,7 +236,7 @@ static void aspeed_i2c_set_tx_dma_dram_offset(AspeedI2CBus *bus)
value = bus->regs[R_I2CM_DMA_TX_ADDR];
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
- FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR));
+ value & aic->dma_addr_lo_mask);
if (aic->has_dma64) {
value = bus->regs[R_I2CM_DMA_TX_ADDR_HI];
bus->dma_dram_offset =
@@ -246,7 +246,7 @@ static void aspeed_i2c_set_tx_dma_dram_offset(AspeedI2CBus *bus)
} else {
value = bus->regs[R_I2CD_DMA_ADDR];
bus->dma_dram_offset = deposit64(bus->dma_dram_offset, 0, 32,
- value & 0x3ffffffc);
+ value & aic->dma_addr_lo_mask);
}
}
@@ -261,7 +261,7 @@ static void aspeed_i2c_set_rx_dma_dram_offset(AspeedI2CBus *bus)
value = bus->regs[R_I2CM_DMA_RX_ADDR];
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
- FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR));
+ value & aic->dma_addr_lo_mask);
if (aic->has_dma64) {
value = bus->regs[R_I2CM_DMA_RX_ADDR_HI];
bus->dma_dram_offset =
@@ -271,7 +271,7 @@ static void aspeed_i2c_set_rx_dma_dram_offset(AspeedI2CBus *bus)
} else {
value = bus->regs[R_I2CD_DMA_ADDR];
bus->dma_dram_offset = deposit64(bus->dma_dram_offset, 0, 32,
- value & 0x3ffffffc);
+ value & aic->dma_addr_lo_mask);
}
}
@@ -735,12 +735,10 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
aspeed_i2c_bus_raise_interrupt(bus);
break;
case A_I2CM_DMA_TX_ADDR:
- bus->regs[R_I2CM_DMA_TX_ADDR] = FIELD_EX32(value, I2CM_DMA_TX_ADDR,
- ADDR);
+ bus->regs[R_I2CM_DMA_TX_ADDR] = value & aic->dma_addr_lo_mask;
break;
case A_I2CM_DMA_RX_ADDR:
- bus->regs[R_I2CM_DMA_RX_ADDR] = FIELD_EX32(value, I2CM_DMA_RX_ADDR,
- ADDR);
+ bus->regs[R_I2CM_DMA_RX_ADDR] = value & aic->dma_addr_lo_mask;
break;
case A_I2CM_DMA_LEN:
w1t = FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T) ||
@@ -777,7 +775,7 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
bus->regs[R_I2CS_DEV_ADDR] = value;
break;
case A_I2CS_DMA_RX_ADDR:
- bus->regs[R_I2CS_DMA_RX_ADDR] = value;
+ bus->regs[R_I2CS_DMA_RX_ADDR] = value & aic->dma_addr_lo_mask;
break;
case A_I2CS_DMA_LEN:
if (FIELD_EX32(value, I2CS_DMA_LEN, RX_BUF_LEN_W1T)) {
@@ -1375,6 +1373,8 @@ static void aspeed_i2c_class_init(ObjectClass *klass, const void *data)
static int aspeed_i2c_bus_new_slave_event(AspeedI2CBus *bus,
enum i2c_event event)
{
+ AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(bus->controller);
+
switch (event) {
case I2C_START_SEND_ASYNC:
if (!SHARED_ARRAY_FIELD_EX32(bus->regs, R_I2CS_CMD, RX_DMA_EN)) {
@@ -1385,7 +1385,7 @@ static int aspeed_i2c_bus_new_slave_event(AspeedI2CBus *bus,
ARRAY_FIELD_DP32(bus->regs, I2CS_DMA_LEN_STS, RX_LEN, 0);
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
- ARRAY_FIELD_EX32(bus->regs, I2CS_DMA_RX_ADDR, ADDR));
+ bus->regs[R_I2CS_DMA_RX_ADDR] & aic->dma_addr_lo_mask);
bus->regs[R_I2CC_DMA_LEN] =
ARRAY_FIELD_EX32(bus->regs, I2CS_DMA_LEN, RX_BUF_LEN) + 1;
i2c_ack(bus->bus);
@@ -1608,6 +1608,7 @@ static void aspeed_2500_i2c_class_init(ObjectClass *klass, const void *data)
aic->check_sram = true;
aic->has_dma = true;
aic->mem_size = 0x1000;
+ aic->dma_addr_lo_mask = 0x3ffffffc;
}
static qemu_irq aspeed_2600_i2c_bus_get_irq(AspeedI2CBus *bus)
@@ -1631,6 +1632,7 @@ static void aspeed_2600_i2c_class_init(ObjectClass *klass, const void *data)
aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
aic->has_dma = true;
aic->mem_size = 0x1000;
+ aic->dma_addr_lo_mask = 0x7fffffff;
}
static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
@@ -1649,6 +1651,7 @@ static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
aic->has_dma = true;
aic->mem_size = 0x10000;
+ aic->dma_addr_lo_mask = 0x7fffffff;
}
static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
@@ -1670,6 +1673,7 @@ static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
aic->has_dma = true;
aic->mem_size = 0x2000;
aic->has_dma64 = true;
+ aic->dma_addr_lo_mask = 0xffffffff;
}
static const TypeInfo aspeed_i2c_types[] = {
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 26/37] hw/i2c/aspeed_i2c: Increase AST2700 buffer mode size and adjust offset
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (24 preceding siblings ...)
2026-06-08 5:48 ` [PULL 25/37] hw/i2c/aspeed_i2c: Introduce dma_addr_lo_mask to unify DMA address handling Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 27/37] hw/arm/aspeed_ast1040: Reuse AST2700 ADC model Cédric Le Goater
` (11 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Update the AST2700 I2C buffer mode configuration to match
the latest firmware definition:
- Increase buffer mode pool size from 0x20 to 0x40
- Adjust buffer mode base offset to 0x1c0
Since the buffer mode region size changes, the migration state
layout is also modified. Bump the VMState version numbers to
prevent incompatible migration between old and new machine states.
Fixes: 1809ab6a67359e0876981cd05d2a50b2843eabad ("hw/i2c/aspeed: Add AST2700 support")
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/i2c/aspeed_i2c.h | 2 +-
hw/i2c/aspeed_i2c.c | 46 ++++++++++++++++++-------------------
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index 1fc229f69919..b2e4d2fb9dcb 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -35,7 +35,7 @@ OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)
#define ASPEED_I2C_NR_BUSSES 16
#define ASPEED_I2C_SHARE_POOL_SIZE 0x800
-#define ASPEED_I2C_BUS_POOL_SIZE 0x20
+#define ASPEED_I2C_BUS_POOL_SIZE 0x40
#define ASPEED_I2C_NEW_NUM_REG (0xa0 >> 2)
#define A_I2CD_M_STOP_CMD BIT(5)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 9d4e72c8585e..856d5dc1db64 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1132,8 +1132,8 @@ static const MemoryRegionOps aspeed_i2c_bus_pool_ops = {
static const VMStateDescription aspeed_i2c_bus_vmstate = {
.name = TYPE_ASPEED_I2C,
- .version_id = 7,
- .minimum_version_id = 6,
+ .version_id = 8,
+ .minimum_version_id = 8,
.fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, AspeedI2CBus, ASPEED_I2C_NEW_NUM_REG),
VMSTATE_UINT32_V(pending_intr_sts, AspeedI2CBus, 7),
@@ -1145,8 +1145,8 @@ static const VMStateDescription aspeed_i2c_bus_vmstate = {
static const VMStateDescription aspeed_i2c_vmstate = {
.name = TYPE_ASPEED_I2C,
- .version_id = 3,
- .minimum_version_id = 3,
+ .version_id = 4,
+ .minimum_version_id = 4,
.fields = (const VMStateField[]) {
VMSTATE_UINT32(intr_status, AspeedI2CState),
VMSTATE_STRUCT_ARRAY(busses, AspeedI2CState,
@@ -1250,37 +1250,37 @@ static void aspeed_i2c_instance_init(Object *obj)
* Address Definitions (AST2700)
* 0x000 ... 0x0FF: Global Register
* 0x100 ... 0x19F: Device 0
- * 0x1A0 ... 0x1BF: Device 0 buffer
+ * 0x1C0 ... 0x1FF: Device 0 buffer
* 0x200 ... 0x29F: Device 1
- * 0x2A0 ... 0x2BF: Device 1 buffer
+ * 0x2C0 ... 0x2FF: Device 1 buffer
* 0x300 ... 0x39F: Device 2
- * 0x3A0 ... 0x3BF: Device 2 buffer
+ * 0x3C0 ... 0x3FF: Device 2 buffer
* 0x400 ... 0x49F: Device 3
- * 0x4A0 ... 0x4BF: Device 3 buffer
+ * 0x4C0 ... 0x4FF: Device 3 buffer
* 0x500 ... 0x59F: Device 4
- * 0x5A0 ... 0x5BF: Device 4 buffer
+ * 0x5C0 ... 0x5FF: Device 4 buffer
* 0x600 ... 0x69F: Device 5
- * 0x6A0 ... 0x6BF: Device 5 buffer
+ * 0x6C0 ... 0x6FF: Device 5 buffer
* 0x700 ... 0x79F: Device 6
- * 0x7A0 ... 0x7BF: Device 6 buffer
+ * 0x7C0 ... 0x7FF: Device 6 buffer
* 0x800 ... 0x89F: Device 7
- * 0x8A0 ... 0x8BF: Device 7 buffer
+ * 0x8C0 ... 0x8FF: Device 7 buffer
* 0x900 ... 0x99F: Device 8
- * 0x9A0 ... 0x9BF: Device 8 buffer
+ * 0x9C0 ... 0x9FF: Device 8 buffer
* 0xA00 ... 0xA9F: Device 9
- * 0xAA0 ... 0xABF: Device 9 buffer
+ * 0xAC0 ... 0xAFF: Device 9 buffer
* 0xB00 ... 0xB9F: Device 10
- * 0xBA0 ... 0xBBF: Device 10 buffer
+ * 0xBC0 ... 0xBFF: Device 10 buffer
* 0xC00 ... 0xC9F: Device 11
- * 0xCA0 ... 0xCBF: Device 11 buffer
+ * 0xCC0 ... 0xCFF: Device 11 buffer
* 0xD00 ... 0xD9F: Device 12
- * 0xDA0 ... 0xDBF: Device 12 buffer
+ * 0xDC0 ... 0xDFF: Device 12 buffer
* 0xE00 ... 0xE9F: Device 13
- * 0xEA0 ... 0xEBF: Device 13 buffer
+ * 0xEC0 ... 0xEFF: Device 13 buffer
* 0xF00 ... 0xF9F: Device 14
- * 0xFA0 ... 0xFBF: Device 14 buffer
+ * 0xFC0 ... 0xFFF: Device 14 buffer
* 0x1000 ... 0x109F: Device 15
- * 0x10A0 ... 0x10BF: Device 15 buffer
+ * 0x10C0 ... 0x10BF: Device 15 buffer
*/
static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
{
@@ -1666,9 +1666,9 @@ static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
aic->reg_gap_size = 0x60;
aic->gap = -1; /* no gap */
aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq;
- aic->pool_size = 0x20;
- aic->pool_gap_size = 0xe0;
- aic->pool_base = 0x1a0;
+ aic->pool_size = 0x40;
+ aic->pool_gap_size = 0xc0;
+ aic->pool_base = 0x1c0;
aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
aic->has_dma = true;
aic->mem_size = 0x2000;
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 27/37] hw/arm/aspeed_ast1040: Reuse AST2700 ADC model
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (25 preceding siblings ...)
2026-06-08 5:48 ` [PULL 26/37] hw/i2c/aspeed_i2c: Increase AST2700 buffer mode size and adjust offset Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 28/37] hw/arm/aspeed_ast1040: Introduce PECI support Cédric Le Goater
` (10 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Instead of introducing a dedicated TYPE_ASPEED_1040_ADC model,
initialize the existing AST2700 ADC device directly for AST1040.
This avoids unnecessary duplication and keeps the codebase simpler
and easier to maintain.
Add ADC device initialization and realization support to the
AST1040 SoC model using TYPE_ASPEED_2700_ADC.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index 8efcdad8f6a0..b736e690e5e2 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -107,6 +107,8 @@ static void aspeed_soc_ast1040_init(Object *obj)
object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_SERIAL_MM);
}
+ object_initialize_child(obj, "adc", &s->adc, TYPE_ASPEED_2700_ADC);
+
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "udc", &s->udc, TYPE_UNIMPLEMENTED_DEVICE);
@@ -188,6 +190,15 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
aspeed_soc_ast1040_get_irq(s, uart));
}
+ /* ADC */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->adc), 0,
+ sc->memmap[ASPEED_DEV_ADC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
+ aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_ADC));
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 28/37] hw/arm/aspeed_ast1040: Introduce PECI support
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (26 preceding siblings ...)
2026-06-08 5:48 ` [PULL 27/37] hw/arm/aspeed_ast1040: Reuse AST2700 ADC model Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 29/37] hw/arm/aspeed_ast1040: Reuse AST2700 GPIO controller model Cédric Le Goater
` (9 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Introduce PECI support for the AST1040 SoC model.
This change adds the PECI MMIO region and IRQ mapping,
initializes the PECI device instance, and realizes the
controller during SoC initialization.
The PECI controller is mapped at 0x74C1F000 and connected
to IRQ 164.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index b736e690e5e2..9ae0a0e7a4a1 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -31,6 +31,7 @@ static const hwaddr aspeed_soc_ast1040_memmap[] = {
[ASPEED_DEV_SGPIOM0] = 0x74C0C000,
[ASPEED_DEV_SGPIOM1] = 0x74C0D000,
[ASPEED_DEV_I2C] = 0x74C0F000,
+ [ASPEED_DEV_PECI] = 0x74C1F000,
[ASPEED_DEV_I3C] = 0x74C20000,
[ASPEED_DEV_UART0] = 0x74C33000,
[ASPEED_DEV_UART1] = 0x74C33100,
@@ -76,6 +77,7 @@ static const int aspeed_soc_ast1040_irqmap[] = {
[ASPEED_DEV_UART11] = 146,
[ASPEED_DEV_UART12] = 147,
[ASPEED_DEV_JTAG0] = 162,
+ [ASPEED_DEV_PECI] = 164,
};
static qemu_irq aspeed_soc_ast1040_get_irq(AspeedSoCState *s, int dev)
@@ -108,6 +110,7 @@ static void aspeed_soc_ast1040_init(Object *obj)
}
object_initialize_child(obj, "adc", &s->adc, TYPE_ASPEED_2700_ADC);
+ object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI);
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
@@ -199,6 +202,15 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_ADC));
+ /* PECI */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->peci), 0,
+ sc->memmap[ASPEED_DEV_PECI]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
+ aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_PECI));
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 29/37] hw/arm/aspeed_ast1040: Reuse AST2700 GPIO controller model
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (27 preceding siblings ...)
2026-06-08 5:48 ` [PULL 28/37] hw/arm/aspeed_ast1040: Introduce PECI support Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 30/37] hw/arm/aspeed_ast1040: Add SGPIO controller support Cédric Le Goater
` (8 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The AST1040 GPIO controller is compatible with the AST2700 GPIO
controller implementation.
Reuse the existing "aspeed.gpio-ast2700" device model for AST1040
instead of introducing a separate implementation.
Add the GPIO device initialization, MMIO mapping, and IRQ wiring
for the AST1040 SoC model.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index 9ae0a0e7a4a1..c6b22186ce72 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -111,6 +111,7 @@ static void aspeed_soc_ast1040_init(Object *obj)
object_initialize_child(obj, "adc", &s->adc, TYPE_ASPEED_2700_ADC);
object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI);
+ object_initialize_child(obj, "gpio", &s->gpio, "aspeed.gpio-ast2700");
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
@@ -211,6 +212,15 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0,
aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_PECI));
+ /* GPIO */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->gpio), 0,
+ sc->memmap[ASPEED_DEV_GPIO]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
+ aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_GPIO));
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 30/37] hw/arm/aspeed_ast1040: Add SGPIO controller support
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (28 preceding siblings ...)
2026-06-08 5:48 ` [PULL 29/37] hw/arm/aspeed_ast1040: Reuse AST2700 GPIO controller model Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 31/37] hw/i2c/aspeed_i2c: Introduce AST1040 I2C model Cédric Le Goater
` (7 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The AST1040 SGPIO controller is compatible with the AST2700
SGPIO controller implementation.
AST1040 contains two SGPIO controllers, so reuse the existing
"aspeed.sgpio-ast2700" device model instead of keeping them as
unimplemented devices.
MMIO mapping:
- SGPIOM0 : 0x74C0C000
- SGPIOM1 : 0x74C0D000
IRQ mapping:
- SGPIOM0 : IRQ 85
- SGPIOM1 : IRQ 88
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index c6b22186ce72..77211ce1f362 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -56,6 +56,7 @@ static const int aspeed_soc_ast1040_irqmap[] = {
[ASPEED_DEV_ADC] = 80,
[ASPEED_DEV_GPIO] = 82,
[ASPEED_DEV_SGPIOM0] = 85,
+ [ASPEED_DEV_SGPIOM1] = 88,
[ASPEED_DEV_TIMER1] = 92,
[ASPEED_DEV_I3C] = 96, /* 96 ~ 103 */
[ASPEED_DEV_WDT] = 112,
@@ -112,14 +113,14 @@ static void aspeed_soc_ast1040_init(Object *obj)
object_initialize_child(obj, "adc", &s->adc, TYPE_ASPEED_2700_ADC);
object_initialize_child(obj, "peci", &s->peci, TYPE_ASPEED_PECI);
object_initialize_child(obj, "gpio", &s->gpio, "aspeed.gpio-ast2700");
+ for (i = 0; i < sc->sgpio_num; i++) {
+ object_initialize_child(obj, "sgpio[*]", &s->sgpiom[i],
+ "aspeed.sgpio-ast2700");
+ }
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "udc", &s->udc, TYPE_UNIMPLEMENTED_DEVICE);
- object_initialize_child(obj, "sgpiom[0]", &s->sgpiom[0],
- TYPE_UNIMPLEMENTED_DEVICE);
- object_initialize_child(obj, "sgpiom[1]", &s->sgpiom[1],
- TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "jtag[0]", &s->jtag[0],
TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "jtag[1]", &s->jtag[1],
@@ -221,6 +222,17 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_GPIO));
+ /* SGPIO */
+ for (i = 0; i < sc->sgpio_num; i++) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sgpiom[i]), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->sgpiom[i]), 0,
+ sc->memmap[ASPEED_DEV_SGPIOM0 + i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->sgpiom[i]), 0,
+ aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_SGPIOM0 + i));
+ }
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
@@ -234,14 +246,6 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
"aspeed.udc",
sc->memmap[ASPEED_DEV_UDC], 0x4000);
- aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->sgpiom[0]),
- "aspeed.sgpiom0",
- sc->memmap[ASPEED_DEV_SGPIOM0], 0x1000);
-
- aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->sgpiom[1]),
- "aspeed.sgpiom1",
- sc->memmap[ASPEED_DEV_SGPIOM1], 0x1000);
-
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->jtag[0]),
"aspeed.jtag0",
sc->memmap[ASPEED_DEV_JTAG0], 0x100);
@@ -269,6 +273,7 @@ static void aspeed_soc_ast1040_class_init(ObjectClass *klass, const void *data)
sc->sram_size[0] = 128 * KiB;
sc->sram_size[1] = 16 * MiB; /* Hyper RAM */
sc->uarts_num = 13;
+ sc->sgpio_num = 2;
sc->uarts_base = ASPEED_DEV_UART0;
sc->irqmap = aspeed_soc_ast1040_irqmap;
sc->memmap = aspeed_soc_ast1040_memmap;
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 31/37] hw/i2c/aspeed_i2c: Introduce AST1040 I2C model
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (29 preceding siblings ...)
2026-06-08 5:48 ` [PULL 30/37] hw/arm/aspeed_ast1040: Add SGPIO controller support Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 32/37] hw/arm/aspeed_ast1040: Introduce I2C support Cédric Le Goater
` (6 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Introduce the AST1040 I2C controller model.
The AST1040 I2C controller is compatible with the AST2700 I2C controller,
including DMA support and the 64-bit DMA address registers. Set has_dma64 so
firmware can access the high address register and program it to zero, as the
CM4 CPU only supports 32-bit addressing.
AST1040 has 14 I2C buses and its HyperRAM is limited to 16 MiB,
so restrict the DMA low address mask to 0x00ffffff.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/i2c/aspeed_i2c.h | 1 +
hw/i2c/aspeed_i2c.c | 33 +++++++++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index b2e4d2fb9dcb..156998e7c14e 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -30,6 +30,7 @@
#define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500"
#define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
#define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030"
+#define TYPE_ASPEED_1040_I2C TYPE_ASPEED_I2C "-ast1040"
#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700"
OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 856d5dc1db64..27afcaeceedc 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1654,6 +1654,34 @@ static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
aic->dma_addr_lo_mask = 0x7fffffff;
}
+static void aspeed_1040_i2c_class_init(ObjectClass *klass, const void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass);
+
+ dc->desc = "ASPEED 1040 I2C Controller";
+
+ /*
+ * AST1040 reuses the AST2700 I2C controller implementation since
+ * the AST1040 is compatible with AST2700. AST1040 has 14 I2C buses,
+ * and its HyperRAM is limited to 16 MiB, so the DMA low address
+ * mask is restricted accordingly.
+ */
+ aic->num_busses = 14;
+ aic->reg_size = 0xa0;
+ aic->reg_gap_size = 0x60;
+ aic->gap = -1; /* no gap */
+ aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq;
+ aic->pool_size = 0x40;
+ aic->pool_gap_size = 0xc0;
+ aic->pool_base = 0x1c0;
+ aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
+ aic->has_dma = true;
+ aic->mem_size = 0x2000;
+ aic->has_dma64 = true;
+ aic->dma_addr_lo_mask = 0x00ffffff;
+}
+
static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1703,6 +1731,11 @@ static const TypeInfo aspeed_i2c_types[] = {
.parent = TYPE_ASPEED_I2C,
.class_init = aspeed_1030_i2c_class_init,
},
+ {
+ .name = TYPE_ASPEED_1040_I2C,
+ .parent = TYPE_ASPEED_I2C,
+ .class_init = aspeed_1040_i2c_class_init,
+ },
{
.name = TYPE_ASPEED_2400_I2C,
.parent = TYPE_ASPEED_I2C,
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 32/37] hw/arm/aspeed_ast1040: Introduce I2C support
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (30 preceding siblings ...)
2026-06-08 5:48 ` [PULL 31/37] hw/i2c/aspeed_i2c: Introduce AST1040 I2C model Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 33/37] hw/arm/aspeed_ast1040_evb: Introduce onboard I2C device Cédric Le Goater
` (5 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Introduce I2C controller support for the AST1040 SoC model.
The I2C model type is selected from the SoC type name, allowing the AST1040
SoC to use the corresponding aspeed.i2c-ast1040 model.
The I2C controller is mapped at 0x74C0F000 and uses IRQs
64 - 77, with one IRQ assigned per I2C bus.
The controller DRAM link is connected to SRAM1 (HyperRAM)
for DMA support.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index 77211ce1f362..6d1cb9b102d5 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -117,6 +117,7 @@ static void aspeed_soc_ast1040_init(Object *obj)
object_initialize_child(obj, "sgpio[*]", &s->sgpiom[i],
"aspeed.sgpio-ast2700");
}
+ object_initialize_child(obj, "i2c", &s->i2c, TYPE_ASPEED_1040_I2C);
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
@@ -233,6 +234,21 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_SGPIOM0 + i));
}
+ /* I2C */
+ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(&s->sram[1]),
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
+ for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
+ qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
+ sc->irqmap[ASPEED_DEV_I2C] + i);
+ /* The AST1040 I2C controller has one IRQ per bus. */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
+ }
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 33/37] hw/arm/aspeed_ast1040_evb: Introduce onboard I2C device
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (31 preceding siblings ...)
2026-06-08 5:48 ` [PULL 32/37] hw/arm/aspeed_ast1040: Introduce I2C support Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 34/37] hw/arm/aspeed_ast1040: Reuse AST2700 watchdog models Cédric Le Goater
` (4 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Introduce onboard I2C device initialization for the AST1040
EVB model.
Instantiate:
- A 24C08-compatible EEPROM at address 0x50 on I2C bus 0
- A TMP105 temperature sensor at address 0x4d on I2C bus 1
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040_evb.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/aspeed_ast1040_evb.c b/hw/arm/aspeed_ast1040_evb.c
index 1d9b55247f07..2b93d4dfbc55 100644
--- a/hw/arm/aspeed_ast1040_evb.c
+++ b/hw/arm/aspeed_ast1040_evb.c
@@ -14,6 +14,7 @@
#include "hw/arm/aspeed_soc.h"
#include "hw/core/qdev-clock.h"
#include "system/system.h"
+#include "hw/i2c/smbus_eeprom.h"
#define AST1040_INTERNAL_FLASH_SIZE (4 * MiB)
/* Main SYSCLK frequency in Hz (400MHz) */
@@ -38,12 +39,25 @@ static void aspeed_bic_machine_init(MachineState *machine)
aspeed_connect_serial_hds_to_uarts(bmc);
qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
+ if (amc->i2c_init) {
+ amc->i2c_init(bmc);
+ }
+
armv7m_load_kernel(ARM_CPU(first_cpu),
machine->kernel_filename,
0,
AST1040_INTERNAL_FLASH_SIZE);
}
+static void ast1040_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ uint8_t *eeprom_buf = g_malloc0(256);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
+}
+
static void aspeed_machine_ast1040_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -55,6 +69,7 @@ static void aspeed_machine_ast1040_evb_class_init(ObjectClass *oc,
amc->hw_strap1 = 0;
amc->hw_strap2 = 0;
mc->init = aspeed_bic_machine_init;
+ amc->i2c_init = ast1040_evb_i2c_init;
mc->default_ram_size = 0;
amc->macs_mask = 0;
amc->uart_default = ASPEED_DEV_UART12;
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 34/37] hw/arm/aspeed_ast1040: Reuse AST2700 watchdog models
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (32 preceding siblings ...)
2026-06-08 5:48 ` [PULL 33/37] hw/arm/aspeed_ast1040_evb: Introduce onboard I2C device Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 35/37] hw/i3c: fix CMD/data FIFO depth reset values to match real silicon Cédric Le Goater
` (3 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Instantiate and realize the watchdog models for the AST1040 SoC.
The AST1040 watchdog controller is compatible with the AST2700 watchdog
controller, so reuse the existing AST2700 watchdog model.
Configure the AST1040 SoC with 8 watchdog instances and map them to
their corresponding MMIO regions. The first watchdog controller (WDT0) is
located at 0x74c37000, with subsequent watchdogs placed according to the
controller register space size.
Each watchdog is linked to the SCU device before realization to provide the
required reset and system control interactions.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_ast1040.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index 6d1cb9b102d5..57ffc0807ab7 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -119,6 +119,11 @@ static void aspeed_soc_ast1040_init(Object *obj)
}
object_initialize_child(obj, "i2c", &s->i2c, TYPE_ASPEED_1040_I2C);
+ for (i = 0; i < sc->wdts_num; i++) {
+ object_initialize_child(obj, "wdt[*]", &s->wdt[i],
+ "aspeed.wdt-ast2700");
+ }
+
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "udc", &s->udc, TYPE_UNIMPLEMENTED_DEVICE);
@@ -249,6 +254,19 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
}
+ /* Watch dog */
+ for (i = 0; i < sc->wdts_num; i++) {
+ AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]);
+ hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize;
+
+ object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu),
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset);
+ }
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
@@ -290,6 +308,7 @@ static void aspeed_soc_ast1040_class_init(ObjectClass *klass, const void *data)
sc->sram_size[1] = 16 * MiB; /* Hyper RAM */
sc->uarts_num = 13;
sc->sgpio_num = 2;
+ sc->wdts_num = 8;
sc->uarts_base = ASPEED_DEV_UART0;
sc->irqmap = aspeed_soc_ast1040_irqmap;
sc->memmap = aspeed_soc_ast1040_memmap;
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 35/37] hw/i3c: fix CMD/data FIFO depth reset values to match real silicon
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (33 preceding siblings ...)
2026-06-08 5:48 ` [PULL 34/37] hw/arm/aspeed_ast1040: Reuse AST2700 watchdog models Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 36/37] hw/i3c: rename DW-I3C queue capacity fields from _bytes to _words Cédric Le Goater
` (2 subsequent siblings)
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel
Cc: Jithu Joseph, qemu-stable, Jamin Lin, Cédric Le Goater
From: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
The Linux DW-I3C master driver infers controller queue depths at probe
by reading two status registers that report free queue slots, which at
probe (queues empty) equals the full depth. It then uses those values
to gate every I3C transfer -- any batch whose word count exceeds the
advertised depth is rejected with -EOPNOTSUPP.
QUEUE_STATUS_LEVEL (0x4c) [7:0] -> cmdfifodepth (cmd slots)
DATA_BUFFER_STATUS_LEVEL (0x50) [7:0] -> datafifodepth (32-bit words)
Per the AST2600 datasheet the reset values are 0x10 and 0x40 (16 cmd
slots, 64 words = 256 B). QEMU was advertising 0x02 and 0x10, making
the kernel believe the controller can only do 64-byte transfers. The
visible symptom was -EOPNOTSUPP on any I3C transfer whose payload
exceeded 64 B (datafifodepth = 0x10 = 16 words = 64 B).
The underlying FIFOs in QEMU were already allocated at the right size
(fifo32_create takes word counts; the existing defaults give 16 cmd
slots and 64 data words). Only the advertised reset values were wrong.
Correct the reset values in dw_i3c_resets[], and additionally drive the
advertised depths from the queue-capacity configs in the reset handlers
(as is already done for the device/char table pointers), so a configured
override is reflected in what the guest reads instead of being silently
ignored. The advertised fields are 8-bit, so the depth saturates at 255
regardless of the wider capacity configs.
With this fix the guest sees datafifodepth=64 words and accepts
transfers up to 256 B.
Fixes: e974c6957576 ("hw/i3c/dw-i3c: Add more reset values")
Cc: qemu-stable@nongnu.org
Signed-off-by: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/qemu-devel/20260604142207.2118098-2-jithu.joseph@oss.qualcomm.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/i3c/dw-i3c.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c
index 17ff484c5df1..06c2d55f5958 100644
--- a/hw/i3c/dw-i3c.c
+++ b/hw/i3c/dw-i3c.c
@@ -282,8 +282,8 @@ static const uint32_t dw_i3c_resets[DW_I3C_NR_REGS] = {
[R_QUEUE_THLD_CTRL] = 0x01000101,
[R_DATA_BUFFER_THLD_CTRL] = 0x01010100,
[R_SLV_EVENT_CTRL] = 0x0000000b,
- [R_QUEUE_STATUS_LEVEL] = 0x00000002,
- [R_DATA_BUFFER_STATUS_LEVEL] = 0x00000010,
+ [R_QUEUE_STATUS_LEVEL] = 0x00000010,
+ [R_DATA_BUFFER_STATUS_LEVEL] = 0x00000040,
[R_PRESENT_STATE] = 0x00000003,
[R_I3C_VER_ID] = 0x3130302a,
[R_I3C_VER_TYPE] = 0x6c633033,
@@ -947,6 +947,10 @@ static void dw_i3c_reset(DeviceState *dev)
s->cfg.dev_char_table_pointer);
ARRAY_FIELD_DP32(s->regs, DEV_CHAR_TABLE_POINTER, DEV_CHAR_TABLE_DEPTH,
s->cfg.dev_char_table_depth);
+ ARRAY_FIELD_DP32(s->regs, QUEUE_STATUS_LEVEL, CMD_QUEUE_EMPTY_LOC,
+ s->cfg.cmd_resp_queue_capacity_bytes);
+ ARRAY_FIELD_DP32(s->regs, DATA_BUFFER_STATUS_LEVEL, TX_BUF_EMPTY_LOC,
+ s->cfg.tx_rx_queue_capacity_bytes);
dw_i3c_cmd_queue_reset(s);
dw_i3c_resp_queue_reset(s);
@@ -1793,6 +1797,10 @@ static void dw_i3c_reset_enter(Object *obj, ResetType type)
s->cfg.dev_char_table_pointer);
ARRAY_FIELD_DP32(s->regs, DEV_CHAR_TABLE_POINTER, DEV_CHAR_TABLE_DEPTH,
s->cfg.dev_char_table_depth);
+ ARRAY_FIELD_DP32(s->regs, QUEUE_STATUS_LEVEL, CMD_QUEUE_EMPTY_LOC,
+ s->cfg.cmd_resp_queue_capacity_bytes);
+ ARRAY_FIELD_DP32(s->regs, DATA_BUFFER_STATUS_LEVEL, TX_BUF_EMPTY_LOC,
+ s->cfg.tx_rx_queue_capacity_bytes);
}
static void dw_i3c_realize(DeviceState *dev, Error **errp)
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 36/37] hw/i3c: rename DW-I3C queue capacity fields from _bytes to _words
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (34 preceding siblings ...)
2026-06-08 5:48 ` [PULL 35/37] hw/i3c: fix CMD/data FIFO depth reset values to match real silicon Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 5:48 ` [PULL 37/37] hw/i3c: keep _bytes aliases for renamed queue-capacity properties Cédric Le Goater
2026-06-08 14:55 ` [PULL 00/37] aspeed queue Stefan Hajnoczi
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jithu Joseph, Jamin Lin, Cédric Le Goater
From: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
The cmd/resp, tx/rx, and IBI queue capacity values are passed straight
to fifo32_create(), which interprets its capacity argument as a 32-bit
word count. The fields and device properties were therefore misnamed:
setting e.g. tx-rx-queue-capacity-bytes=N sized the backing FIFO to N
words, not N bytes.
Rename the three struct fields and matching device-property strings:
cmd_resp_queue_capacity_bytes -> cmd_resp_queue_capacity_words
tx_rx_queue_capacity_bytes -> tx_rx_queue_capacity_words
ibi_queue_capacity_bytes -> ibi_queue_capacity_words
Defaults are unchanged (0x10 / 0x40 / 0x10) -- they were being
interpreted as word counts by fifo32_create() all along, just under a
misleading label. No behavioral change.
Signed-off-by: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/qemu-devel/20260604142207.2118098-3-jithu.joseph@oss.qualcomm.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/i3c/dw-i3c.h | 6 +++---
hw/i3c/dw-i3c.c | 32 ++++++++++++++++----------------
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/include/hw/i3c/dw-i3c.h b/include/hw/i3c/dw-i3c.h
index d26f60580f02..391470207c43 100644
--- a/include/hw/i3c/dw-i3c.h
+++ b/include/hw/i3c/dw-i3c.h
@@ -181,9 +181,9 @@ struct DWI3C {
struct {
uint8_t id;
- uint8_t cmd_resp_queue_capacity_bytes;
- uint16_t tx_rx_queue_capacity_bytes;
- uint8_t ibi_queue_capacity_bytes;
+ uint8_t cmd_resp_queue_capacity_words;
+ uint16_t tx_rx_queue_capacity_words;
+ uint8_t ibi_queue_capacity_words;
uint8_t num_addressable_devices;
uint16_t dev_addr_table_pointer;
uint16_t dev_addr_table_depth;
diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c
index 06c2d55f5958..0d32d9ce78a0 100644
--- a/hw/i3c/dw-i3c.c
+++ b/hw/i3c/dw-i3c.c
@@ -948,9 +948,9 @@ static void dw_i3c_reset(DeviceState *dev)
ARRAY_FIELD_DP32(s->regs, DEV_CHAR_TABLE_POINTER, DEV_CHAR_TABLE_DEPTH,
s->cfg.dev_char_table_depth);
ARRAY_FIELD_DP32(s->regs, QUEUE_STATUS_LEVEL, CMD_QUEUE_EMPTY_LOC,
- s->cfg.cmd_resp_queue_capacity_bytes);
+ s->cfg.cmd_resp_queue_capacity_words);
ARRAY_FIELD_DP32(s->regs, DATA_BUFFER_STATUS_LEVEL, TX_BUF_EMPTY_LOC,
- s->cfg.tx_rx_queue_capacity_bytes);
+ s->cfg.tx_rx_queue_capacity_words);
dw_i3c_cmd_queue_reset(s);
dw_i3c_resp_queue_reset(s);
@@ -1798,9 +1798,9 @@ static void dw_i3c_reset_enter(Object *obj, ResetType type)
ARRAY_FIELD_DP32(s->regs, DEV_CHAR_TABLE_POINTER, DEV_CHAR_TABLE_DEPTH,
s->cfg.dev_char_table_depth);
ARRAY_FIELD_DP32(s->regs, QUEUE_STATUS_LEVEL, CMD_QUEUE_EMPTY_LOC,
- s->cfg.cmd_resp_queue_capacity_bytes);
+ s->cfg.cmd_resp_queue_capacity_words);
ARRAY_FIELD_DP32(s->regs, DATA_BUFFER_STATUS_LEVEL, TX_BUF_EMPTY_LOC,
- s->cfg.tx_rx_queue_capacity_bytes);
+ s->cfg.tx_rx_queue_capacity_words);
}
static void dw_i3c_realize(DeviceState *dev, Error **errp)
@@ -1814,14 +1814,14 @@ static void dw_i3c_realize(DeviceState *dev, Error **errp)
DW_I3C_NR_REGS << 2);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mr);
- fifo32_create(&s->cmd_queue, s->cfg.cmd_resp_queue_capacity_bytes);
- fifo32_create(&s->resp_queue, s->cfg.cmd_resp_queue_capacity_bytes);
- fifo32_create(&s->tx_queue, s->cfg.tx_rx_queue_capacity_bytes);
- fifo32_create(&s->rx_queue, s->cfg.tx_rx_queue_capacity_bytes);
- fifo32_create(&s->ibi_queue, s->cfg.ibi_queue_capacity_bytes);
+ fifo32_create(&s->cmd_queue, s->cfg.cmd_resp_queue_capacity_words);
+ fifo32_create(&s->resp_queue, s->cfg.cmd_resp_queue_capacity_words);
+ fifo32_create(&s->tx_queue, s->cfg.tx_rx_queue_capacity_words);
+ fifo32_create(&s->rx_queue, s->cfg.tx_rx_queue_capacity_words);
+ fifo32_create(&s->ibi_queue, s->cfg.ibi_queue_capacity_words);
/* Arbitrarily large enough to not be an issue. */
fifo8_create(&s->ibi_data.ibi_intermediate_queue,
- s->cfg.ibi_queue_capacity_bytes * 8);
+ s->cfg.ibi_queue_capacity_words * 8);
s->bus = i3c_init_bus(DEVICE(s), name);
I3CBusClass *bc = I3C_BUS_GET_CLASS(s->bus);
@@ -1832,12 +1832,12 @@ static void dw_i3c_realize(DeviceState *dev, Error **errp)
static const Property dw_i3c_properties[] = {
DEFINE_PROP_UINT8("device-id", DWI3C, cfg.id, 0),
- DEFINE_PROP_UINT8("command-response-queue-capacity-bytes", DWI3C,
- cfg.cmd_resp_queue_capacity_bytes, 0x10),
- DEFINE_PROP_UINT16("tx-rx-queue-capacity-bytes", DWI3C,
- cfg.tx_rx_queue_capacity_bytes, 0x40),
- DEFINE_PROP_UINT8("ibi-queue-capacity-bytes", DWI3C,
- cfg.ibi_queue_capacity_bytes, 0x10),
+ DEFINE_PROP_UINT8("command-response-queue-capacity-words", DWI3C,
+ cfg.cmd_resp_queue_capacity_words, 0x10),
+ DEFINE_PROP_UINT16("tx-rx-queue-capacity-words", DWI3C,
+ cfg.tx_rx_queue_capacity_words, 0x40),
+ DEFINE_PROP_UINT8("ibi-queue-capacity-words", DWI3C,
+ cfg.ibi_queue_capacity_words, 0x10),
DEFINE_PROP_UINT8("num-addressable-devices", DWI3C,
cfg.num_addressable_devices, 8),
DEFINE_PROP_UINT16("dev-addr-table-pointer", DWI3C,
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* [PULL 37/37] hw/i3c: keep _bytes aliases for renamed queue-capacity properties
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (35 preceding siblings ...)
2026-06-08 5:48 ` [PULL 36/37] hw/i3c: rename DW-I3C queue capacity fields from _bytes to _words Cédric Le Goater
@ 2026-06-08 5:48 ` Cédric Le Goater
2026-06-08 14:55 ` [PULL 00/37] aspeed queue Stefan Hajnoczi
37 siblings, 0 replies; 41+ messages in thread
From: Cédric Le Goater @ 2026-06-08 5:48 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jithu Joseph, Jamin Lin, Cédric Le Goater
From: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
The command-response/tx-rx/ibi queue-capacity properties were renamed
from "-bytes" to "-words". The "-bytes" names are user-visible and
shipped in v11.0.0 (reachable via e.g.
-global driver=dw.i3c,property=tx-rx-queue-capacity-bytes,...), so
register them as aliases of the new names to keep existing command
lines working.
object_property_add_alias() forwards both reads and writes to the
target property, so the old names behave exactly as before; introspection
and qom-get/qom-set continue to work under either name.
Signed-off-by: Jithu Joseph <jithu.joseph@oss.qualcomm.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/qemu-devel/20260604142207.2118098-4-jithu.joseph@oss.qualcomm.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/i3c/dw-i3c.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c
index 0d32d9ce78a0..6386499dd9fc 100644
--- a/hw/i3c/dw-i3c.c
+++ b/hw/i3c/dw-i3c.c
@@ -1830,6 +1830,27 @@ static void dw_i3c_realize(DeviceState *dev, Error **errp)
bc->ibi_finish = dw_i3c_ibi_finish;
}
+/*
+ * The *-queue-capacity-bytes properties shipped in v11.0.0 under names that
+ * implied a byte count, but the values are 32-bit word counts (they are passed
+ * straight to fifo32_create()). They were renamed to *-queue-capacity-words;
+ * keep the old names working as aliases so existing command lines using e.g.
+ * -global driver=dw.i3c,property=tx-rx-queue-capacity-bytes,... don't break.
+ */
+static void dw_i3c_init(Object *obj)
+{
+ static const char *const alias[][2] = {
+ { "command-response-queue-capacity-bytes",
+ "command-response-queue-capacity-words" },
+ { "tx-rx-queue-capacity-bytes", "tx-rx-queue-capacity-words" },
+ { "ibi-queue-capacity-bytes", "ibi-queue-capacity-words" },
+ };
+
+ for (int i = 0; i < ARRAY_SIZE(alias); i++) {
+ object_property_add_alias(obj, alias[i][0], obj, alias[i][1]);
+ }
+}
+
static const Property dw_i3c_properties[] = {
DEFINE_PROP_UINT8("device-id", DWI3C, cfg.id, 0),
DEFINE_PROP_UINT8("command-response-queue-capacity-words", DWI3C,
@@ -1868,6 +1889,7 @@ static const TypeInfo dw_i3c_types[] = {
.name = TYPE_DW_I3C,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(DWI3C),
+ .instance_init = dw_i3c_init,
.class_init = dw_i3c_class_init,
},
};
--
2.54.0
^ permalink raw reply related [flat|nested] 41+ messages in thread* Re: [PULL 00/37] aspeed queue
2026-06-08 5:47 [PULL 00/37] aspeed queue Cédric Le Goater
` (36 preceding siblings ...)
2026-06-08 5:48 ` [PULL 37/37] hw/i3c: keep _bytes aliases for renamed queue-capacity properties Cédric Le Goater
@ 2026-06-08 14:55 ` Stefan Hajnoczi
37 siblings, 0 replies; 41+ messages in thread
From: Stefan Hajnoczi @ 2026-06-08 14:55 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: qemu-arm, qemu-devel, Cédric Le Goater
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.
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^ permalink raw reply [flat|nested] 41+ messages in thread