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From: sashiko-bot@kernel.org
To: "Vishnu Reddy" <busanna.reddy@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v8 04/12] media: iris: Add context bank hooks for platform specific initialization
Date: Wed, 10 Jun 2026 06:40:33 +0000	[thread overview]
Message-ID: <20260610064034.0DA401F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260610-glymur-v8-4-1c79b9d51fc0@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

Pre-existing issues:
- [High] Timeout during core initialization causes a permanent resource leak of DMA queues and context bank devices upon subsequent initialization attempts.
- [High] Premature state transition to `IRIS_CORE_INIT` allows concurrent threads to operate on an uninitialized core.
- [High] Unprotected modification of shared hardware state leads to data races.
--

commit f9ddd8e9794631e591729427a306735897ceefd1
Author: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>

media: iris: Add context bank hooks for platform specific initialization

This commit adds context bank initialization and deinitialization hooks
for the Iris VPU operations. This is necessary for platforms like glymur
that require dedicated firmware context bank devices where Linux manually
manages the firmware IOMMU mapping.

> diff --git a/drivers/media/platform/qcom/iris/iris_core.c b/drivers/media/platform/qcom/iris/iris_core.c
> index 52bf56e517f91..89dbe9bbf6b0a 100644
> --- a/drivers/media/platform/qcom/iris/iris_core.c
> +++ b/drivers/media/platform/qcom/iris/iris_core.c
[ ... ]
> @@ -58,10 +59,14 @@ int iris_core_init(struct iris_core *core)
>  
>  	core->state = IRIS_CORE_INIT;

[Severity: High]
This is a pre-existing issue, but does setting the state to IRIS_CORE_INIT
before the hardware initialization completes allow concurrent threads to
operate on an uninitialized core?

After starting the boot process, the function drops core->lock to wait for a
completion signal in iris_wait_for_system_response(). If another thread
calls open() and thus iris_core_init() concurrently during this wait, it
will acquire the lock, see core->state == IRIS_CORE_INIT, immediately
return 0, and proceed to interact with the device before the VPU hardware
has finished booting.

> -	ret = iris_hfi_queues_init(core);
> +	ret = iris_init_cb_devs(core);
>  	if (ret)
>  		goto error;
[ ... ]
> @@ -94,6 +99,8 @@ int iris_core_init(struct iris_core *core)
>  	iris_vpu_power_off(core);
>  error_queue_deinit:
>  	iris_hfi_queues_deinit(core);
> +error_deinit_cb_devs:
> +	iris_deinit_cb_devs(core);
>  error:
>  	core->state = IRIS_CORE_DEINIT;

[Severity: High]
This isn't a bug introduced by this patch, but does the handling of the error
state here cause a resource leak?

When iris_wait_for_system_response() times out, it returns -ETIMEDOUT but
leaves resources unfreed since it executes after the cleanup jump labels in
iris_core_init(). 

On a subsequent open() call, iris_core_init() sees
core->state == IRIS_CORE_ERROR and jumps to this label, transitioning
the state to IRIS_CORE_DEINIT without performing teardown. A third open() will
then allocate resources again, leaking previously mapped DMA buffers and
potentially unbalancing power votes.

>  exit:

[Severity: High]
This is a pre-existing issue, but does iris_wait_for_system_response() modify
core->state locklessly and introduce a data race?

In iris_core_init(), the core->lock is dropped just before returning
iris_wait_for_system_response(). On a timeout, iris_wait_for_system_response()
writes to core->state:

drivers/media/platform/qcom/iris/iris_core.c:iris_wait_for_system_response() {
    ...
	if (!ret) {
		core->state = IRIS_CORE_ERROR;
		return -ETIMEDOUT;
	}
    ...
}

Because core->state is evaluated and modified in other paths like
iris_core_deinit() under core->lock, modifying it locklessly on a timeout
could lead to inconsistent hardware teardown and potential use-after-free
if a concurrent iris_core_deinit() reads it just before the timeout fires.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260610-glymur-v8-0-1c79b9d51fc0@oss.qualcomm.com?part=4

  reply	other threads:[~2026-06-10  6:40 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-10  6:29 [PATCH v8 00/12] media: iris: Add support for glymur platform Vishnu Reddy
2026-06-10  6:29 ` [PATCH v8 01/12] media: iris: Add iris vpu bus support Vishnu Reddy
2026-06-10  6:46   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 02/12] iommu: Add iris-vpu-bus to iommu_buses Vishnu Reddy
2026-06-10  6:29 ` [PATCH v8 03/12] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Vishnu Reddy
2026-06-10  6:29 ` [PATCH v8 04/12] media: iris: Add context bank hooks for platform specific initialization Vishnu Reddy
2026-06-10  6:40   ` sashiko-bot [this message]
2026-06-10  6:29 ` [PATCH v8 05/12] media: iris: Enable Secure PAS support with IOMMU managed by Linux Vishnu Reddy
2026-06-10  6:45   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 06/12] media: iris: Replace enum-indexed clock and power domain tables with per-block structures Vishnu Reddy
2026-06-10  6:49   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 07/12] media: iris: Add power sequence for glymur Vishnu Reddy
2026-06-10  6:46   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 08/12] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook Vishnu Reddy
2026-06-10  6:40   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 09/12] media: iris: Add support to select core for dual core platforms Vishnu Reddy
2026-06-10  6:53   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 10/12] media: iris: Add platform data for glymur Vishnu Reddy
2026-06-10  6:54   ` sashiko-bot
2026-06-10  6:29 ` [PATCH v8 11/12] arm64: dts: qcom: glymur: Add iris video node Vishnu Reddy
2026-06-10  8:44   ` Bryan O'Donoghue
2026-06-10  6:29 ` [PATCH v8 12/12] arm64: dts: qcom: glymur-crd: Enable iris video codec node Vishnu Reddy

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