From: sashiko-bot@kernel.org
To: "Vishnu Reddy" <busanna.reddy@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v8 08/12] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook
Date: Wed, 10 Jun 2026 06:40:59 +0000 [thread overview]
Message-ID: <20260610064059.B5F2A1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260610-glymur-v8-8-1c79b9d51fc0@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] The error path for checking `CTRL_ERROR_STATUS__M` breaks out of the timeout loop but erroneously returns success.
--
commit c710baa8452aee4bafd7c2c310b77e43ce0faf2f
Author: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook
This commit moves the CPU_CS_SCIACMDARG3 register write into the bootup
registers hook and provides a platform-specific value for the Glymur
platform to avoid firmware miscalculating the VM count.
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> index 330fc85d232b4..a42554272964e 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
[ ... ]
> @@ -78,7 +79,6 @@ int iris_vpu_boot_firmware(struct iris_core *core)
> iris_vpu_setup_ucregion_memory_map(core);
>
> writel(ctrl_init, core->reg_base + CTRL_INIT);
> - writel(0x1, core->reg_base + CPU_CS_SCIACMDARG3);
>
> while (!ctrl_status && count < max_tries) {
> ctrl_status = readl(core->reg_base + CTRL_STATUS);
[Severity: High]
This is a pre-existing issue, but I noticed something concerning in the
error handling within iris_vpu_boot_firmware.
If the firmware initialization sets the error bit, the code logs an error
and breaks out of the polling loop:
if ((ctrl_status & CTRL_ERROR_STATUS__M) == 0x4) {
dev_err(core->dev, "invalid setting for uc_region\n");
break;
}
Since the loop is broken early, the loop counter remains less than the
maximum number of tries. The subsequent timeout check evaluates to false:
if (count >= max_tries) {
dev_err(core->dev, "error booting up iris firmware\n");
return -ETIME;
}
This causes the function to proceed with enabling interrupts and eventually
return success instead of failing early.
Does this logic cause the driver to ignore a fatal firmware error and
leave the hardware in an invalid state?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260610-glymur-v8-0-1c79b9d51fc0@oss.qualcomm.com?part=8
next prev parent reply other threads:[~2026-06-10 6:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-10 6:29 [PATCH v8 00/12] media: iris: Add support for glymur platform Vishnu Reddy
2026-06-10 6:29 ` [PATCH v8 01/12] media: iris: Add iris vpu bus support Vishnu Reddy
2026-06-10 6:46 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 02/12] iommu: Add iris-vpu-bus to iommu_buses Vishnu Reddy
2026-06-10 6:29 ` [PATCH v8 03/12] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Vishnu Reddy
2026-06-10 6:29 ` [PATCH v8 04/12] media: iris: Add context bank hooks for platform specific initialization Vishnu Reddy
2026-06-10 6:40 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 05/12] media: iris: Enable Secure PAS support with IOMMU managed by Linux Vishnu Reddy
2026-06-10 6:45 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 06/12] media: iris: Replace enum-indexed clock and power domain tables with per-block structures Vishnu Reddy
2026-06-10 6:49 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 07/12] media: iris: Add power sequence for glymur Vishnu Reddy
2026-06-10 6:46 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 08/12] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook Vishnu Reddy
2026-06-10 6:40 ` sashiko-bot [this message]
2026-06-10 6:29 ` [PATCH v8 09/12] media: iris: Add support to select core for dual core platforms Vishnu Reddy
2026-06-10 6:53 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 10/12] media: iris: Add platform data for glymur Vishnu Reddy
2026-06-10 6:54 ` sashiko-bot
2026-06-10 6:29 ` [PATCH v8 11/12] arm64: dts: qcom: glymur: Add iris video node Vishnu Reddy
2026-06-10 8:44 ` Bryan O'Donoghue
2026-06-10 6:29 ` [PATCH v8 12/12] arm64: dts: qcom: glymur-crd: Enable iris video codec node Vishnu Reddy
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