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From: Brian Cain <brian.cain@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: brian.cain@oss.qualcomm.com, matheus.bernardino@oss.qualcomm.com,
	pierrick.bouvier@oss.qualcomm.com, ltaylorsimpson@gmail.com,
	philmd@mailo.org, philmd@oss.qualcomm.com
Subject: [PATCH v8] target/hexagon: Suppress unused-variable warnings for sysemu source regs
Date: Wed, 10 Jun 2026 22:28:27 -0700	[thread overview]
Message-ID: <20260611052857.3911981-7-brian.cain@oss.qualcomm.com> (raw)
In-Reply-To: <20260611052857.3911981-1-brian.cain@oss.qualcomm.com>

The analyze_read() methods on GuestSource, GuestPairSource,
SystemSource, and SystemPairSource were no-ops because these
source registers do not need read-tracking in the analyze phase.
However, gen_analyze_funcs.py unconditionally declares the
register-number variable (e.g. GsN) via decl_reg_num() for all
registers that are read or written.  When building with
hexagon-softmmu, the generated analyze function bodies are
compiled (outside the #ifndef CONFIG_USER_ONLY guard), and the
declared-but-unreferenced register-number variable triggers
-Werror=unused-variable under both gcc and clang.

Override decl_reg_num() in each class to declare the register number with
G_GNUC_UNUSED, suppressing the warning.

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 target/hexagon/hex_common.py | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index 79436ee29d7..df8d3ba6586 100755
--- a/target/hexagon/hex_common.py
+++ b/target/hexagon/hex_common.py
@@ -1068,6 +1068,10 @@ def analyze_write(self, f, tag, regno):
         """))
 
 class GuestSource(GuestRegister, Single, OldSource):
+    def decl_reg_num(self, f, regno):
+        f.write(code_fmt(f"""\
+            const int {self.reg_num} G_GNUC_UNUSED = insn->regno[{regno}];
+        """))
     def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
@@ -1093,6 +1097,10 @@ def analyze_write(self, f, tag, regno):
         """))
 
 class GuestPairSource(GuestRegister, Pair, OldSource):
+    def decl_reg_num(self, f, regno):
+        f.write(code_fmt(f"""\
+            const int {self.reg_num} G_GNUC_UNUSED = insn->regno[{regno}];
+        """))
     def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
@@ -1118,6 +1126,10 @@ def analyze_write(self, f, tag, regno):
         """))
 
 class SystemSource(Register, Single, OldSource):
+    def decl_reg_num(self, f, regno):
+        f.write(code_fmt(f"""\
+            const int {self.reg_num} G_GNUC_UNUSED = insn->regno[{regno}];
+        """))
     def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
@@ -1143,6 +1155,10 @@ def analyze_write(self, f, tag, regno):
         """))
 
 class SystemPairSource(Register, Pair, OldSource):
+    def decl_reg_num(self, f, regno):
+        f.write(code_fmt(f"""\
+            const int {self.reg_num} G_GNUC_UNUSED = insn->regno[{regno}];
+        """))
     def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
-- 
2.34.1


  parent reply	other threads:[~2026-06-11  5:30 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-11  5:28 [PATCH v8 00/36] Hexagon system emulation - Part 1/3 Brian Cain
2026-06-11  5:28 ` [PATCH v8] docs: Add hexagon sysemu docs Brian Cain
2026-06-11  5:28 ` [PATCH v8] docs/system: Add hexagon CPU emulation Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Fix badva reference, delete CAUSE Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Handle system/guest registers in gen_analyze_funcs.py and hex_common.py Brian Cain
2026-06-11  5:28 ` Brian Cain [this message]
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Switch to tag_ignore(), generate via get_{user, sys}_tags() Brian Cain via qemu development
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add privilege check, use tag_ignore() Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add a placeholder fp exception Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add guest, system reg number defs Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add guest, system reg number state Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add TCG values for sreg, greg Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add guest/sys reg writes to DisasContext Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add imported macro, attr defs for sysemu Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add new macro definitions " Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add handlers for guest/sysreg r/w Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add placeholder greg/sreg r/w helpers Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add vmstate representation Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Make A_PRIV, "J2_trap*" insts need_env() Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Define register fields for system regs Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Implement do_raise_exception() Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add system reg insns Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add sysemu TCG overrides Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add implicit attributes to sysemu macros Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add TCG overrides for int handler insts Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add TCG overrides for thread ctl Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add TCG overrides for rte, nmi Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add sreg_{read,write} helpers Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add representation to count cycles Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add implementation of cycle counters Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add pcycle setting functionality Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add cpu modes, mmu indices, next_PC to state Brian Cain
2026-06-11  5:28 ` [PATCH v8] hw/hexagon: Declare hexagon TLB device interface Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Update TARGET_PAGE_BITS, stubs for modify_ssr/get_exe_mode Brian Cain
2026-06-17 15:03   ` Pierrick Bouvier
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Define f{S,G}ET_FIELD macros Brian Cain
2026-06-11  5:28 ` [PATCH v8] target/hexagon: Add hex_interrupts support Brian Cain
2026-06-17 19:34   ` Pierrick Bouvier

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