[PATCH v9 00/30] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe.

[PATCH v9 00/30] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe.

[Maarten Lankhorst]

Still waiting for feedback on the vblank approach, and check to see if there are some
bugs left.

Changes since previous version:
- Some fixes to work after rebasing.
- ivpu regression fixed upstream.
- Add write memory barriers in drm/vblank handling.

For Xe, we also prohibit the use of DSM when CONFIG_PREEMPT_RT is enabled,
and avoid the use of DSM if we cannot take over the framebuffer from the
firmware.

Ideally we copy the framebuffer after intel_fbdev_init_bios(),
when we decide to preserve the framebuffer and the hardware is
completely initialized.

At that point we can use the migration engine to copy the contents over,
this can potentially be used for preserving the initial framebuffer
in the other cases where we cannot not use the initial FB too.

Maarten Lankhorst (24):
  drm/vblank_work: Add methods to schedule vblank_work in 2 stages
  drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event
  drm/intel/display: Make intel_crtc_arm_vblank_event static
  drm/intel/display: Convert vblank event handling to 2-stage arming
  drm/i915/display: Move vblank put until after critical section
  drm/i915/display: Remove locking from intel_vblank_evade critical
    section
  drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range
    too
  drm/i915/display: Make get_vblank_counter use intel_de_read_fw()
  drm/i915/display: Do not take uncore lock in i915_get_vblank_counter
  drm/i915/display: Make icl_dsi_frame_update use _fw too
  drm/i915/display: Use intel_de_read/write_fw in colorops
  drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset
  drm/i915/display: Make set_pipeconf use the fw variants
  drm/i915/gt: Fix selftests on PREEMPT_RT
  drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT
  drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo
  drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT
  PREEMPT_RT injection
  FOR-CI: bump MAX_STACK_TRACE_ENTRIES
  drm/xe: Avoid using stolen memory for DPT.
  drm/xe/display: Avoid using stolen memory for framebuffer when media
    gt exists.
  drm/xe/display: Do not allocate into stolen for new framebuffers.
  drm/i915/pmu: Convert to raw spinlock
  drm/i915/guc: Make timestamp.lock a raw spinlock

Mike Galbraith (1):
  drm/i915: Use preempt_disable/enable_rt() where recommended

Sebastian Andrzej Siewior (5):
  drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() +
    spin_lock()
  drm/i915: Drop the irqs_disabled() check
  drm/i915/guc: Consider also RCU depth in busy loop.
  Revert "drm/i915: Depend on !PREEMPT_RT."
  drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

 drivers/gpu/drm/drm_vblank.c                  |  64 +++++++++-
 drivers/gpu/drm/drm_vblank_work.c             | 110 +++++++++++++----
 drivers/gpu/drm/i915/Kconfig                  |   1 -
 drivers/gpu/drm/i915/display/i9xx_wm.c        |   4 -
 drivers/gpu/drm/i915/display/icl_dsi.c        |   4 +-
 drivers/gpu/drm/i915/display/intel_cmtg.c     |   6 +-
 drivers/gpu/drm/i915/display/intel_color.c    |   6 +-
 drivers/gpu/drm/i915/display/intel_crtc.c     |  86 ++++++-------
 drivers/gpu/drm/i915/display/intel_crtc.h     |   1 -
 drivers/gpu/drm/i915/display/intel_cursor.c   |   8 +-
 drivers/gpu/drm/i915/display/intel_de.h       |   8 ++
 drivers/gpu/drm/i915/display/intel_display.c  |  52 ++++----
 drivers/gpu/drm/i915/display/intel_vblank.c   | 115 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_vblank.h   |   1 +
 drivers/gpu/drm/i915/display/intel_vrr.c      |  18 +--
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c   |   8 +-
 .../gpu/drm/i915/gt/intel_breadcrumbs_types.h |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |   2 +-
 .../drm/i915/gt/intel_execlists_submission.c  |  17 +--
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c  |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   4 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  26 ++--
 drivers/gpu/drm/i915/i915_pmu.c               |  22 ++--
 drivers/gpu/drm/i915/i915_pmu.h               |   2 +-
 drivers/gpu/drm/i915/i915_request.c           |   2 -
 drivers/gpu/drm/i915/intel_uncore.h           |  26 ++--
 drivers/gpu/drm/i915/selftests/igt_atomic.c   |   7 ++
 .../drm/xe/compat-i915-headers/intel_uncore.h |   7 ++
 drivers/gpu/drm/xe/display/xe_display_bo.c    |  40 ++----
 drivers/gpu/drm/xe/display/xe_fb_pin.c        |  33 ++---
 include/drm/drm_vblank.h                      |  14 ++-
 include/drm/drm_vblank_work.h                 |  12 ++
 kernel/Kconfig.preempt                        |   4 +-
 lib/Kconfig.debug                             |   5 +-
 34 files changed, 445 insertions(+), 279 deletions(-)

-- 
2.53.0

[PATCH v9 01/30] drm/vblank_work: Add methods to schedule vblank_work in 2 stages

[Maarten Lankhorst]

In case of vblank evasion in intel/display, it's necessary to
perform some work in advance, so the critical section will always run in
constant time on PREEMPT_RT.

By preparing all the work in advance, the part that needs to finish in
constant time only has to write a single variable instead. This allows
PREEMPT_RT to keep the interrupts disabled at the most critical part,
without completely reworking all locks to be raw spinlocks.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/drm_vblank_work.c | 110 +++++++++++++++++++++++-------
 include/drm/drm_vblank_work.h     |  12 ++++
 2 files changed, 96 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank_work.c b/drivers/gpu/drm/drm_vblank_work.c
index 70f0199251ea0..ed62c189fe041 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -54,7 +54,8 @@ void drm_handle_vblank_works(struct drm_vblank_crtc *vblank)
 	assert_spin_locked(&vblank->dev->event_lock);
 
 	list_for_each_entry_safe(work, next, &vblank->pending_work, node) {
-		if (!drm_vblank_passed(count, work->count))
+		/* READ_ONCE pairs with WRITE_ONCE in drm_vblank_work_enable() */
+		if (!READ_ONCE(work->armed) || !drm_vblank_passed(count, work->count))
 			continue;
 
 		list_del_init(&work->node);
@@ -86,30 +87,8 @@ void drm_vblank_cancel_pending_works(struct drm_vblank_crtc *vblank)
 	wake_up_all(&vblank->work_wait_queue);
 }
 
-/**
- * drm_vblank_work_schedule - schedule a vblank work
- * @work: vblank work to schedule
- * @count: target vblank count
- * @nextonmiss: defer until the next vblank if target vblank was missed
- *
- * Schedule @work for execution once the crtc vblank count reaches @count.
- *
- * If the crtc vblank count has already reached @count and @nextonmiss is
- * %false the work starts to execute immediately.
- *
- * If the crtc vblank count has already reached @count and @nextonmiss is
- * %true the work is deferred until the next vblank (as if @count has been
- * specified as crtc vblank count + 1).
- *
- * If @work is already scheduled, this function will reschedule said work
- * using the new @count. This can be used for self-rearming work items.
- *
- * Returns:
- * %1 if @work was successfully (re)scheduled, %0 if it was either already
- * scheduled or cancelled, or a negative error code on failure.
- */
-int drm_vblank_work_schedule(struct drm_vblank_work *work,
-			     u64 count, bool nextonmiss)
+static int __drm_vblank_work_schedule(struct drm_vblank_work *work,
+				      u64 count, bool nextonmiss, bool armed)
 {
 	struct drm_vblank_crtc *vblank = work->vblank;
 	struct drm_device *dev = vblank->dev;
@@ -139,6 +118,7 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 		rescheduling = true;
 	}
 
+	work->armed = armed;
 	work->count = count;
 	cur_vbl = drm_vblank_count(dev, vblank->pipe);
 	passed = drm_vblank_passed(cur_vbl, count);
@@ -147,7 +127,7 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 			     "crtc %d vblank %llu already passed (current %llu)\n",
 			     vblank->pipe, count, cur_vbl);
 
-	if (!nextonmiss && passed) {
+	if (!nextonmiss && passed && armed) {
 		drm_vblank_put(dev, vblank->pipe);
 		ret = kthread_queue_work(vblank->worker, &work->base);
 
@@ -167,8 +147,86 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 		wake_up_all(&vblank->work_wait_queue);
 	return ret;
 }
+
+/**
+ * drm_vblank_work_schedule - schedule a vblank work
+ * @work: vblank work to schedule
+ * @count: target vblank count
+ * @nextonmiss: defer until the next vblank if target vblank was missed
+ *
+ * Schedule @work for execution once the crtc vblank count reaches @count.
+ *
+ * If the crtc vblank count has already reached @count and @nextonmiss is
+ * %false the work starts to execute immediately.
+ *
+ * If the crtc vblank count has already reached @count and @nextonmiss is
+ * %true the work is deferred until the next vblank (as if @count has been
+ * specified as crtc vblank count + 1).
+ *
+ * If @work is already scheduled, this function will reschedule said work
+ * using the new @count. This can be used for self-rearming work items.
+ *
+ * Returns:
+ * %1 if @work was successfully (re)scheduled, %0 if it was either already
+ * scheduled or cancelled, or a negative error code on failure.
+ */
+int drm_vblank_work_schedule(struct drm_vblank_work *work,
+			     u64 count, bool nextonmiss)
+{
+	return __drm_vblank_work_schedule(work, count, nextonmiss, true);
+}
 EXPORT_SYMBOL(drm_vblank_work_schedule);
 
+
+/**
+ * drm_vblank_work_schedule_disabled - schedule a vblank work, withoug enabling
+ * @work: vblank work to schedule
+ * @count: target vblank count
+ *
+ * Schedule @work for execution once the crtc vblank count reaches @count.
+ *
+ * The vblank work will not be scheduled until drm_vblank_work_enable() is called.
+ * If the crtc vblank count has already reached @count, the work will still
+ * not be scheduled until the first following vblank.
+ *
+ * If @work is already scheduled, this function will reschedule said work
+ * using the new @count. This can be used for self-rearming work items.
+ *
+ * Returns:
+ * %1 if @work was successfully (re)scheduled, %0 if it was either already
+ * scheduled or cancelled, or a negative error code on failure.
+ */
+int drm_vblank_work_schedule_disabled(struct drm_vblank_work *work, u64 count)
+{
+	return __drm_vblank_work_schedule(work, count, true, false);
+}
+EXPORT_SYMBOL(drm_vblank_work_schedule_disabled);
+
+/**
+ * drm_vblank_work_enable - enable vblank work
+ * @work: vblank work to enable
+ *
+ * This function is specifically only for when drm_vblank_work_schedule_disabled() is
+ * called. It allows for the work to be armed in any context, without any locks.
+ *
+ * The work will be signalled earliest at the @count argument, if it has been passed,
+ * it will signalled at the next vblank.
+ *
+ * This is particularly useful for PREEMPT_RT, where the spin_lock is converted
+ * into a sleeping rtmutex, and vblank evasion requires some work to be
+ * scheduled on completion with interrupts disabled.
+ */
+void drm_vblank_work_enable(struct drm_vblank_work *work)
+{
+	WARN_ON(work->armed);
+
+	/* Ensure previous writes are visible */
+	smp_wmb();
+
+	WRITE_ONCE(work->armed, true);
+}
+EXPORT_SYMBOL(drm_vblank_work_enable);
+
 /**
  * drm_vblank_work_cancel_sync - cancel a vblank work and wait for it to
  * finish executing
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index e04d436b72973..e19351200da24 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -47,6 +47,14 @@ struct drm_vblank_work {
 	 */
 	int cancelling;
 
+	/**
+	 * @armed: If false, the work item has been added to the
+	 * drm_vblank_crtc.pending_work list, but will not yet be signalled.
+	 *
+	 * Call drm_vblank_work_enable() to fire on next vblank.
+	 */
+	bool armed;
+
 	/**
 	 * @node: The position of this work item in
 	 * &drm_vblank_crtc.pending_work.
@@ -64,6 +72,10 @@ struct drm_vblank_work {
 
 int drm_vblank_work_schedule(struct drm_vblank_work *work,
 			     u64 count, bool nextonmiss);
+
+int drm_vblank_work_schedule_disabled(struct drm_vblank_work *work, u64 count);
+void drm_vblank_work_enable(struct drm_vblank_work *work);
+
 void drm_vblank_work_init(struct drm_vblank_work *work, struct drm_crtc *crtc,
 			  void (*func)(struct kthread_work *work));
 bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
-- 
2.53.0

[PATCH v9 02/30] drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event

[Maarten Lankhorst]

When trying to fix the hardware programming in intel/display, I had
to take all the vblank locks with local_irqs_disabled(). This
required converting the entire vblank code to raw spinlocks.

In the alternative approach, do all preparations in advance, and only
enable the vblank_event with interrupts disabled, this requires only
a simple write and prevents a complete re-architecture of the code.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/drm_vblank.c | 64 +++++++++++++++++++++++++++++++++++-
 include/drm/drm_vblank.h     | 14 +++++++-
 2 files changed, 76 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index f90fb2d13e423..b52e0215312f8 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -1127,12 +1127,71 @@ void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,
 
 	assert_spin_locked(&dev->event_lock);
 
+	WARN_ON(e->postponed);
 	e->pipe = pipe;
 	e->sequence = drm_crtc_accurate_vblank_count(crtc) + 1;
 	list_add_tail(&e->base.link, &dev->vblank_event_list);
 }
 EXPORT_SYMBOL(drm_crtc_arm_vblank_event);
 
+/**
+ * drm_crtc_prepare_arm_vblank_event - arm vblank event *before* pageflip.
+ * @crtc: the source CRTC of the vblank event
+ * @e: the event to send
+ *
+ * See drm_crtc_arm_vblank_event(). This function is a 2-stage version of
+ * that call. This function is called *BEFORE* programming the hardware.
+ *
+ * After programming, call drm_crtc_arm_prepared_vblank_event() and the
+ * event will be scheduled on the next vblank.
+ *
+ * This is mainly useful for code that has to run on PREEMPT_RT kernels,
+ * with interrupts disabled, since all vblank spinlocks are converted to
+ * rtmutexes, and code running with irqs disabled cannot take any vblank lock.
+ *
+ * It also increases determinism for any hardware
+ * programming, since no vblank related locks are taking when arming.
+ */
+void drm_crtc_prepare_arm_vblank_event(struct drm_crtc *crtc,
+				       struct drm_pending_vblank_event *e)
+{
+	drm_crtc_arm_vblank_event(crtc, e);
+
+	/* Set the flag, so that the event is not fired yet */
+	e->postponed = true;
+}
+EXPORT_SYMBOL(drm_crtc_prepare_arm_vblank_event);
+
+/**
+ * drm_crtc_arm_prepared_vblank_event - arm prepared vblank event *after* pageflip.
+ * @crtc: the source CRTC of the vblank event
+ * @e: the event to send
+ *
+ * See drm_crtc_prepare_arm_vblank_event(). This function is a 2-stage version of
+ * that call. This function is called directly *AFTER* programming the hardware.
+ *
+ * Before this function is called, drm_crtc_prepare_arm_vblank_event() should be
+ * called instead.
+ *
+ * This is mainly useful for code that has to run on PREEMPT_RT kernels,
+ * with interrupts disabled, since all vblank spinlocks are converted to
+ * rtmutexes, and code running with irqs disabled cannot take any vblank lock.
+ *
+ * It also increases determinism for any hardware
+ * programming, since no vblank related locks are taking when arming.
+ */
+void drm_crtc_arm_prepared_vblank_event(struct drm_pending_vblank_event *e)
+{
+	WARN_ON(!e->postponed);
+
+	/* Ensure previous writes are visible */
+	smp_wmb();
+
+	/* remove the flag to be processed as a normal event */
+	WRITE_ONCE(e->postponed, false);
+}
+EXPORT_SYMBOL(drm_crtc_arm_prepared_vblank_event);
+
 /**
  * drm_crtc_send_vblank_event - helper to send vblank event after pageflip
  * @crtc: the source CRTC of the vblank event
@@ -1390,6 +1449,8 @@ void drm_crtc_vblank_off(struct drm_crtc *crtc)
 	list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
 		if (e->pipe != pipe)
 			continue;
+
+		WARN_ON(e->postponed);
 		drm_dbg_core(dev, "Sending premature vblank event on disable: "
 			     "wanted %llu, current %llu\n",
 			     e->sequence, seq);
@@ -1892,7 +1953,8 @@ static void drm_handle_vblank_events(struct drm_device *dev, unsigned int pipe)
 	seq = drm_vblank_count_and_time(dev, pipe, &now);
 
 	list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
-		if (e->pipe != pipe)
+		/* Matches WRITE_ONCE in drm_crtc_arm_prepared_vblank_event() */
+		if (e->pipe != pipe || READ_ONCE(e->postponed))
 			continue;
 		if (!drm_vblank_passed(seq, e->sequence))
 			continue;
diff --git a/include/drm/drm_vblank.h b/include/drm/drm_vblank.h
index 2fcef9c0f5b1b..956d5621eb7f9 100644
--- a/include/drm/drm_vblank.h
+++ b/include/drm/drm_vblank.h
@@ -53,6 +53,13 @@ struct drm_pending_vblank_event {
 	 * @sequence: frame event should be triggered at
 	 */
 	u64 sequence;
+
+	/**
+	 * @postponed: whether drm_crtc_prepare_arm_vblank_event() is called,
+	 * and drm_crtc_arm_prepared_vblank_event has yet to be called to arm.
+	 */
+	bool postponed;
+
 	/**
 	 * @event: Actual event which will be sent to userspace.
 	 */
@@ -294,7 +301,12 @@ int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime);
 void drm_crtc_send_vblank_event(struct drm_crtc *crtc,
 			       struct drm_pending_vblank_event *e);
 void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,
-			      struct drm_pending_vblank_event *e);
+			       struct drm_pending_vblank_event *e);
+
+void drm_crtc_prepare_arm_vblank_event(struct drm_crtc *crtc,
+				       struct drm_pending_vblank_event *e);
+void drm_crtc_arm_prepared_vblank_event(struct drm_pending_vblank_event *e);
+
 void drm_vblank_set_event(struct drm_pending_vblank_event *e,
 			  u64 *seq,
 			  ktime_t *now);
-- 
2.53.0

[PATCH v9 03/30] drm/intel/display: Make intel_crtc_arm_vblank_event static

[Maarten Lankhorst]

Only used inside intel_crtc.c now, so no need to export it any more.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
 drivers/gpu/drm/i915/display/intel_crtc.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 10ed9bdfee763..805645318747f 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -684,7 +684,7 @@ static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
 #endif
 
-void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
+static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	unsigned long irqflags;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h b/drivers/gpu/drm/i915/display/intel_crtc.h
index 12507b51ee77e..f65cbafe2b42a 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.h
+++ b/drivers/gpu/drm/i915/display/intel_crtc.h
@@ -33,7 +33,6 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
 			     int usecs);
 int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode,
 			     int scanlines);
-void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state);
 void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
 				     struct drm_pending_vblank_event **event);
 u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state);
-- 
2.53.0

[PATCH v9 04/30] drm/intel/display: Convert vblank event handling to 2-stage arming

[Maarten Lankhorst]

This is converts the vblank functions to be called with interrupts
disabled, even on PREEMPT_RT kernels.

Because the PREEMPT_RT kernel converts all spinlocks to rt-mutexes,
the normal vblank functions cannot be used inside the critical section.

Instead, prepare the vblank at the start, and then enable the vblank
work after the hardware programming is completed.

This allows us to keep programming the hardware with interrupts
disabled, and still schedule completion on PREEMPT_RT on next vblank.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 84 ++++++++++++-----------
 1 file changed, 44 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 805645318747f..34a159f7c9a43 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -527,6 +527,10 @@ static void intel_crtc_vblank_work_init(struct intel_crtc_state *crtc_state)
 
 	drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,
 			     intel_crtc_vblank_work);
+
+	drm_vblank_work_schedule_disabled(&crtc_state->vblank_work,
+					  drm_crtc_accurate_vblank_count(&crtc->base) + 1);
+
 	/*
 	 * Interrupt latency is critical for getting the vblank
 	 * work executed as early as possible during the vblank.
@@ -571,6 +575,21 @@ int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode,
 				adjusted_mode->crtc_clock);
 }
 
+static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	unsigned long irqflags;
+
+	if (!crtc_state->uapi.event)
+		return;
+
+	drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);
+
+	spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
+	drm_crtc_prepare_arm_vblank_event(&crtc->base, crtc_state->uapi.event);
+	spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
+}
+
 /**
  * intel_pipe_update_start() - start update of a set of display registers
  * @state: the atomic state
@@ -607,6 +626,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
 
 	if (intel_crtc_needs_vblank_work(new_crtc_state))
 		intel_crtc_vblank_work_init(new_crtc_state);
+	else
+		intel_crtc_arm_vblank_event(new_crtc_state);
 
 	if (state->base.legacy_cursor_update) {
 		struct intel_plane *plane;
@@ -684,23 +705,6 @@ static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
 #endif
 
-static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
-{
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	unsigned long irqflags;
-
-	if (!crtc_state->uapi.event)
-		return;
-
-	drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);
-
-	spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
-	drm_crtc_arm_vblank_event(&crtc->base, crtc_state->uapi.event);
-	spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
-
-	crtc_state->uapi.event = NULL;
-}
-
 void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
 				     struct drm_pending_vblank_event **event)
 {
@@ -754,29 +758,10 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	 * event outside of the critical section - the spinlock might spin for a
 	 * while ... */
 	if (intel_crtc_needs_vblank_work(new_crtc_state)) {
-		drm_vblank_work_schedule(&new_crtc_state->vblank_work,
-					 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
-					 false);
-	} else {
-		intel_crtc_arm_vblank_event(new_crtc_state);
-	}
-
-	if (state->base.legacy_cursor_update) {
-		struct intel_plane *plane;
-		struct intel_plane_state *old_plane_state;
-		int i;
-
-		for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {
-			if (old_plane_state->hw.crtc == &crtc->base &&
-			    old_plane_state->unpin_work.vblank) {
-				drm_vblank_work_schedule(&old_plane_state->unpin_work,
-							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
-							 false);
-
-				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */
-				memset(&state->base.planes[i], 0, sizeof(state->base.planes[i]));
-			}
-		}
+		drm_vblank_work_enable(&new_crtc_state->vblank_work);
+	} else if (new_crtc_state->uapi.event) {
+		drm_crtc_arm_prepared_vblank_event(new_crtc_state->uapi.event);
+		new_crtc_state->uapi.event = NULL;
 	}
 
 	/*
@@ -800,6 +785,25 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 
 	local_irq_enable();
 
+	/* Run after local_irq_enable(), not timing sensitive */
+	if (state->base.legacy_cursor_update) {
+		struct intel_plane *plane;
+		struct intel_plane_state *old_plane_state;
+		int i;
+
+		for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {
+			if (old_plane_state->hw.crtc == &crtc->base &&
+			    old_plane_state->unpin_work.vblank) {
+				drm_vblank_work_schedule(&old_plane_state->unpin_work,
+							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
+							 false);
+
+				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */
+				memset(&state->base.planes[i], 0, sizeof(state->base.planes[i]));
+			}
+		}
+	}
+
 	if (intel_parent_vgpu_active(display))
 		goto out;
 
-- 
2.53.0

[PATCH v9 05/30] drm/i915/display: Move vblank put until after critical section

[Maarten Lankhorst]

drm_crtc_vblank_put may take some locks, this should probably
not be the first thing we do after entering the time sensitive
part.

A better place is after programming is completed. Add a flag
to put the vblank after completion.

In the case of drm_vblank_work_schedule, we may not even need
to disable the vblank interrupt any more if it takes its own
reference.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 88384dea868b4..68b44a00567e4 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -816,6 +816,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 		to_intel_crtc_state(crtc->base.state);
 	struct intel_crtc_state *new_crtc_state;
 	struct intel_vblank_evade_ctx evade;
+	bool has_vblank = false;
 	int ret;
 
 	/*
@@ -913,6 +914,8 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 	intel_psr_lock(crtc_state);
 
 	if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
+		has_vblank = true;
+
 		/*
 		 * TODO: maybe check if we're still in PSR
 		 * and skip the vblank evasion entirely?
@@ -922,8 +925,6 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 		local_irq_disable();
 
 		intel_vblank_evade(&evade);
-
-		drm_crtc_vblank_put(&crtc->base);
 	} else {
 		local_irq_disable();
 	}
@@ -939,6 +940,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 
 	intel_psr_unlock(crtc_state);
 
+	if (has_vblank)
+		drm_crtc_vblank_put(&crtc->base);
+
 	if (old_plane_state->ggtt_vma != new_plane_state->ggtt_vma) {
 		drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,
 				     intel_cursor_unpin_work);
-- 
2.53.0

[PATCH v9 06/30] drm/i915/display: Remove locking from intel_vblank_evade critical section

[Maarten Lankhorst]

finish_wait() may take a lock, which means that it can take any amount
of time. On PREEMPT-RT we should not be taking any lock after disabling
preemption, so ensure that the completion is done before disabling
interrupts.

This also has the benefit of making vblank evasion more deterministic,
by performing the final vblank check after all locking is done.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_vblank.c | 30 +++++++++------------
 drivers/gpu/drm/i915/display/intel_vblank.h |  1 +
 3 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 34a159f7c9a43..8218938985b41 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -734,7 +734,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	enum pipe pipe = crtc->pipe;
-	int scanline_end = intel_get_crtc_scanline(crtc);
+	int scanline_end = __intel_get_crtc_scanline(crtc);
 	u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
 	ktime_t end_vbl_time = ktime_get();
 
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 28d81199792ef..ca08059e088ea 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -241,7 +241,7 @@ int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
  * intel_de_read_fw(), only for fast reads of display block, no need for
  * forcewake etc.
  */
-static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
+int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
 	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);
@@ -732,6 +732,16 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
 		evade->min -= vblank_delay;
 }
 
+static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *scanline, bool unlocked)
+{
+	if (unlocked)
+		*scanline = intel_get_crtc_scanline(evade->crtc);
+	else
+		*scanline = __intel_get_crtc_scanline(evade->crtc);
+
+	return *scanline < evade->min || *scanline > evade->max;
+}
+
 /* must be called with vblank interrupt already enabled! */
 int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 {
@@ -739,24 +749,12 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 	struct intel_display *display = to_intel_display(crtc);
 	long timeout = msecs_to_jiffies_timeout(1);
 	wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
-	DEFINE_WAIT(wait);
 	int scanline;
 
 	if (evade->min <= 0 || evade->max <= 0)
 		return 0;
 
-	for (;;) {
-		/*
-		 * prepare_to_wait() has a memory barrier, which guarantees
-		 * other CPUs can see the task state update by the time we
-		 * read the scanline.
-		 */
-		prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
-
-		scanline = intel_get_crtc_scanline(crtc);
-		if (scanline < evade->min || scanline > evade->max)
-			break;
-
+	while (!scanline_in_safe_range(evade, &scanline, false)) {
 		if (!timeout) {
 			drm_dbg_kms(display->drm,
 				    "Potential atomic update failure on pipe %c\n",
@@ -766,13 +764,11 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 
 		local_irq_enable();
 
-		timeout = schedule_timeout(timeout);
+		timeout = wait_event_timeout(*wq, scanline_in_safe_range(evade, &scanline, true), timeout);
 
 		local_irq_disable();
 	}
 
-	finish_wait(wq, &wait);
-
 	/*
 	 * On VLV/CHV DSI the scanline counter would appear to
 	 * increment approx. 1/3 of a scanline before start of vblank.
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h
index 98d04cacd65f8..aa1974400e9fc 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.h
+++ b/drivers/gpu/drm/i915/display/intel_vblank.h
@@ -38,6 +38,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc);
 bool intel_crtc_get_vblank_timestamp(struct drm_crtc *crtc, int *max_error,
 				     ktime_t *vblank_time, bool in_vblank_irq);
 int intel_get_crtc_scanline(struct intel_crtc *crtc);
+int __intel_get_crtc_scanline(struct intel_crtc *crtc);
 void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc);
 void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc);
 void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
-- 
2.53.0

[PATCH v9 07/30] drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too

[Maarten Lankhorst]

Now that we have a macro, might as well handle the VLV dsi workaround
too.

This makes the vblank evasion code slightly more deterministic, by not
looping with interrupts disabled.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 36 ++++++++++-----------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index ca08059e088ea..6f1fa952b5391 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -739,6 +739,24 @@ static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *sc
 	else
 		*scanline = __intel_get_crtc_scanline(evade->crtc);
 
+	/*
+	 * On VLV/CHV DSI the scanline counter would appear to
+	 * increment approx. 1/3 of a scanline before start of vblank.
+	 * The registers still get latched at start of vblank however.
+	 * This means we must not write any registers on the first
+	 * line of vblank (since not the whole line is actually in
+	 * vblank). And unfortunately we can't use the interrupt to
+	 * wait here since it will fire too soon. We could use the
+	 * frame start interrupt instead since it will fire after the
+	 * critical scanline, but that would require more changes
+	 * in the interrupt code. So for now we'll just do the nasty
+	 * thing and poll for the bad scanline to pass us by.
+	 *
+	 * FIXME figure out if BXT+ DSI suffers from this as well
+	 */
+	if (evade->need_vlv_dsi_wa && *scanline == evade->vblank_start)
+		return false;
+
 	return *scanline < evade->min || *scanline > evade->max;
 }
 
@@ -769,24 +787,6 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 		local_irq_disable();
 	}
 
-	/*
-	 * On VLV/CHV DSI the scanline counter would appear to
-	 * increment approx. 1/3 of a scanline before start of vblank.
-	 * The registers still get latched at start of vblank however.
-	 * This means we must not write any registers on the first
-	 * line of vblank (since not the whole line is actually in
-	 * vblank). And unfortunately we can't use the interrupt to
-	 * wait here since it will fire too soon. We could use the
-	 * frame start interrupt instead since it will fire after the
-	 * critical scanline, but that would require more changes
-	 * in the interrupt code. So for now we'll just do the nasty
-	 * thing and poll for the bad scanline to pass us by.
-	 *
-	 * FIXME figure out if BXT+ DSI suffers from this as well
-	 */
-	while (evade->need_vlv_dsi_wa && scanline == evade->vblank_start)
-		scanline = intel_get_crtc_scanline(crtc);
-
 	return scanline;
 }
 
-- 
2.53.0

[PATCH v9 08/30] drm/i915: Use preempt_disable/enable_rt() where recommended

[Maarten Lankhorst]

From: Mike Galbraith <umgwanakikbuti@gmail.com>

Mario Kleiner suggest in commit
  ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.")

a spots where preemption should be disabled on PREEMPT_RT. The
difference is that on PREEMPT_RT the intel_uncore::lock disables neither
preemption nor interrupts and so region remains preemptible.

The area covers only register reads and writes. The part that worries me
is:
- __intel_get_crtc_scanline() the worst case is 100us if no match is
  found.

- intel_crtc_scanlines_since_frame_timestamp() not sure how long this
  may take in the worst case.

It was in the RT queue for a while and nobody complained.
Disable preemption on PREEPMPT_RT during timestamping.

[bigeasy: patch description.]

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Mike Galbraith <umgwanakikbuti@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 43 ++++++++++++++++-----
 1 file changed, 33 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 6f1fa952b5391..07dca05332e5b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -316,6 +316,20 @@ static void intel_vblank_section_exit(struct intel_display *display)
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	spin_unlock(&uncore->lock);
 }
+
+static void intel_vblank_section_enter_irqf(struct intel_display *display, unsigned long *flags)
+	__acquires(i915->uncore.lock)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_lock_irqsave(&uncore->lock, *flags);
+}
+
+static void intel_vblank_section_exit_irqf(struct intel_display *display, unsigned long flags)
+	__releases(i915->uncore.lock)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_unlock_irqrestore(&uncore->lock, flags);
+}
 #else
 static void intel_vblank_section_enter(struct intel_display *display)
 {
@@ -324,6 +338,17 @@ static void intel_vblank_section_enter(struct intel_display *display)
 static void intel_vblank_section_exit(struct intel_display *display)
 {
 }
+
+static void intel_vblank_section_enter_irqf(struct intel_display *display, unsigned long *flags)
+{
+	*flags = 0;
+}
+
+static void intel_vblank_section_exit_irqf(struct intel_display *display, unsigned long flags)
+{
+	if (flags)
+		return;
+}
 #endif
 
 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
@@ -360,10 +385,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	 * timing critical raw register reads, potentially with
 	 * preemption disabled, so the following code must not block.
 	 */
-	local_irq_save(irqflags);
-	intel_vblank_section_enter(display);
+	intel_vblank_section_enter_irqf(display, &irqflags);
 
-	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+	if (IS_ENABLED(CONFIG_PREEMPT_RT))
+		preempt_disable();
 
 	/* Get optional system timestamp before query. */
 	if (stime)
@@ -427,10 +452,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	if (etime)
 		*etime = ktime_get();
 
-	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
+	if (IS_ENABLED(CONFIG_PREEMPT_RT))
+		preempt_enable();
 
-	intel_vblank_section_exit(display);
-	local_irq_restore(irqflags);
+	intel_vblank_section_exit_irqf(display, irqflags);
 
 	/*
 	 * While in vblank, position will be negative
@@ -468,13 +493,11 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
 	unsigned long irqflags;
 	int position;
 
-	local_irq_save(irqflags);
-	intel_vblank_section_enter(display);
+	intel_vblank_section_enter_irqf(display, &irqflags);
 
 	position = __intel_get_crtc_scanline(crtc);
 
-	intel_vblank_section_exit(display);
-	local_irq_restore(irqflags);
+	intel_vblank_section_exit_irqf(display, irqflags);
 
 	return position;
 }
-- 
2.53.0

[PATCH v9 09/30] drm/i915/display: Make get_vblank_counter use intel_de_read_fw()

[Maarten Lankhorst]

Fixes the following lockdep splat on PREEMPT_RT:
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
<3> in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1373, name: xe_module_load
<3> preempt_count: 1, expected: 0
<3> RCU nest depth: 0, expected: 0
<4> 11 locks held by xe_module_load/1373:
<4>  #0: ffff888107b691a0 (&dev->mutex){....}-{3:3}, at: __driver_attach+0x104/0x220
<4>  #1: ffff88813cd30280 (&dev->clientlist_mutex){+.+.}-{3:3}, at: drm_client_register+0x32/0xe0
<4>  #2: ffffffff837f88f8 (registration_lock){+.+.}-{3:3}, at: register_framebuffer+0x1b/0x50
<4>  #3: ffffffff835985e0 (console_lock){+.+.}-{0:0}, at: fbcon_fb_registered+0x6f/0x90
<4>  #4: ffff88812589e6a0 (&helper->lock){+.+.}-{3:3}, at: __drm_fb_helper_restore_fbdev_mode_unlocked+0x7b/0x110
<4>  #5: ffff88813cd30158 (&dev->master_mutex){+.+.}-{3:3}, at: drm_master_internal_acquire+0x20/0x50
<4>  #6: ffff88812589e488 (&client->modeset_mutex){+.+.}-{3:3}, at: drm_client_modeset_commit_locked+0x2a/0x1b0
<4>  #7: ffffc9000031eef0 (crtc_ww_class_acquire){+.+.}-{0:0}, at: drm_client_modeset_commit_atomic+0x4c/0x2b0
<4>  #8: ffffc9000031ef18 (crtc_ww_class_mutex){+.+.}-{3:3}, at: drm_client_modeset_commit_atomic+0x4c/0x2b0
<4>  #9: ffff888114f7b8b8 (&intel_dp->psr.lock){+.+.}-{3:3}, at: intel_psr_lock+0xc5/0xf0 [xe]
<4>  #10: ffff88812a0cbbc0 (&wl->lock){+.+.}-{2:2}, at: intel_dmc_wl_get+0x3c/0x140 [xe]

This splat will happen otherwise on all tracepoints too, for similar reasons.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 07dca05332e5b..c0cc0a4c25dbe 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -132,7 +132,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc)
 	if (!vblank->max_vblank_count)
 		return 0;
 
-	return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe));
+	return intel_de_read_fw(display, PIPE_FRMCOUNT_G4X(display, pipe));
 }
 
 static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
-- 
2.53.0

[PATCH v9 10/30] drm/i915/display: Do not take uncore lock in i915_get_vblank_counter

[Maarten Lankhorst]

This fixes a lockdep splat that occurs in the code that should be run
with interrupts disabled. The uncore and DMC locks should not be taken
and released repeatedly in a timing sensitive path.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_de.h       |  8 ++++++
 drivers/gpu/drm/i915/display/intel_vblank.c   |  4 +--
 drivers/gpu/drm/i915/intel_uncore.h           | 26 +++++++++++++------
 .../drm/xe/compat-i915-headers/intel_uncore.h |  7 +++++
 4 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 1029790194296..497a308322847 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -65,6 +65,14 @@ intel_de_read64_2x32(struct intel_display *display, intel_reg_t reg)
 	return (u64)upper << 32 | lower;
 }
 
+static inline u64
+intel_de_read64_2x32_fw(struct intel_display *display,
+			i915_reg_t lower_reg, i915_reg_t upper_reg)
+{
+	return intel_uncore_read64_2x32_fw(__to_uncore(display),
+					   lower_reg, upper_reg);
+}
+
 static inline void
 intel_de_posting_read(struct intel_display *display, intel_reg_t reg)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index c0cc0a4c25dbe..5ca22899055d7 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
 	 * we get a low value that's stable across two reads of the high
 	 * register.
 	 */
-	frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
-					      PIPEFRAME(display, pipe));
+	frame = intel_de_read64_2x32_fw(display, PIPEFRAMEPIXEL(display, pipe),
+				        PIPEFRAME(display, pipe));
 
 	pixel = frame & PIPE_PIXEL_MASK;
 	frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index fafc2ca9a2376..507398a562649 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -449,13 +449,28 @@ static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
 		intel_uncore_write_fw(uncore, reg, val);
 }
 
+static inline u64
+intel_uncore_read64_2x32_fw(struct intel_uncore *uncore,
+			    i915_reg_t lower_reg, i915_reg_t upper_reg)
+{
+	u32 upper, lower, old_upper, loop = 0;
+	upper = intel_uncore_read_fw(uncore, upper_reg);
+	do {
+		old_upper = upper;
+		lower = intel_uncore_read_fw(uncore, lower_reg);
+		upper = intel_uncore_read_fw(uncore, upper_reg);
+	} while (upper != old_upper && loop++ < 2);
+
+	return (u64)upper << 32 | lower;
+}
+
 static inline u64
 intel_uncore_read64_2x32(struct intel_uncore *uncore,
 			 i915_reg_t lower_reg, i915_reg_t upper_reg)
 {
-	u32 upper, lower, old_upper, loop = 0;
 	enum forcewake_domains fw_domains;
 	unsigned long flags;
+	u64 ret;
 
 	fw_domains = intel_uncore_forcewake_for_reg(uncore, lower_reg,
 						    FW_REG_READ);
@@ -466,17 +481,12 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
 	spin_lock_irqsave(&uncore->lock, flags);
 	intel_uncore_forcewake_get__locked(uncore, fw_domains);
 
-	upper = intel_uncore_read_fw(uncore, upper_reg);
-	do {
-		old_upper = upper;
-		lower = intel_uncore_read_fw(uncore, lower_reg);
-		upper = intel_uncore_read_fw(uncore, upper_reg);
-	} while (upper != old_upper && loop++ < 2);
+	ret = intel_uncore_read64_2x32_fw(uncore, lower_reg, upper_reg);
 
 	intel_uncore_forcewake_put__locked(uncore, fw_domains);
 	spin_unlock_irqrestore(&uncore->lock, flags);
 
-	return (u64)upper << 32 | lower;
+	return ret;
 }
 
 static inline int intel_uncore_write_and_verify(struct intel_uncore *uncore,
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
index 08d7ab9336725..764bc94044537 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
@@ -74,6 +74,13 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
 	return (u64)upper << 32 | lower;
 }
 
+static inline u64
+intel_uncore_read64_2x32_fw(struct intel_uncore *uncore,
+			    i915_reg_t i915_lower_reg, i915_reg_t i915_upper_reg)
+{
+	return intel_uncore_read64_2x32(uncore, i915_lower_reg, i915_upper_reg);
+}
+
 static inline void intel_uncore_posting_read(struct intel_uncore *uncore,
 					     i915_reg_t i915_reg)
 {
-- 
2.53.0

[PATCH v9 11/30] drm/i915/display: Make icl_dsi_frame_update use _fw too

[Maarten Lankhorst]

Don't use the dmc lock inside the vblank critical section,
not even as last call.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index a549f1fac8103..277804638f207 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -242,8 +242,8 @@ void icl_dsi_frame_update(struct intel_crtc_state *crtc_state)
 	else
 		return;
 
-	intel_de_rmw(display, DSI_CMD_FRMCTL(port), 0,
-		     DSI_FRAME_UPDATE_REQUEST);
+	intel_de_rmw_fw(display, DSI_CMD_FRMCTL(port), 0,
+			DSI_FRAME_UPDATE_REQUEST);
 }
 
 static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
-- 
2.53.0

[PATCH v9 12/30] drm/i915/display: Use intel_de_read/write_fw in colorops

[Maarten Lankhorst]

Using the _fw variants fixes a module load error on PTL:

<4> [363.690050] Call Trace:
<4> [363.690052]  <TASK>
<4> [363.690055]  dump_stack_lvl+0x91/0xf0
<4> [363.690067]  dump_stack+0x10/0x20
<4> [363.690074]  __might_resched+0x174/0x260
<4> [363.690087]  rt_spin_lock+0x63/0x200
<4> [363.690092]  ? intel_dmc_wl_get+0x3c/0x140 [xe]
<4> [363.690470]  ? __lock_acquire+0x1195/0x2860
<4> [363.690487]  intel_dmc_wl_get+0x3c/0x140 [xe]
<4> [363.690842]  intel_color_plane_commit_arm+0xbc/0x140 [xe]
<4> [363.691246]  icl_plane_update_arm+0x23f/0x280 [xe]
<4> [363.691605]  intel_plane_update_arm+0x74/0x170 [xe]
<4> [363.691970]  intel_crtc_planes_update_arm+0x3cb/0x4c0 [xe]
<4> [363.692338]  intel_update_crtc+0x1c3/0x840 [xe]
<4> [363.692742]  ? intel_pre_update_crtc+0x2ce/0x470 [xe]
<4> [363.693125]  ? intel_enable_crtc+0x123/0x150 [xe]
<4> [363.693508]  skl_commit_modeset_enables+0x4c4/0x720 [xe]
<4> [363.693888]  intel_atomic_commit_tail+0xd9d/0x1b30 [xe]
<4> [363.694274]  intel_atomic_commit+0x2e8/0x330 [xe]
<4> [363.694621]  ? intel_atomic_commit+0x2e8/0x330 [xe]
<4> [363.694956]  drm_atomic_commit+0xaf/0xf0
<4> [363.694962]  ? __pfx___drm_printfn_info+0x10/0x10
<4> [363.694978]  drm_client_modeset_commit_atomic+0x25c/0x2b0
<4> [363.695018]  drm_client_modeset_commit_locked+0x63/0x1b0
<4> [363.695029]  drm_client_modeset_commit+0x26/0x50
<4> [363.695035]  __drm_fb_helper_restore_fbdev_mode_unlocked+0xdc/0x110
<4> [363.695045]  drm_fb_helper_set_par+0x2f/0x50
<4> [363.695052]  intel_fbdev_set_par+0x39/0x90 [xe]
<4> [363.695365]  fbcon_init+0x283/0x680
<4> [363.695382]  visual_init+0xf2/0x190
<4> [363.695396]  do_bind_con_driver.isra.0+0x1f1/0x4c0
<4> [363.695416]  do_take_over_console+0x181/0x220
<4> [363.695422]  ? vprintk_default+0x1d/0x30
<4> [363.695436]  do_fbcon_takeover+0x85/0x160
<4> [363.695447]  do_fb_registered+0x24c/0x2b0
<4> [363.695460]  fbcon_fb_registered+0x3a/0x90
<4> [363.695469]  do_register_framebuffer+0x216/0x320
<4> [363.695488]  register_framebuffer+0x23/0x50
<4> [363.695494]  __drm_fb_helper_initial_config_and_unlock+0x3ea/0x670
<4> [363.695502]  ? trace_hardirqs_on+0x1e/0xd0
<4> [363.695526]  drm_fb_helper_initial_config+0x3f/0x50
<4> [363.695534]  drm_fbdev_client_hotplug+0x80/0xd0
<4> [363.695543]  drm_client_register+0x8a/0xe0
<4> [363.695556]  drm_fbdev_client_setup+0x127/0x1f0
<4> [363.695563]  drm_client_setup+0xa7/0xe0
<4> [363.695569]  drm_client_setup_with_color_mode+0x24/0x40
<4> [363.695575]  intel_fbdev_setup+0x1c6/0x510 [xe]
<4> [363.695857]  intel_display_driver_register+0xb5/0x100 [xe]
<4> [363.696188]  ? __pfx___drm_printfn_dbg+0x10/0x10
<4> [363.696194]  ? intel_display_driver_register+0x2e/0x100 [xe]
<4> [363.696515]  xe_display_register+0x29/0x40 [xe]
<4> [363.696858]  xe_device_probe+0x51a/0x9e0 [xe]
<4> [363.697102]  ? __drmm_add_action+0x98/0x110
<4> [363.697108]  ? __pfx___drmm_mutex_release+0x10/0x10
<4> [363.697116]  ? __drmm_add_action_or_reset+0x1e/0x50
<4> [363.697130]  xe_pci_probe+0x396/0x620 [xe]
<4> [363.697423]  local_pci_probe+0x47/0xb0
<4> [363.697431]  pci_device_probe+0xf3/0x260
<4> [363.697444]  really_probe+0xf1/0x3c0
<4> [363.697451]  __driver_probe_device+0x8c/0x180
<4> [363.697458]  driver_probe_device+0x24/0xd0
<4> [363.697464]  __driver_attach+0x10f/0x220
<4> [363.697468]  ? __pfx___driver_attach+0x10/0x10
<4> [363.697472]  bus_for_each_dev+0x7f/0xe0
<4> [363.697484]  driver_attach+0x1e/0x30
<4> [363.697487]  bus_add_driver+0x154/0x290
<4> [363.697498]  driver_register+0x5e/0x130
<4> [363.697504]  __pci_register_driver+0x84/0xa0
<4> [363.697509]  xe_register_pci_driver+0x23/0x30 [xe]
<4> [363.697762]  xe_init+0x2c/0x110 [xe]
<4> [363.698007]  ? __pfx_xe_init+0x10/0x10 [xe]
<4> [363.698239]  do_one_initcall+0x60/0x3f0
<4> [363.698250]  ? __kmalloc_cache_noprof+0x470/0x690
<4> [363.698267]  do_init_module+0x97/0x2b0
<4> [363.698275]  load_module+0x2d08/0x2e30
<4> [363.698280]  ? __kernel_read+0x164/0x310
<4> [363.698312]  ? kernel_read_file+0x2ca/0x340
<4> [363.698328]  init_module_from_file+0x96/0xe0
<4> [363.698330]  ? init_module_from_file+0x96/0xe0
<4> [363.698357]  idempotent_init_module+0x11d/0x340
<4> [363.698384]  __x64_sys_finit_module+0x73/0xe0
<4> [363.698393]  x64_sys_call+0x1e3d/0x26a0
<4> [363.698399]  do_syscall_64+0x93/0xab0
<4> [363.698413]  ? ext4_llseek+0xc3/0x130
<4> [363.698425]  ? ksys_lseek+0x55/0xd0
<4> [363.698438]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698444]  ? switch_fpu_return+0xea/0x150
<4> [363.698454]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698465]  ? kernfs_fop_read_iter+0x197/0x210
<4> [363.698470]  ? rw_verify_area+0x16f/0x200
<4> [363.698482]  ? vfs_read+0x22a/0x360
<4> [363.698498]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698506]  ? ksys_read+0x72/0xf0
<4> [363.698520]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698526]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698532]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698535]  ? exc_page_fault+0xbd/0x2c0
<4> [363.698545]  entry_SYSCALL_64_after_hwframe+0x76/0x7e
<4> [363.698549] RIP: 0033:0x715af255025d

And a similar backtrace in hsw_color_commit_arm().

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff408..cc3cdb90d6975 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1050,7 +1050,7 @@ static void hsw_color_commit_arm(struct intel_dsb *dsb,
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct intel_display *display = to_intel_display(crtc);
 
-	intel_de_write(display, GAMMA_MODE(crtc->pipe),
+	intel_de_write_fw(display, GAMMA_MODE(crtc->pipe),
 		       crtc_state->gamma_mode);
 
 	intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),
@@ -4066,7 +4066,7 @@ static void glk_load_lut_3d(struct intel_dsb *dsb,
 	int i, lut_size = drm_color_lut32_size(blob);
 	enum pipe pipe = crtc->pipe;
 
-	if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
+	if (!dsb && intel_de_read_fw(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
 		drm_err(display->drm, "[CRTC:%d:%s] 3D LUT not ready, not loading LUTs\n",
 			crtc->base.base.id, crtc->base.name);
 		return;
@@ -4084,7 +4084,7 @@ static void glk_lut_3d_commit(struct intel_dsb *dsb, struct intel_crtc *crtc, bo
 	enum pipe pipe = crtc->pipe;
 	u32 val = 0;
 
-	if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
+	if (!dsb && intel_de_read_fw(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
 		drm_err(display->drm, "[CRTC:%d:%s] 3D LUT not ready, not committing change\n",
 			crtc->base.base.id, crtc->base.name);
 		return;
-- 
2.53.0

[PATCH v9 13/30] drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset

[Maarten Lankhorst]

intel_set_pipe_src_size(), hsw_set_linetime_wm(),
intel_cpu_transcoder_set_m1_n1() and intel_set_transcoder_timings_lrr()
are called from an atomic context on PREEMPT_RT, and should be using the
_fw functions.

This likely prevents a deadlock on i915.

Again noticed when trying to disable preemption in vblank evasion:
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
<3> in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1505, name: kms_cursor_lega
<3> preempt_count: 1, expected: 0
<3> RCU nest depth: 0, expected: 0
<4> 4 locks held by kms_cursor_lega/1505:
<4>  #0: ffffc90003c6f988 (crtc_ww_class_acquire){+.+.}-{0:0}, at: drm_mode_atomic_ioctl+0x13b/0xe90
<4>  #1: ffffc90003c6f9b0 (crtc_ww_class_mutex){+.+.}-{3:3}, at: drm_mode_atomic_ioctl+0x13b/0xe90
<4>  #2: ffff888135b838b8 (&intel_dp->psr.lock){+.+.}-{3:3}, at: intel_psr_lock+0xc5/0xf0 [xe]
<4>  #3: ffff88812607bbc0 (&wl->lock){+.+.}-{2:2}, at: intel_dmc_wl_get+0x3c/0x140 [xe]
<4> CPU: 6 UID: 0 PID: 1505 Comm: kms_cursor_lega Tainted: G     U              6.18.0-rc3-lgci-xe-xe-pw-156729v1+ #1 PREEMPT_{RT,(lazy)}
<4> Tainted: [U]=USER
<4> Hardware name: Intel Corporation Panther Lake Client Platform/PTL-UH LP5 T3 RVP1, BIOS PTLPFWI1.R00.3383.D02.2509240621 09/24/2025
<4> Call Trace:
<4>  <TASK>
<4>  dump_stack_lvl+0xc1/0xf0
<4>  dump_stack+0x10/0x20
<4>  __might_resched+0x174/0x260
<4>  rt_spin_lock+0x63/0x200
<4>  ? intel_dmc_wl_get+0x3c/0x140 [xe]
<4>  intel_dmc_wl_get+0x3c/0x140 [xe]
<4>  intel_set_pipe_src_size+0x89/0xe0 [xe]
<4>  intel_update_crtc+0x3c1/0x950 [xe]
<4>  ? intel_pre_update_crtc+0x258/0x400 [xe]
<4>  skl_commit_modeset_enables+0x217/0x720 [xe]
<4>  intel_atomic_commit_tail+0xd4e/0x1af0 [xe]
<4>  ? lock_release+0xce/0x2a0
<4>  intel_atomic_commit+0x2e5/0x330 [xe]
<4>  ? intel_atomic_commit+0x2e5/0x330 [xe]
<4>  drm_atomic_commit+0xaf/0xf0
<4>  ? __pfx___drm_printfn_info+0x10/0x10
<4>  drm_mode_atomic_ioctl+0xbd5/0xe90
<4>  ? lock_acquire+0xc4/0x2e0
<4>  ? __pfx_drm_mode_atomic_ioctl+0x10/0x10
<4>  drm_ioctl_kernel+0xb6/0x120
<4>  drm_ioctl+0x2d7/0x5a0
<4>  ? __pfx_drm_mode_atomic_ioctl+0x10/0x10
<4>  ? rt_spin_unlock+0xa0/0x140
<4>  ? __pm_runtime_resume+0x53/0x90
<4>  xe_drm_ioctl+0x56/0x90 [xe]
<4>  __x64_sys_ioctl+0xa8/0x110
<4>  ? lock_acquire+0xc4/0x2e0
<4>  x64_sys_call+0x1144/0x26a0
<4>  do_syscall_64+0x93/0xae0
<4>  ? lock_release+0xce/0x2a0
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  ? find_held_lock+0x31/0x90
<4>  ? __task_pid_nr_ns+0xcf/0x270
<4>  ? __lock_acquire+0x43e/0x2860
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? lock_acquire+0xc4/0x2e0
<4>  ? find_held_lock+0x31/0x90
<4>  ? __task_pid_nr_ns+0xcf/0x270
<4>  ? lock_release+0xce/0x2a0
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  entry_SYSCALL_64_after_hwframe+0x76/0x7e

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c    |  6 +--
 drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++----------
 drivers/gpu/drm/i915/display/intel_vrr.c     | 18 ++++-----
 3 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 6da28c1850802..387d90df144da 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -326,7 +326,7 @@ void intel_cmtg_set_vrr_ctl(const struct intel_crtc_state *crtc_state)
 	if (crtc_state->cmrr.enable)
 		vrr_ctl |= VRR_CTL_CMRR_ENABLE;
 
-	intel_de_write(display, TRANS_VRR_CTL(display, cmtg_transcoder), vrr_ctl);
+	intel_de_write_fw(display, TRANS_VRR_CTL(display, cmtg_transcoder), vrr_ctl);
 }
 
 void intel_cmtg_set_m_n(const struct intel_crtc_state *crtc_state)
@@ -338,8 +338,8 @@ void intel_cmtg_set_m_n(const struct intel_crtc_state *crtc_state)
 	if (!intel_cmtg_is_allowed(crtc_state))
 		return;
 
-	intel_de_write(display, PIPE_LINK_M1(display, cmtg_transcoder), m_n->link_m);
-	intel_de_write(display, PIPE_LINK_N1(display, cmtg_transcoder), m_n->link_n);
+	intel_de_write_fw(display, PIPE_LINK_M1(display, cmtg_transcoder), m_n->link_m);
+	intel_de_write_fw(display, PIPE_LINK_N1(display, cmtg_transcoder), m_n->link_n);
 }
 
 static void intel_cmtg_enable_sync(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 805066b02aaaf..1d36bde149627 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1605,9 +1605,9 @@ static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state)
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
-	intel_de_write(display, WM_LINETIME(crtc->pipe),
-		       HSW_LINETIME(crtc_state->linetime) |
-		       HSW_IPS_LINETIME(crtc_state->ips_linetime));
+	intel_de_write_fw(display, WM_LINETIME(crtc->pipe),
+			  HSW_LINETIME(crtc_state->linetime) |
+			  HSW_IPS_LINETIME(crtc_state->ips_linetime));
 }
 
 static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
@@ -2607,14 +2607,14 @@ void intel_set_m_n(struct intel_display *display,
 		   intel_reg_t data_m_reg, intel_reg_t data_n_reg,
 		   intel_reg_t link_m_reg, intel_reg_t link_n_reg)
 {
-	intel_de_write(display, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
-	intel_de_write(display, data_n_reg, m_n->data_n);
-	intel_de_write(display, link_m_reg, m_n->link_m);
+	intel_de_write_fw(display, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
+	intel_de_write_fw(display, data_n_reg, m_n->data_n);
+	intel_de_write_fw(display, link_m_reg, m_n->link_m);
 	/*
 	 * On BDW+ writing LINK_N arms the double buffered update
 	 * of all the M/N registers, so it must be written last.
 	 */
-	intel_de_write(display, link_n_reg, m_n->link_n);
+	intel_de_write_fw(display, link_n_reg, m_n->link_n);
 }
 
 bool intel_cpu_transcoder_has_m2_n2(struct intel_display *display,
@@ -2794,9 +2794,9 @@ void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state,
 	}
 
 	if (DISPLAY_VER(display) >= 13) {
-		intel_de_write(display,
-			       TRANS_SET_CONTEXT_LATENCY(display, transcoder),
-			       crtc_state->set_context_latency);
+		intel_de_write_fw(display,
+				  TRANS_SET_CONTEXT_LATENCY(display, transcoder),
+				  crtc_state->set_context_latency);
 
 		/*
 		 * VBLANK_START not used by hw, just clear it
@@ -2812,9 +2812,9 @@ void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state,
 	 * The hardware actually ignores TRANS_VBLANK.VBLANK_END in DP mode.
 	 * But let's write it anyway to keep the state checker happy.
 	 */
-	intel_de_write(display, TRANS_VBLANK(display, transcoder),
-		       VBLANK_START(crtc_vblank_start - 1) |
-		       VBLANK_END(crtc_vblank_end - 1));
+	intel_de_write_fw(display, TRANS_VBLANK(display, transcoder),
+		          VBLANK_START(crtc_vblank_start - 1) |
+		          VBLANK_END(crtc_vblank_end - 1));
 
 	/*
 	 * DP doesn't have vertical sync, so TRANS_VSYNC only affects
@@ -2822,17 +2822,17 @@ void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state,
 	 * using the VRR timing generator!). Thus updating TRANS_VSYNC
 	 * here seems fine even if it isn't double buffered.
 	 */
-	intel_de_write(display, TRANS_VSYNC(display, transcoder),
-		       VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
-		       VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
+	intel_de_write_fw(display, TRANS_VSYNC(display, transcoder),
+			  VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
+			  VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
 
 	/*
 	 * The double buffer latch point for TRANS_VTOTAL
 	 * is the transcoder's undelayed vblank.
 	 */
-	intel_de_write(display, TRANS_VTOTAL(display, transcoder),
-		       VACTIVE(crtc_vdisplay - 1) |
-		       VTOTAL(crtc_vtotal - 1));
+	intel_de_write_fw(display, TRANS_VTOTAL(display, transcoder),
+			  VACTIVE(crtc_vdisplay - 1) |
+			  VTOTAL(crtc_vtotal - 1));
 }
 
 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state)
@@ -2846,8 +2846,8 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state)
 	/* pipesrc controls the size that is scaled from, which should
 	 * always be the user's requested size.
 	 */
-	intel_de_write(display, PIPESRC(display, pipe),
-		       PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
+	intel_de_write_fw(display, PIPESRC(display, pipe),
+			  PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
 }
 
 static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5d9b11185296f..ef94bf5d9c5f5 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -328,12 +328,12 @@ void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state,
 	if (!intel_vrr_possible(crtc_state))
 		return;
 
-	intel_de_write(display, TRANS_VRR_VMIN(display, transcoder),
-		       intel_vrr_fixed_rr_hw_vmin(crtc_state) - 1);
-	intel_de_write(display, TRANS_VRR_VMAX(display, transcoder),
-		       intel_vrr_fixed_rr_hw_vmax(crtc_state) - 1);
-	intel_de_write(display, TRANS_VRR_FLIPLINE(display, transcoder),
-		       intel_vrr_fixed_rr_hw_flipline(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_VMIN(display, transcoder),
+			  intel_vrr_fixed_rr_hw_vmin(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_VMAX(display, transcoder),
+			  intel_vrr_fixed_rr_hw_vmax(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_FLIPLINE(display, transcoder),
+			  intel_vrr_fixed_rr_hw_flipline(crtc_state) - 1);
 }
 
 static
@@ -919,8 +919,8 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 vrr_ctl;
 
-	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
-		       trans_vrr_push(crtc_state, false));
+	intel_de_write_fw(display, TRANS_PUSH(display, cpu_transcoder),
+			  trans_vrr_push(crtc_state, false));
 
 	vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
 
@@ -932,7 +932,7 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
 	if (cmrr_enable)
 		vrr_ctl |= VRR_CTL_CMRR_ENABLE;
 
-	intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl);
+	intel_de_write_fw(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl);
 
 	intel_cmtg_set_vrr_ctl(crtc_state);
 }
-- 
2.53.0

[PATCH v9 14/30] drm/i915/display: Make set_pipeconf use the fw variants

[Maarten Lankhorst]

The calls are used inside the critical section when updating
the gamma mode, and thus should use the _fw variants to prevent
locks.

Fixes following splat:
| BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
| in_atomic(): 0, irqs_disabled(): 1, non_block: 0, pid: 2115, name: modprobe
| preempt_count: 0, expected: 0
| RCU nest depth: 0, expected: 0
| 4 locks held by modprobe/2115:
|  #0: ffff99b9425161a0 (&dev->mutex){....}-{4:4}, at: __driver_attach+0xaf/0x1c0
|  #1: ffffaa224810f6c0 (crtc_ww_class_acquire){+.+.}-{0:0}, at: intel_initial_commit+0x4c/0x200 [i915]
|  #2: ffffaa224810f6e8 (crtc_ww_class_mutex){+.+.}-{4:4}, at: intel_initial_commit+0x4c/0x200 [i915]
|  #3: ffff99b94a6c9030 (&uncore->lock){+.+.}-{3:3}, at: gen6_write32+0x50/0x290 [i915]
| irq event stamp: 513344
| hardirqs last  enabled at (513343): [<ffffffff8ba8d84c>] _raw_spin_unlock_irqrestore+0x4c/0x60
| hardirqs last disabled at (513344): [<ffffffffc1543646>] intel_pipe_update_start+0x216/0x2c0 [i915]
| softirqs last  enabled at (512766): [<ffffffff8af045cf>] __local_bh_enable_ip+0x10f/0x170
| softirqs last disabled at (512712): [<ffffffffc14dfb6a>] __i915_request_queue+0x3a/0x70 [i915]
| CPU: 3 UID: 0 PID: 2115 Comm: modprobe Tainted: G        W           6.18.0-rc1+ #17 PREEMPT_{RT,(lazy)}
| Tainted: [W]=WARN
| Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./Z68 Pro3-M, BIOS P2.30 06/29/2012
| Call Trace:
|  <TASK>
|  dump_stack_lvl+0x68/0x90
|  __might_resched.cold+0xf0/0x12b
|  rt_spin_lock+0x5f/0x200
|  gen6_write32+0x50/0x290 [i915]
|  ilk_set_pipeconf+0x12d/0x230 [i915]
|  ilk_color_commit_arm+0x2d/0x70 [i915]
|  intel_update_crtc+0x15b/0x690 [i915]
|  intel_commit_modeset_enables+0xa6/0xd0 [i915]
|  intel_atomic_commit_tail+0xd55/0x19a0 [i915]
|  intel_atomic_commit+0x25d/0x2a0 [i915]
|  drm_atomic_commit+0xad/0xe0 [drm]
|  intel_initial_commit+0x16c/0x200 [i915]
|  intel_display_driver_probe+0x2e/0x80 [i915]
|  i915_driver_probe+0x791/0xc10 [i915]
|  i915_pci_probe+0xd7/0x190 [i915]

Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1d36bde149627..55fbd5ff570f7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3030,8 +3030,9 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state)
 
 	val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1);
 
-	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
-	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
+	intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
+	/* posting read */
+	intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
 }
 
 static enum intel_output_format
@@ -3226,8 +3227,9 @@ void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
 	val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1);
 	val |= TRANSCONF_MSA_TIMING_DELAY(crtc_state->msa_timing_delay);
 
-	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
-	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
+	intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
+	/* posting read */
+	intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
 }
 
 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
-- 
2.53.0

[PATCH v9 15/30] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

execlists_dequeue() is invoked from a function which uses
local_irq_disable() to disable interrupts so the spin_lock() behaves
like spin_lock_irq().
This breaks PREEMPT_RT because local_irq_disable() + spin_lock() is not
the same as spin_lock_irq().

execlists_dequeue_irq() and execlists_dequeue() has each one caller
only. If intel_engine_cs::active::lock is acquired and released with the
_irq suffix then it behaves almost as if execlists_dequeue() would be
invoked with disabled interrupts. The difference is the last part of the
function which is then invoked with enabled interrupts.
I can't tell if this makes a difference. From looking at it, it might
work to move the last unlock at the end of the function as I didn't find
anything that would acquire the lock again.

Reported-by: Clark Williams <williams@redhat.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 .../drm/i915/gt/intel_execlists_submission.c    | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 1359fc9cb88ef..e11db81dca9c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1300,7 +1300,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 * and context switches) submission.
 	 */
 
-	spin_lock(&sched_engine->lock);
+	spin_lock_irq(&sched_engine->lock);
 
 	/*
 	 * If the queue is higher priority than the last
@@ -1400,7 +1400,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				 * Even if ELSP[1] is occupied and not worthy
 				 * of timeslices, our queue might be.
 				 */
-				spin_unlock(&sched_engine->lock);
+				spin_unlock_irq(&sched_engine->lock);
 				return;
 			}
 		}
@@ -1426,7 +1426,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 
 		if (last && !can_merge_rq(last, rq)) {
 			spin_unlock(&ve->base.sched_engine->lock);
-			spin_unlock(&engine->sched_engine->lock);
+			spin_unlock_irq(&engine->sched_engine->lock);
 			return; /* leave this for another sibling */
 		}
 
@@ -1588,7 +1588,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 */
 	sched_engine->queue_priority_hint = queue_prio(sched_engine);
 	i915_sched_engine_reset_on_empty(sched_engine);
-	spin_unlock(&sched_engine->lock);
+	spin_unlock_irq(&sched_engine->lock);
 
 	/*
 	 * We can skip poking the HW if we ended up with exactly the same set
@@ -1614,13 +1614,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	}
 }
 
-static void execlists_dequeue_irq(struct intel_engine_cs *engine)
-{
-	local_irq_disable(); /* Suspend interrupts across request submission */
-	execlists_dequeue(engine);
-	local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
-}
-
 static void clear_ports(struct i915_request **ports, int count)
 {
 	memset_p((void **)ports, NULL, count);
@@ -2475,7 +2468,7 @@ static void execlists_submission_tasklet(struct tasklet_struct *t)
 	}
 
 	if (!engine->execlists.pending[0]) {
-		execlists_dequeue_irq(engine);
+		execlists_dequeue(engine);
 		start_timeslice(engine);
 	}
 
-- 
2.53.0

[PATCH v9 16/30] drm/i915: Drop the irqs_disabled() check

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

The !irqs_disabled() check triggers on PREEMPT_RT even with
i915_sched_engine::lock acquired. The reason is the lock is transformed
into a sleeping lock on PREEMPT_RT and does not disable interrupts.

There is no need to check for disabled interrupts. The lockdep
annotation below already check if the lock has been acquired by the
caller and will yell if the interrupts are not disabled.

Remove the !irqs_disabled() check.

Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/i915_request.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index d2c7b1090df08..f66f8efc70629 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -610,7 +610,6 @@ bool __i915_request_submit(struct i915_request *request)
 
 	RQ_TRACE(request, "\n");
 
-	GEM_BUG_ON(!irqs_disabled());
 	lockdep_assert_held(&engine->sched_engine->lock);
 
 	/*
@@ -719,7 +718,6 @@ void __i915_request_unsubmit(struct i915_request *request)
 	 */
 	RQ_TRACE(request, "\n");
 
-	GEM_BUG_ON(!irqs_disabled());
 	lockdep_assert_held(&engine->sched_engine->lock);
 
 	/*
-- 
2.53.0

[PATCH v9 17/30] drm/i915/guc: Consider also RCU depth in busy loop.

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

intel_guc_send_busy_loop() looks at in_atomic() and irqs_disabled() to
decide if it should busy-spin while waiting or if it may sleep.
Both checks will report false on PREEMPT_RT if sleeping spinlocks are
acquired leading to RCU splats while the function sleeps.

Check also if RCU has been disabled.

Reported-by: "John B. Wyatt IV" <jwyatt@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 053780f562c1a..b25fa8f4dc4bd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -362,7 +362,7 @@ static inline int intel_guc_send_busy_loop(struct intel_guc *guc,
 {
 	int err;
 	unsigned int sleep_period_ms = 1;
-	bool not_atomic = !in_atomic() && !irqs_disabled();
+	bool not_atomic = !in_atomic() && !irqs_disabled() && !rcu_preempt_depth();
 
 	/*
 	 * FIXME: Have caller pass in if we are in an atomic context to avoid
-- 
2.53.0

[PATCH v9 18/30] drm/i915/gt: Fix selftests on PREEMPT_RT

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 10e556a7eac45..c1eff9edd8a5e 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -277,11 +277,11 @@ static int live_engine_busy_stats(void *arg)
 		st_engine_heartbeat_disable(engine);
 
 		ENGINE_TRACE(engine, "measuring idle time\n");
-		preempt_disable();
+		migrate_disable();
 		de = intel_engine_get_busy_time(engine, &t[0]);
 		udelay(100);
 		de = ktime_sub(intel_engine_get_busy_time(engine, &t[1]), de);
-		preempt_enable();
+		migrate_enable();
 		dt = ktime_sub(t[1], t[0]);
 		if (de < 0 || de > 10) {
 			pr_err("%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
@@ -316,11 +316,11 @@ static int live_engine_busy_stats(void *arg)
 		}
 
 		ENGINE_TRACE(engine, "measuring busy time\n");
-		preempt_disable();
+		migrate_disable();
 		de = intel_engine_get_busy_time(engine, &t[0]);
 		mdelay(100);
 		de = ktime_sub(intel_engine_get_busy_time(engine, &t[1]), de);
-		preempt_enable();
+		migrate_enable();
 		dt = ktime_sub(t[1], t[0]);
 		if (100 * de < 95 * dt || 95 * de > 100 * dt) {
 			pr_err("%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
-- 
2.53.0

[PATCH v9 19/30] drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT

[Maarten Lankhorst]

Also check if RCU is disabled for PREEMPT-RT, which is the case when
local_bh_disable() is called.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c0fd349a4600c..9dd9665128caa 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1607,7 +1607,7 @@ u64 intel_engine_get_last_batch_head(const struct intel_engine_cs *engine)
 
 static unsigned long stop_timeout(const struct intel_engine_cs *engine)
 {
-	if (in_atomic() || irqs_disabled()) /* inside atomic preempt-reset? */
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */
 		return 0;
 
 	/*
-- 
2.53.0

[PATCH v9 20/30] drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo

[Maarten Lankhorst]

TODO: Grab uncore lock during entire vblank evasion before disabling
interrupts, and check what breaks?

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 86d1c9f7f0ff0..e07303f0b3cc4 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -1863,7 +1863,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	const struct intel_crtc_state *crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	const struct vlv_fifo_state *fifo_state =
@@ -1892,7 +1891,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 	 * intel_pipe_update_start() has already disabled interrupts
 	 * for us, so a plain spin_lock() is sufficient here.
 	 */
-	spin_lock(&uncore->lock);
 
 	switch (crtc->pipe) {
 	case PIPE_A:
@@ -1951,8 +1949,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 	}
 
 	intel_de_read_fw(display, DSPARB(display));
-
-	spin_unlock(&uncore->lock);
 }
 
 #undef VLV_FIFO
-- 
2.53.0

[PATCH v9 21/30] drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT

[Maarten Lankhorst]

This makes the i915 selftests slightly happier, especially
related to GPU reset.

I believe this may be a better approach than trying to convert
uncore->lock to raw_spinlock

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/selftests/igt_atomic.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.c b/drivers/gpu/drm/i915/selftests/igt_atomic.c
index fb506b6990956..8ae39cf570b76 100644
--- a/drivers/gpu/drm/i915/selftests/igt_atomic.c
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.c
@@ -39,7 +39,14 @@ static void __hardirq_end(void)
 	local_irq_enable();
 }
 
+static void __maybe_unused __nop(void)
+{}
+
 const struct igt_atomic_section igt_atomic_phases[] = {
+#if IS_ENABLED(CONFIG_PREEMPT_RT)
+	{ "sleeping", __nop, __nop },
+	{ },
+#endif
 	{ "preempt", __preempt_begin, __preempt_end },
 	{ "softirq", __softirq_begin, __softirq_end },
 	{ "hardirq", __hardirq_begin, __hardirq_end },
-- 
2.53.0

[PATCH v9 22/30] Revert "drm/i915: Depend on !PREEMPT_RT."

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

Once the known issues are addressed, it should be safe to enable the
driver.

Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 5e939004b6463..40a9234e6e5dc 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -3,7 +3,6 @@ config DRM_I915
 	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
 	depends on DRM
 	depends on X86 && PCI
-	depends on !PREEMPT_RT
 	select INTEL_GTT if X86
 	select INTERVAL_TREE
 	# we need shmfs for the swappable backing store, and in particular
-- 
2.53.0

[PATCH v9 23/30] PREEMPT_RT injection

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 kernel/Kconfig.preempt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/kernel/Kconfig.preempt b/kernel/Kconfig.preempt
index 88c594c6d7fcd..11bec9be95405 100644
--- a/kernel/Kconfig.preempt
+++ b/kernel/Kconfig.preempt
@@ -90,9 +90,9 @@ config PREEMPT_LAZY
 endchoice
 
 config PREEMPT_RT
-	bool "Fully Preemptible Kernel (Real-Time)"
-	depends on EXPERT && ARCH_SUPPORTS_RT && !COMPILE_TEST
+	def_bool y
 	select PREEMPTION
+	depends on ARCH_SUPPORTS_RT
 	help
 	  This option turns the kernel into a real-time kernel by replacing
 	  various locking primitives (spinlocks, rwlocks, etc.) with
-- 
2.53.0

[PATCH v9 24/30] FOR-CI: bump MAX_STACK_TRACE_ENTRIES

[Maarten Lankhorst]

We're hitting a bug in CI where MAX_STACK_TRACE_ENTRIES is set too low.
My guess is the repeated loading/unloading is creating multiples of the
same entries. As a hack just reset lockdep. This might only be necessary
for CI + PREEMPT_RT.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 lib/Kconfig.debug | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 9b9f7c5935596..ec35b50068a73 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -1625,9 +1625,8 @@ config LOCKDEP_CHAINS_BITS
 config LOCKDEP_STACK_TRACE_BITS
 	int "Size for MAX_STACK_TRACE_ENTRIES (as Nth power of 2)"
 	depends on LOCKDEP && !LOCKDEP_SMALL
-	range 10 26
-	default 21 if KASAN
-	default 19
+	range 22 26
+	default 22
 	help
 	  Try increasing this value if you hit "BUG: MAX_STACK_TRACE_ENTRIES too low!" message.
 
-- 
2.53.0

[PATCH v9 25/30] drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

IRQ-Work (FIFO-1) will be preempted by the threaded-interrupt (FIFO-50)
and the interrupt will poll on signaler_active while the irq-work can't
make progress.

Solve this by adding a spinlock to prevent starvation and force
completion.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c       | 8 +++++++-
 drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index c10ac0ab3bfa8..c2b174bfa1418 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -209,6 +209,7 @@ static void signal_irq_work(struct irq_work *work)
 		intel_breadcrumbs_disarm_irq(b);
 
 	rcu_read_lock();
+	spin_lock(&b->signaler_active_sync);
 	atomic_inc(&b->signaler_active);
 	list_for_each_entry_rcu(ce, &b->signalers, signal_link) {
 		struct i915_request *rq;
@@ -246,6 +247,7 @@ static void signal_irq_work(struct irq_work *work)
 		}
 	}
 	atomic_dec(&b->signaler_active);
+	spin_unlock(&b->signaler_active_sync);
 	rcu_read_unlock();
 
 	llist_for_each_safe(signal, sn, signal) {
@@ -290,6 +292,7 @@ intel_breadcrumbs_create(struct intel_engine_cs *irq_engine)
 	init_llist_head(&b->signaled_requests);
 
 	spin_lock_init(&b->irq_lock);
+	spin_lock_init(&b->signaler_active_sync);
 	init_irq_work(&b->irq_work, signal_irq_work);
 
 	b->irq_engine = irq_engine;
@@ -487,8 +490,11 @@ void intel_context_remove_breadcrumbs(struct intel_context *ce,
 	if (release)
 		intel_context_put(ce);
 
-	while (atomic_read(&b->signaler_active))
+	while (atomic_read(&b->signaler_active)) {
+		spin_lock(&b->signaler_active_sync);
+		spin_unlock(&b->signaler_active_sync);
 		cpu_relax();
+	}
 }
 
 static void print_signals(struct intel_breadcrumbs *b, struct drm_printer *p)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
index bdf09fd67b6e7..28dae32628aab 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
@@ -40,6 +40,7 @@ struct intel_breadcrumbs {
 	struct list_head signalers;
 	struct llist_head signaled_requests;
 	atomic_t signaler_active;
+	spinlock_t signaler_active_sync;
 
 	spinlock_t irq_lock; /* protects the interrupt from hardirq context */
 	struct irq_work irq_work; /* for use from inside irq_lock */
-- 
2.53.0

[PATCH v9 26/30] drm/xe: Avoid using stolen memory for DPT.

[Maarten Lankhorst]

On systems with media GT, extra latency is added when accessing stolen
memory when the GT is in MC6. Since we additionally aren't counting how
much memory is used for stolen and we could in theory fill up the
entire stolen area with DPT's, avoid using stolen and only use the
default memory region.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 33 +++++++-------------------
 1 file changed, 8 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index f93c98bec5b5f..86013ef532fd7 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -164,31 +164,14 @@ static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
 		dpt_size = ALIGN(intel_rotation_info_size(&view->rotated) * 8,
 				 XE_PAGE_SIZE);
 
-	if (IS_DGFX(xe))
-		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
-						   dpt_size, ~0ull,
-						   ttm_bo_type_kernel,
-						   XE_BO_FLAG_VRAM0 |
-						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE,
-						   pin_params->alignment, false);
-	else
-		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
-						   dpt_size,  ~0ull,
-						   ttm_bo_type_kernel,
-						   XE_BO_FLAG_STOLEN |
-						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE,
-						   pin_params->alignment, false);
-	if (IS_ERR(dpt))
-		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
-						   dpt_size,  ~0ull,
-						   ttm_bo_type_kernel,
-						   XE_BO_FLAG_SYSTEM |
-						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE |
-						   XE_BO_FLAG_FORCE_WC,
-						   pin_params->alignment, false);
+	dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
+					   dpt_size,  ~0ull,
+					   ttm_bo_type_kernel,
+					   XE_BO_FLAG_VRAM_IF_DGFX(tile0) |
+					   XE_BO_FLAG_GGTT |
+					   XE_BO_FLAG_PAGETABLE |
+					   XE_BO_FLAG_FORCE_WC,
+					   pin_params->alignment, false);
 	if (IS_ERR(dpt))
 		return PTR_ERR(dpt);
 
-- 
2.53.0

[PATCH v9 27/30] drm/xe/display: Avoid using stolen memory for framebuffer when media gt exists.

[Maarten Lankhorst]

On systems with media GT, extra latency is added when accessing stolen
memory when the GT is in MC6.

Simply disable allocating stolen memory for framebuffers when media gt
is found.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_display_bo.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_display_bo.c b/drivers/gpu/drm/xe/display/xe_display_bo.c
index 7fbac223b0977..a5080f6540d46 100644
--- a/drivers/gpu/drm/xe/display/xe_display_bo.c
+++ b/drivers/gpu/drm/xe/display/xe_display_bo.c
@@ -130,6 +130,13 @@ bool xe_display_bo_fbdev_prefer_stolen(struct xe_device *xe, unsigned int size)
 	if (IS_DGFX(xe))
 		return false;
 
+	/*
+	 * Avoid stolen memory when the media_gt exists,
+	 * because a lot of latency is added when media gt is in MC6
+	 */
+	if (xe_device_get_root_tile(xe)->media_gt)
+		return false;
+
 	if (XE_DEVICE_WA(xe, 22019338487_display))
 		return false;
 
-- 
2.53.0

[PATCH v9 28/30] drm/xe/display: Do not allocate into stolen for new framebuffers.

[Maarten Lankhorst]

Prefer to use system memory for global framebuffers, and reserve
the space for FBC use only.

Now that multiple CRTC's can use FBC's, the simple heuristic
of using less than half of stolen is no longer sufficient.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_display_bo.c | 33 ++++------------------
 1 file changed, 6 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_display_bo.c b/drivers/gpu/drm/xe/display/xe_display_bo.c
index a5080f6540d46..1bde12b509fcb 100644
--- a/drivers/gpu/drm/xe/display/xe_display_bo.c
+++ b/drivers/gpu/drm/xe/display/xe_display_bo.c
@@ -153,33 +153,12 @@ static struct drm_gem_object *xe_display_bo_fbdev_create(struct drm_device *drm,
 	struct xe_device *xe = to_xe_device(drm);
 	struct xe_bo *obj;
 
-	obj = ERR_PTR(-ENODEV);
-
-	if (xe_display_bo_fbdev_prefer_stolen(xe, size)) {
-		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe),
-						size,
-						ttm_bo_type_kernel,
-						XE_BO_FLAG_FORCE_WC |
-						XE_BO_FLAG_STOLEN |
-						XE_BO_FLAG_GGTT,
-						false);
-		if (!IS_ERR(obj))
-			drm_info(&xe->drm, "Allocated fbdev into stolen\n");
-		else
-			drm_info(&xe->drm, "Allocated fbdev into stolen failed: %li\n", PTR_ERR(obj));
-	} else {
-		drm_info(&xe->drm, "Allocating fbdev: Stolen memory not preferred.\n");
-	}
-
-	if (IS_ERR(obj)) {
-		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
-						ttm_bo_type_kernel,
-						XE_BO_FLAG_FORCE_WC |
-						XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
-						XE_BO_FLAG_GGTT,
-						false);
-	}
-
+	obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
+					ttm_bo_type_kernel,
+					XE_BO_FLAG_FORCE_WC |
+					XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
+					XE_BO_FLAG_GGTT,
+					false);
 	if (IS_ERR(obj)) {
 		drm_err(&xe->drm, "failed to allocate framebuffer (%pe)\n", obj);
 		return ERR_PTR(-ENOMEM);
-- 
2.53.0

[PATCH v9 29/30] drm/i915/pmu: Convert to raw spinlock

[Maarten Lankhorst]

The pmu lock needs to be a raw spinlock, because cpuctx->lock from perf
is a raw spinlock too, and otherwise you get the below splat:

<3> [133.631044] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
<3> [133.631048] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/0
<3> [133.631049] preempt_count: 2, expected: 0
<3> [133.631050] RCU nest depth: 0, expected: 0
<4> [133.631051] 2 locks held by swapper/0/0:
<4> [133.631053]  #0: ffff88845d62e178 (&cpuctx_lock){....}-{2:2}, at: __perf_install_in_context+0x3f/0x390
<4> [133.631062]  #1: ffff88813d822200 (&pmu->lock){+.+.}-{2:2}, at: i915_pmu_enable+0x48/0x390 [i915]
<4> [133.631263] irq event stamp: 8368282
<4> [133.631264] hardirqs last  enabled at (8368281): [<ffffffff81527da9>] tick_nohz_idle_exit+0x99/0x170
<4> [133.631268] hardirqs last disabled at (8368282): [<ffffffff81539c93>] flush_smp_call_function_queue+0x73/0xf0
<4> [133.631273] softirqs last  enabled at (347482): [<ffffffff813d13fb>] __local_bh_enable_ip+0x14b/0x190
<4> [133.631277] softirqs last disabled at (347458): [<ffffffff8154619a>] cgroup_idr_alloc.constprop.0+0x2a/0x130
<4> [133.631283] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Tainted: G S   U       L      7.1.0-Patchwork_159035v16-g0984dfdee2a4+ #1 PREEMPT_{RT,(lazy)}
<4> [133.631287] Tainted: [S]=CPU_OUT_OF_SPEC, [U]=USER, [L]=SOFTLOCKUP
<4> [133.631287] Hardware name: Intel Corporation CoffeeLake Client Platform/CoffeeLake S UDIMM RVP, BIOS CNLSFWR1.R00.X220.B00.2103302221 03/30/2021
<4> [133.631289] Call Trace:
<4> [133.631290]  <TASK>
<4> [133.631291]  dump_stack_lvl+0x91/0xf0
<4> [133.631297]  dump_stack+0x10/0x20
<4> [133.631300]  __might_resched+0x174/0x260
<4> [133.631306]  rt_spin_lock+0x63/0x200
<4> [133.631309]  ? i915_pmu_enable+0x48/0x390 [i915]
<4> [133.631484]  i915_pmu_enable+0x48/0x390 [i915]
<4> [133.631656]  i915_pmu_event_add+0x71/0x90 [i915]
<4> [133.631827]  event_sched_in+0x105/0x270
<4> [133.631833]  merge_sched_in+0x2db/0x4e0
<4> [133.631840]  visit_groups_merge.constprop.0.isra.0+0x284/0x440
<4> [133.631845]  ? lock_is_held_type+0xa3/0x130
<4> [133.631851]  ctx_sched_in+0x32f/0x430
<4> [133.631860]  perf_event_sched_in+0x83/0xa0
<4> [133.631866]  ctx_resched+0x1c9/0x320
<4> [133.631874]  __perf_install_in_context+0x266/0x390
<4> [133.631881]  ? __pfx_remote_function+0x10/0x10
<4> [133.631885]  remote_function+0x4f/0x70
<4> [133.631888]  __flush_smp_call_function_queue+0xca/0x6e0
<4> [133.631892]  ? trace_hardirqs_on+0x22/0xf0
<4> [133.631899]  flush_smp_call_function_queue+0x85/0xf0
<4> [133.631904]  do_idle+0x16f/0x2e0
<4> [133.631911]  cpu_startup_entry+0x29/0x30
<4> [133.631914]  rest_init+0x104/0x200
<4> [133.631920]  start_kernel+0xa3a/0xcc0
<4> [133.631926]  ? sme_unmap_bootdata+0x14/0x80
<4> [133.631933]  x86_64_start_reservations+0x18/0x30
<4> [133.631936]  x86_64_start_kernel+0x106/0x150
<4> [133.631938]  ? soft_restart_cpu+0x14/0x14
<4> [133.631943]  common_startup_64+0x13e/0x141
<4> [133.631957]  </TASK>

The testcase that triggers this is perf_pmu.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/i915_pmu.c | 22 +++++++++++-----------
 drivers/gpu/drm/i915/i915_pmu.h |  2 +-
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 1c3bafda9c708..65771e54b9b51 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -232,7 +232,7 @@ static u64 get_rc6(struct intel_gt *gt)
 		intel_gt_pm_put_async(gt, wakeref);
 	}
 
-	spin_lock_irqsave(&pmu->lock, flags);
+	raw_spin_lock_irqsave(&pmu->lock, flags);
 
 	if (wakeref) {
 		store_sample(pmu, gt_id, __I915_SAMPLE_RC6, val);
@@ -253,7 +253,7 @@ static u64 get_rc6(struct intel_gt *gt)
 	else
 		store_sample(pmu, gt_id, __I915_SAMPLE_RC6_LAST_REPORTED, val);
 
-	spin_unlock_irqrestore(&pmu->lock, flags);
+	raw_spin_unlock_irqrestore(&pmu->lock, flags);
 
 	return val;
 }
@@ -304,7 +304,7 @@ void i915_pmu_gt_parked(struct intel_gt *gt)
 	if (!pmu->registered)
 		return;
 
-	spin_lock_irq(&pmu->lock);
+	raw_spin_lock_irq(&pmu->lock);
 
 	park_rc6(gt);
 
@@ -316,7 +316,7 @@ void i915_pmu_gt_parked(struct intel_gt *gt)
 	if (pmu->unparked == 0)
 		pmu->timer_enabled = false;
 
-	spin_unlock_irq(&pmu->lock);
+	raw_spin_unlock_irq(&pmu->lock);
 }
 
 void i915_pmu_gt_unparked(struct intel_gt *gt)
@@ -326,7 +326,7 @@ void i915_pmu_gt_unparked(struct intel_gt *gt)
 	if (!pmu->registered)
 		return;
 
-	spin_lock_irq(&pmu->lock);
+	raw_spin_lock_irq(&pmu->lock);
 
 	/*
 	 * Re-enable sampling timer when GPU goes active.
@@ -336,7 +336,7 @@ void i915_pmu_gt_unparked(struct intel_gt *gt)
 
 	pmu->unparked |= BIT(gt->info.id);
 
-	spin_unlock_irq(&pmu->lock);
+	raw_spin_unlock_irq(&pmu->lock);
 }
 
 static void
@@ -742,7 +742,7 @@ static void i915_pmu_enable(struct perf_event *event)
 	if (bit == -1)
 		goto update;
 
-	spin_lock_irqsave(&pmu->lock, flags);
+	raw_spin_lock_irqsave(&pmu->lock, flags);
 
 	/*
 	 * Update the bitmask of enabled events and increment
@@ -784,7 +784,7 @@ static void i915_pmu_enable(struct perf_event *event)
 		engine->pmu.enable_count[sample]++;
 	}
 
-	spin_unlock_irqrestore(&pmu->lock, flags);
+	raw_spin_unlock_irqrestore(&pmu->lock, flags);
 
 update:
 	/*
@@ -805,7 +805,7 @@ static void i915_pmu_disable(struct perf_event *event)
 	if (bit == -1)
 		return;
 
-	spin_lock_irqsave(&pmu->lock, flags);
+	raw_spin_lock_irqsave(&pmu->lock, flags);
 
 	if (is_engine_event(event)) {
 		u8 sample = engine_event_sample(event);
@@ -838,7 +838,7 @@ static void i915_pmu_disable(struct perf_event *event)
 		pmu->timer_enabled &= pmu_needs_timer(pmu);
 	}
 
-	spin_unlock_irqrestore(&pmu->lock, flags);
+	raw_spin_unlock_irqrestore(&pmu->lock, flags);
 }
 
 static void i915_pmu_event_start(struct perf_event *event, int flags)
@@ -1156,7 +1156,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
 	};
 	int ret = -ENOMEM;
 
-	spin_lock_init(&pmu->lock);
+	raw_spin_lock_init(&pmu->lock);
 	hrtimer_setup(&pmu->timer, i915_sample, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
 	init_rc6(pmu);
 
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index 5826cc81858c4..52d4b602310a0 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -71,7 +71,7 @@ struct i915_pmu {
 	/**
 	 * @lock: Lock protecting enable mask and ref count handling.
 	 */
-	spinlock_t lock;
+	raw_spinlock_t lock;
 	/**
 	 * @unparked: GT unparked mask.
 	 */
-- 
2.53.0

[PATCH v9 30/30] drm/i915/guc: Make timestamp.lock a raw spinlock

[Maarten Lankhorst]

Because the timestamp.lock is called from the perf lock,
it has to be converted to a raw spinlock too.

This fixes another splat with a similar trace
to the previous commit in perf_pmu.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  2 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 26 +++++++++----------
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index b25fa8f4dc4bd..7f8feb0a9b97f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -252,7 +252,7 @@ struct intel_guc {
 		 * @timestamp.lock: Lock protecting the below fields and
 		 * the engine stats.
 		 */
-		spinlock_t lock;
+		raw_spinlock_t lock;
 
 		/**
 		 * @timestamp.gt_stamp: 64-bit extended value of the GT
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 788e59cdfac9b..a3aee2daade7d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1330,7 +1330,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)
 	bool in_reset;
 	intel_wakeref_t wakeref;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 
 	/*
 	 * If a reset happened, we risk reading partially updated engine
@@ -1378,7 +1378,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)
 	if (total > stats->total)
 		stats->total = total;
 
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 
 	return ns_to_ktime(stats->total);
 }
@@ -1442,7 +1442,7 @@ static void __reset_guc_busyness_stats(struct intel_guc *guc)
 	unsigned long flags;
 	ktime_t unused;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 
 	guc_update_pm_timestamp(guc, &unused);
 	for_each_engine(engine, gt, id) {
@@ -1463,7 +1463,7 @@ static void __reset_guc_busyness_stats(struct intel_guc *guc)
 		stats->running = 0;
 	}
 
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 }
 
 static void __update_guc_busyness_running_state(struct intel_guc *guc)
@@ -1473,10 +1473,10 @@ static void __update_guc_busyness_running_state(struct intel_guc *guc)
 	enum intel_engine_id id;
 	unsigned long flags;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 	for_each_engine(engine, gt, id)
 		engine->stats.guc.running = false;
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 }
 
 static void __update_guc_busyness_stats(struct intel_guc *guc)
@@ -1489,13 +1489,13 @@ static void __update_guc_busyness_stats(struct intel_guc *guc)
 
 	guc->timestamp.last_stat_jiffies = jiffies;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 
 	guc_update_pm_timestamp(guc, &unused);
 	for_each_engine(engine, gt, id)
 		guc_update_engine_gt_clks(engine);
 
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 }
 
 static void __guc_context_update_stats(struct intel_context *ce)
@@ -1503,9 +1503,9 @@ static void __guc_context_update_stats(struct intel_context *ce)
 	struct intel_guc *guc = ce_to_guc(ce);
 	unsigned long flags;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 	lrc_update_runtime(ce);
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 }
 
 static void guc_context_update_stats(struct intel_context *ce)
@@ -1661,9 +1661,9 @@ void intel_guc_busyness_unpark(struct intel_gt *gt)
 	if (!guc_submission_initialized(guc))
 		return;
 
-	spin_lock_irqsave(&guc->timestamp.lock, flags);
+	raw_spin_lock_irqsave(&guc->timestamp.lock, flags);
 	guc_update_pm_timestamp(guc, &unused);
-	spin_unlock_irqrestore(&guc->timestamp.lock, flags);
+	raw_spin_unlock_irqrestore(&guc->timestamp.lock, flags);
 	guc_enable_busyness_worker(guc);
 }
 
@@ -4865,7 +4865,7 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
 	INIT_WORK(&guc->submission_state.reset_fail_worker,
 		  reset_fail_worker_func);
 
-	spin_lock_init(&guc->timestamp.lock);
+	raw_spin_lock_init(&guc->timestamp.lock);
 	INIT_DELAYED_WORK(&guc->timestamp.work, guc_timestamp_ping);
 
 	guc->submission_state.sched_disable_delay_ms = SCHED_DISABLE_DELAY_MS;
-- 
2.53.0

✗ CI.checkpatch: warning for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159034/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b17b8312f8480f730c84ee9b5cd2ff7f76e61d6d
Author: Maarten Lankhorst <dev@lankhorst.se>
Date:   Mon Jun 22 20:10:43 2026 +0200

    drm/i915/guc: Make timestamp.lock a raw spinlock
    
    Because the timestamp.lock is called from the perf lock,
    it has to be converted to a raw spinlock too.
    
    This fixes another splat with a similar trace
    to the previous commit in perf_pmu.
    
    Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch 6583dd200482a34bb17e5dc54551f91f53b79798 drm-intel
e5dd91534569 drm/vblank_work: Add methods to schedule vblank_work in 2 stages
-:116: CHECK:LINE_SPACING: Please don't use multiple blank lines
#116: FILE: drivers/gpu/drm/drm_vblank_work.c:180:
 
+

total: 0 errors, 0 warnings, 1 checks, 166 lines checked
afaf22c15e7d drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event
4a8b88965a71 drm/intel/display: Make intel_crtc_arm_vblank_event static
a1d4ab453dc1 drm/intel/display: Convert vblank event handling to 2-stage arming
-:139: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#139: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:798:
+							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,

-:142: WARNING:LONG_LINE_COMMENT: line length of 110 exceeds 100 columns
#142: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:801:
+				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */

total: 0 errors, 2 warnings, 0 checks, 120 lines checked
f4a04566cced drm/i915/display: Move vblank put until after critical section
8b49018264b1 drm/i915/display: Remove locking from intel_vblank_evade critical section
-:47: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:735:
+static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *scanline, bool unlocked)

-:91: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#91: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:767:
+		timeout = wait_event_timeout(*wq, scanline_in_safe_range(evade, &scanline, true), timeout);

total: 0 errors, 2 warnings, 0 checks, 78 lines checked
6acbc891f3b9 drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too
c1fe7f147eda drm/i915: Use preempt_disable/enable_rt() where recommended
-:7: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#7: 
  ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.")

-:46: WARNING:LINE_SPACING: Missing a blank line after declarations
#46: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:324:
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_lock_irqsave(&uncore->lock, *flags);

-:53: WARNING:LINE_SPACING: Missing a blank line after declarations
#53: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:331:
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_unlock_irqrestore(&uncore->lock, flags);

total: 0 errors, 3 warnings, 0 checks, 78 lines checked
771a5d3b4dd3 drm/i915/display: Make get_vblank_counter use intel_de_read_fw()
-:8: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#8: 
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
980d68f1d762 drm/i915/display: Do not take uncore lock in i915_get_vblank_counter
-:43: ERROR:CODE_INDENT: code indent should use tabs where possible
#43: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:113:
+^I^I^I^I        PIPEFRAME(display, pipe));$

-:43: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#43: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:113:
+	frame = intel_de_read64_2x32_fw(display, PIPEFRAMEPIXEL(display, pipe),
+				        PIPEFRAME(display, pipe));

-:60: WARNING:LINE_SPACING: Missing a blank line after declarations
#60: FILE: drivers/gpu/drm/i915/intel_uncore.h:457:
+	u32 upper, lower, old_upper, loop = 0;
+	upper = intel_uncore_read_fw(uncore, upper_reg);

total: 1 errors, 1 warnings, 1 checks, 85 lines checked
2701ec414da0 drm/i915/display: Make icl_dsi_frame_update use _fw too
2f6fedc3d6f6 drm/i915/display: Use intel_de_read/write_fw in colorops
-:123: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#123: FILE: drivers/gpu/drm/i915/display/intel_color.c:1054:
+	intel_de_write_fw(display, GAMMA_MODE(crtc->pipe),
 		       crtc_state->gamma_mode);

-:143: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 1 warnings, 1 checks, 24 lines checked
a778ed1f7cbf drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#14: 
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

-:156: ERROR:CODE_INDENT: code indent should use tabs where possible
#156: FILE: drivers/gpu/drm/i915/display/intel_display.c:2816:
+^I^I          VBLANK_START(crtc_vblank_start - 1) |$

-:156: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#156: FILE: drivers/gpu/drm/i915/display/intel_display.c:2816:
+	intel_de_write_fw(display, TRANS_VBLANK(display, transcoder),
+		          VBLANK_START(crtc_vblank_start - 1) |

-:157: ERROR:CODE_INDENT: code indent should use tabs where possible
#157: FILE: drivers/gpu/drm/i915/display/intel_display.c:2817:
+^I^I          VBLANK_END(crtc_vblank_end - 1));$

-:238: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 2 errors, 2 warnings, 1 checks, 141 lines checked
774dac64ae9b drm/i915/display: Make set_pipeconf use the fw variants
-:11: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#11: 
| BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

-:46: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#46: 
Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>

-:76: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 3 warnings, 0 checks, 22 lines checked
065c053546b0 drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
-:22: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#22: 
Reported-by: Clark Williams <williams@redhat.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

total: 0 errors, 1 warnings, 0 checks, 53 lines checked
86bd7f7d6d1d drm/i915: Drop the irqs_disabled() check
-:16: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#16: 
Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>

total: 0 errors, 1 warnings, 0 checks, 14 lines checked
606233f08efc drm/i915/guc: Consider also RCU depth in busy loop.
-:13: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#13: 
Reported-by: "John B. Wyatt IV" <jwyatt@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

-:27: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#27: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:365:
+	bool not_atomic = !in_atomic() && !irqs_disabled() && !rcu_preempt_depth();

total: 1 errors, 1 warnings, 0 checks, 8 lines checked
f320ed4b4128 drm/i915/gt: Fix selftests on PREEMPT_RT
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 26 lines checked
617efdd22616 drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT
-:20: WARNING:LONG_LINE_COMMENT: line length of 101 exceeds 100 columns
#20: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:1610:
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */

-:20: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#20: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:1610:
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */

total: 1 errors, 1 warnings, 0 checks, 8 lines checked
9cc64593bc9a drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo
b38476053994 drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT
0dcb824df23d Revert "drm/i915: Depend on !PREEMPT_RT."
4fa7b18c5e16 PREEMPT_RT injection
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
3496a0a5a66c FOR-CI: bump MAX_STACK_TRACE_ENTRIES
2ce7a0ac606b drm/i915/gt: Add a spinlock to prevent starvation of irq_work.
-:65: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#65: FILE: drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h:43:
+	spinlock_t signaler_active_sync;

-:68: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Sebastian Andrzej Siewior <bigeasy@linutronix.de>'

total: 1 errors, 0 warnings, 1 checks, 40 lines checked
2b4e6f336016 drm/xe: Avoid using stolen memory for DPT.
163d58a8d811 drm/xe/display: Avoid using stolen memory for framebuffer when media gt exists.
0d8f469c1599 drm/xe/display: Do not allocate into stolen for new framebuffers.
c679dc67d369 drm/i915/pmu: Convert to raw spinlock
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#9: 
<3> [133.631044] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

-:176: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 2 warnings, 0 checks, 96 lines checked
b17b8312f848 drm/i915/guc: Make timestamp.lock a raw spinlock

✓ CI.KUnit: success for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159034/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:31:05] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:31:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:31:40] Starting KUnit Kernel (1/1)...
[18:31:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:31:40] ================== guc_buf (11 subtests) ===================
[18:31:40] [PASSED] test_smallest
[18:31:40] [PASSED] test_largest
[18:31:41] [PASSED] test_granular
[18:31:41] [PASSED] test_unique
[18:31:41] [PASSED] test_overlap
[18:31:41] [PASSED] test_reusable
[18:31:41] [PASSED] test_too_big
[18:31:41] [PASSED] test_flush
[18:31:41] [PASSED] test_lookup
[18:31:41] [PASSED] test_data
[18:31:41] [PASSED] test_class
[18:31:41] ===================== [PASSED] guc_buf =====================
[18:31:41] =================== guc_dbm (7 subtests) ===================
[18:31:41] [PASSED] test_empty
[18:31:41] [PASSED] test_default
[18:31:41] ======================== test_size  ========================
[18:31:41] [PASSED] 4
[18:31:41] [PASSED] 8
[18:31:41] [PASSED] 32
[18:31:41] [PASSED] 256
[18:31:41] ==================== [PASSED] test_size ====================
[18:31:41] ======================= test_reuse  ========================
[18:31:41] [PASSED] 4
[18:31:41] [PASSED] 8
[18:31:41] [PASSED] 32
[18:31:41] [PASSED] 256
[18:31:41] =================== [PASSED] test_reuse ====================
[18:31:41] =================== test_range_overlap  ====================
[18:31:41] [PASSED] 4
[18:31:41] [PASSED] 8
[18:31:41] [PASSED] 32
[18:31:41] [PASSED] 256
[18:31:41] =============== [PASSED] test_range_overlap ================
[18:31:41] =================== test_range_compact  ====================
[18:31:41] [PASSED] 4
[18:31:41] [PASSED] 8
[18:31:41] [PASSED] 32
[18:31:41] [PASSED] 256
[18:31:41] =============== [PASSED] test_range_compact ================
[18:31:41] ==================== test_range_spare  =====================
[18:31:41] [PASSED] 4
[18:31:41] [PASSED] 8
[18:31:41] [PASSED] 32
[18:31:41] [PASSED] 256
[18:31:41] ================ [PASSED] test_range_spare =================
[18:31:41] ===================== [PASSED] guc_dbm =====================
[18:31:41] =================== guc_idm (6 subtests) ===================
[18:31:41] [PASSED] bad_init
[18:31:41] [PASSED] no_init
[18:31:41] [PASSED] init_fini
[18:31:41] [PASSED] check_used
[18:31:41] [PASSED] check_quota
[18:31:41] [PASSED] check_all
[18:31:41] ===================== [PASSED] guc_idm =====================
[18:31:41] ================== no_relay (3 subtests) ===================
[18:31:41] [PASSED] xe_drops_guc2pf_if_not_ready
[18:31:41] [PASSED] xe_drops_guc2vf_if_not_ready
[18:31:41] [PASSED] xe_rejects_send_if_not_ready
[18:31:41] ==================== [PASSED] no_relay =====================
[18:31:41] ================== pf_relay (14 subtests) ==================
[18:31:41] [PASSED] pf_rejects_guc2pf_too_short
[18:31:41] [PASSED] pf_rejects_guc2pf_too_long
[18:31:41] [PASSED] pf_rejects_guc2pf_no_payload
[18:31:41] [PASSED] pf_fails_no_payload
[18:31:41] [PASSED] pf_fails_bad_origin
[18:31:41] [PASSED] pf_fails_bad_type
[18:31:41] [PASSED] pf_txn_reports_error
[18:31:41] [PASSED] pf_txn_sends_pf2guc
[18:31:41] [PASSED] pf_sends_pf2guc
[18:31:41] [SKIPPED] pf_loopback_nop
[18:31:41] [SKIPPED] pf_loopback_echo
[18:31:41] [SKIPPED] pf_loopback_fail
[18:31:41] [SKIPPED] pf_loopback_busy
[18:31:41] [SKIPPED] pf_loopback_retry
[18:31:41] ==================== [PASSED] pf_relay =====================
[18:31:41] ================== vf_relay (3 subtests) ===================
[18:31:41] [PASSED] vf_rejects_guc2vf_too_short
[18:31:41] [PASSED] vf_rejects_guc2vf_too_long
[18:31:41] [PASSED] vf_rejects_guc2vf_no_payload
[18:31:41] ==================== [PASSED] vf_relay =====================
[18:31:41] ================ pf_gt_config (9 subtests) =================
[18:31:41] [PASSED] fair_contexts_1vf
[18:31:41] [PASSED] fair_doorbells_1vf
[18:31:41] [PASSED] fair_ggtt_1vf
[18:31:41] ====================== fair_vram_1vf  ======================
[18:31:41] [PASSED] 3.50 GiB
[18:31:41] [PASSED] 11.5 GiB
[18:31:41] [PASSED] 15.5 GiB
[18:31:41] [PASSED] 31.5 GiB
[18:31:41] [PASSED] 63.5 GiB
[18:31:41] [PASSED] 1.91 GiB
[18:31:41] ================== [PASSED] fair_vram_1vf ==================
[18:31:41] ================ fair_vram_1vf_admin_only  =================
[18:31:41] [PASSED] 3.50 GiB
[18:31:41] [PASSED] 11.5 GiB
[18:31:41] [PASSED] 15.5 GiB
[18:31:41] [PASSED] 31.5 GiB
[18:31:41] [PASSED] 63.5 GiB
[18:31:41] [PASSED] 1.91 GiB
[18:31:41] ============ [PASSED] fair_vram_1vf_admin_only =============
[18:31:41] ====================== fair_contexts  ======================
[18:31:41] [PASSED] 1 VF
[18:31:41] [PASSED] 2 VFs
[18:31:41] [PASSED] 3 VFs
[18:31:41] [PASSED] 4 VFs
[18:31:41] [PASSED] 5 VFs
[18:31:41] [PASSED] 6 VFs
[18:31:41] [PASSED] 7 VFs
[18:31:41] [PASSED] 8 VFs
[18:31:41] [PASSED] 9 VFs
[18:31:41] [PASSED] 10 VFs
[18:31:41] [PASSED] 11 VFs
[18:31:41] [PASSED] 12 VFs
[18:31:41] [PASSED] 13 VFs
[18:31:41] [PASSED] 14 VFs
[18:31:41] [PASSED] 15 VFs
[18:31:41] [PASSED] 16 VFs
[18:31:41] [PASSED] 17 VFs
[18:31:41] [PASSED] 18 VFs
[18:31:41] [PASSED] 19 VFs
[18:31:41] [PASSED] 20 VFs
[18:31:41] [PASSED] 21 VFs
[18:31:41] [PASSED] 22 VFs
[18:31:41] [PASSED] 23 VFs
[18:31:41] [PASSED] 24 VFs
[18:31:41] [PASSED] 25 VFs
[18:31:41] [PASSED] 26 VFs
[18:31:41] [PASSED] 27 VFs
[18:31:41] [PASSED] 28 VFs
[18:31:41] [PASSED] 29 VFs
[18:31:41] [PASSED] 30 VFs
[18:31:41] [PASSED] 31 VFs
[18:31:41] [PASSED] 32 VFs
[18:31:41] [PASSED] 33 VFs
[18:31:41] [PASSED] 34 VFs
[18:31:41] [PASSED] 35 VFs
[18:31:41] [PASSED] 36 VFs
[18:31:41] [PASSED] 37 VFs
[18:31:41] [PASSED] 38 VFs
[18:31:41] [PASSED] 39 VFs
[18:31:41] [PASSED] 40 VFs
[18:31:41] [PASSED] 41 VFs
[18:31:41] [PASSED] 42 VFs
[18:31:41] [PASSED] 43 VFs
[18:31:41] [PASSED] 44 VFs
[18:31:41] [PASSED] 45 VFs
[18:31:41] [PASSED] 46 VFs
[18:31:41] [PASSED] 47 VFs
[18:31:41] [PASSED] 48 VFs
[18:31:41] [PASSED] 49 VFs
[18:31:41] [PASSED] 50 VFs
[18:31:41] [PASSED] 51 VFs
[18:31:41] [PASSED] 52 VFs
[18:31:41] [PASSED] 53 VFs
[18:31:41] [PASSED] 54 VFs
[18:31:41] [PASSED] 55 VFs
[18:31:41] [PASSED] 56 VFs
[18:31:41] [PASSED] 57 VFs
[18:31:41] [PASSED] 58 VFs
[18:31:41] [PASSED] 59 VFs
[18:31:41] [PASSED] 60 VFs
[18:31:41] [PASSED] 61 VFs
[18:31:41] [PASSED] 62 VFs
[18:31:41] [PASSED] 63 VFs
[18:31:41] ================== [PASSED] fair_contexts ==================
[18:31:41] ===================== fair_doorbells  ======================
[18:31:41] [PASSED] 1 VF
[18:31:41] [PASSED] 2 VFs
[18:31:41] [PASSED] 3 VFs
[18:31:41] [PASSED] 4 VFs
[18:31:41] [PASSED] 5 VFs
[18:31:41] [PASSED] 6 VFs
[18:31:41] [PASSED] 7 VFs
[18:31:41] [PASSED] 8 VFs
[18:31:41] [PASSED] 9 VFs
[18:31:41] [PASSED] 10 VFs
[18:31:41] [PASSED] 11 VFs
[18:31:41] [PASSED] 12 VFs
[18:31:41] [PASSED] 13 VFs
[18:31:41] [PASSED] 14 VFs
[18:31:41] [PASSED] 15 VFs
[18:31:41] [PASSED] 16 VFs
[18:31:41] [PASSED] 17 VFs
[18:31:41] [PASSED] 18 VFs
[18:31:41] [PASSED] 19 VFs
[18:31:41] [PASSED] 20 VFs
[18:31:41] [PASSED] 21 VFs
[18:31:41] [PASSED] 22 VFs
[18:31:41] [PASSED] 23 VFs
[18:31:41] [PASSED] 24 VFs
[18:31:41] [PASSED] 25 VFs
[18:31:41] [PASSED] 26 VFs
[18:31:41] [PASSED] 27 VFs
[18:31:41] [PASSED] 28 VFs
[18:31:41] [PASSED] 29 VFs
[18:31:41] [PASSED] 30 VFs
[18:31:41] [PASSED] 31 VFs
[18:31:41] [PASSED] 32 VFs
[18:31:41] [PASSED] 33 VFs
[18:31:41] [PASSED] 34 VFs
[18:31:41] [PASSED] 35 VFs
[18:31:41] [PASSED] 36 VFs
[18:31:41] [PASSED] 37 VFs
[18:31:41] [PASSED] 38 VFs
[18:31:41] [PASSED] 39 VFs
[18:31:41] [PASSED] 40 VFs
[18:31:41] [PASSED] 41 VFs
[18:31:41] [PASSED] 42 VFs
[18:31:41] [PASSED] 43 VFs
[18:31:41] [PASSED] 44 VFs
[18:31:41] [PASSED] 45 VFs
[18:31:41] [PASSED] 46 VFs
[18:31:41] [PASSED] 47 VFs
[18:31:41] [PASSED] 48 VFs
[18:31:41] [PASSED] 49 VFs
[18:31:41] [PASSED] 50 VFs
[18:31:41] [PASSED] 51 VFs
[18:31:41] [PASSED] 52 VFs
[18:31:41] [PASSED] 53 VFs
[18:31:41] [PASSED] 54 VFs
[18:31:41] [PASSED] 55 VFs
[18:31:41] [PASSED] 56 VFs
[18:31:41] [PASSED] 57 VFs
[18:31:41] [PASSED] 58 VFs
[18:31:41] [PASSED] 59 VFs
[18:31:41] [PASSED] 60 VFs
[18:31:41] [PASSED] 61 VFs
[18:31:41] [PASSED] 62 VFs
[18:31:41] [PASSED] 63 VFs
[18:31:41] ================= [PASSED] fair_doorbells ==================
[18:31:41] ======================== fair_ggtt  ========================
[18:31:41] [PASSED] 1 VF
[18:31:41] [PASSED] 2 VFs
[18:31:41] [PASSED] 3 VFs
[18:31:41] [PASSED] 4 VFs
[18:31:41] [PASSED] 5 VFs
[18:31:41] [PASSED] 6 VFs
[18:31:41] [PASSED] 7 VFs
[18:31:41] [PASSED] 8 VFs
[18:31:41] [PASSED] 9 VFs
[18:31:41] [PASSED] 10 VFs
[18:31:41] [PASSED] 11 VFs
[18:31:41] [PASSED] 12 VFs
[18:31:41] [PASSED] 13 VFs
[18:31:41] [PASSED] 14 VFs
[18:31:41] [PASSED] 15 VFs
[18:31:41] [PASSED] 16 VFs
[18:31:41] [PASSED] 17 VFs
[18:31:41] [PASSED] 18 VFs
[18:31:41] [PASSED] 19 VFs
[18:31:41] [PASSED] 20 VFs
[18:31:41] [PASSED] 21 VFs
[18:31:41] [PASSED] 22 VFs
[18:31:41] [PASSED] 23 VFs
[18:31:41] [PASSED] 24 VFs
[18:31:41] [PASSED] 25 VFs
[18:31:41] [PASSED] 26 VFs
[18:31:41] [PASSED] 27 VFs
[18:31:41] [PASSED] 28 VFs
[18:31:41] [PASSED] 29 VFs
[18:31:41] [PASSED] 30 VFs
[18:31:41] [PASSED] 31 VFs
[18:31:41] [PASSED] 32 VFs
[18:31:41] [PASSED] 33 VFs
[18:31:41] [PASSED] 34 VFs
[18:31:41] [PASSED] 35 VFs
[18:31:41] [PASSED] 36 VFs
[18:31:41] [PASSED] 37 VFs
[18:31:41] [PASSED] 38 VFs
[18:31:41] [PASSED] 39 VFs
[18:31:41] [PASSED] 40 VFs
[18:31:41] [PASSED] 41 VFs
[18:31:41] [PASSED] 42 VFs
[18:31:41] [PASSED] 43 VFs
[18:31:41] [PASSED] 44 VFs
[18:31:41] [PASSED] 45 VFs
[18:31:41] [PASSED] 46 VFs
[18:31:41] [PASSED] 47 VFs
[18:31:41] [PASSED] 48 VFs
[18:31:41] [PASSED] 49 VFs
[18:31:41] [PASSED] 50 VFs
[18:31:41] [PASSED] 51 VFs
[18:31:41] [PASSED] 52 VFs
[18:31:41] [PASSED] 53 VFs
[18:31:41] [PASSED] 54 VFs
[18:31:41] [PASSED] 55 VFs
[18:31:41] [PASSED] 56 VFs
[18:31:41] [PASSED] 57 VFs
[18:31:41] [PASSED] 58 VFs
[18:31:41] [PASSED] 59 VFs
[18:31:41] [PASSED] 60 VFs
[18:31:41] [PASSED] 61 VFs
[18:31:41] [PASSED] 62 VFs
[18:31:41] [PASSED] 63 VFs
[18:31:41] ==================== [PASSED] fair_ggtt ====================
[18:31:41] ======================== fair_vram  ========================
[18:31:41] [PASSED] 1 VF
[18:31:41] [PASSED] 2 VFs
[18:31:41] [PASSED] 3 VFs
[18:31:41] [PASSED] 4 VFs
[18:31:41] [PASSED] 5 VFs
[18:31:41] [PASSED] 6 VFs
[18:31:41] [PASSED] 7 VFs
[18:31:41] [PASSED] 8 VFs
[18:31:41] [PASSED] 9 VFs
[18:31:41] [PASSED] 10 VFs
[18:31:41] [PASSED] 11 VFs
[18:31:41] [PASSED] 12 VFs
[18:31:41] [PASSED] 13 VFs
[18:31:41] [PASSED] 14 VFs
[18:31:41] [PASSED] 15 VFs
[18:31:41] [PASSED] 16 VFs
[18:31:41] [PASSED] 17 VFs
[18:31:41] [PASSED] 18 VFs
[18:31:41] [PASSED] 19 VFs
[18:31:41] [PASSED] 20 VFs
[18:31:41] [PASSED] 21 VFs
[18:31:41] [PASSED] 22 VFs
[18:31:41] [PASSED] 23 VFs
[18:31:41] [PASSED] 24 VFs
[18:31:41] [PASSED] 25 VFs
[18:31:41] [PASSED] 26 VFs
[18:31:41] [PASSED] 27 VFs
[18:31:41] [PASSED] 28 VFs
[18:31:41] [PASSED] 29 VFs
[18:31:41] [PASSED] 30 VFs
[18:31:41] [PASSED] 31 VFs
[18:31:41] [PASSED] 32 VFs
[18:31:41] [PASSED] 33 VFs
[18:31:41] [PASSED] 34 VFs
[18:31:41] [PASSED] 35 VFs
[18:31:41] [PASSED] 36 VFs
[18:31:41] [PASSED] 37 VFs
[18:31:41] [PASSED] 38 VFs
[18:31:41] [PASSED] 39 VFs
[18:31:41] [PASSED] 40 VFs
[18:31:41] [PASSED] 41 VFs
[18:31:41] [PASSED] 42 VFs
[18:31:41] [PASSED] 43 VFs
[18:31:41] [PASSED] 44 VFs
[18:31:41] [PASSED] 45 VFs
[18:31:41] [PASSED] 46 VFs
[18:31:41] [PASSED] 47 VFs
[18:31:41] [PASSED] 48 VFs
[18:31:41] [PASSED] 49 VFs
[18:31:41] [PASSED] 50 VFs
[18:31:41] [PASSED] 51 VFs
[18:31:41] [PASSED] 52 VFs
[18:31:41] [PASSED] 53 VFs
[18:31:41] [PASSED] 54 VFs
[18:31:41] [PASSED] 55 VFs
[18:31:41] [PASSED] 56 VFs
[18:31:41] [PASSED] 57 VFs
[18:31:41] [PASSED] 58 VFs
[18:31:41] [PASSED] 59 VFs
[18:31:41] [PASSED] 60 VFs
[18:31:41] [PASSED] 61 VFs
[18:31:41] [PASSED] 62 VFs
[18:31:41] [PASSED] 63 VFs
[18:31:41] ==================== [PASSED] fair_vram ====================
[18:31:41] ================== [PASSED] pf_gt_config ===================
[18:31:41] ===================== lmtt (1 subtest) =====================
[18:31:41] ======================== test_ops  =========================
[18:31:41] [PASSED] 2-level
[18:31:41] [PASSED] multi-level
[18:31:41] ==================== [PASSED] test_ops =====================
[18:31:41] ====================== [PASSED] lmtt =======================
[18:31:41] ================= pf_service (11 subtests) =================
[18:31:41] [PASSED] pf_negotiate_any
[18:31:41] [PASSED] pf_negotiate_base_match
[18:31:41] [PASSED] pf_negotiate_base_newer
[18:31:41] [PASSED] pf_negotiate_base_next
[18:31:41] [SKIPPED] pf_negotiate_base_older
[18:31:41] [PASSED] pf_negotiate_base_prev
[18:31:41] [PASSED] pf_negotiate_latest_match
[18:31:41] [PASSED] pf_negotiate_latest_newer
[18:31:41] [PASSED] pf_negotiate_latest_next
[18:31:41] [SKIPPED] pf_negotiate_latest_older
[18:31:41] [SKIPPED] pf_negotiate_latest_prev
[18:31:41] =================== [PASSED] pf_service ====================
[18:31:41] ================= xe_guc_g2g (2 subtests) ==================
[18:31:41] ============== xe_live_guc_g2g_kunit_default  ==============
[18:31:41] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:31:41] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:31:41] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:31:41] =================== [SKIPPED] xe_guc_g2g ===================
[18:31:41] =================== xe_mocs (2 subtests) ===================
[18:31:41] ================ xe_live_mocs_kernel_kunit  ================
[18:31:41] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:31:41] ================ xe_live_mocs_reset_kunit  =================
[18:31:41] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:31:41] ==================== [SKIPPED] xe_mocs =====================
[18:31:41] ================= xe_migrate (2 subtests) ==================
[18:31:41] ================= xe_migrate_sanity_kunit  =================
[18:31:41] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:31:41] ================== xe_validate_ccs_kunit  ==================
[18:31:41] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:31:41] =================== [SKIPPED] xe_migrate ===================
[18:31:41] ================== xe_dma_buf (1 subtest) ==================
[18:31:41] ==================== xe_dma_buf_kunit  =====================
[18:31:41] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:31:41] =================== [SKIPPED] xe_dma_buf ===================
[18:31:41] ================= xe_bo_shrink (1 subtest) =================
[18:31:41] =================== xe_bo_shrink_kunit  ====================
[18:31:41] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:31:41] ================== [SKIPPED] xe_bo_shrink ==================
[18:31:41] ==================== xe_bo (2 subtests) ====================
[18:31:41] ================== xe_ccs_migrate_kunit  ===================
[18:31:41] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:31:41] ==================== xe_bo_evict_kunit  ====================
[18:31:41] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:31:41] ===================== [SKIPPED] xe_bo ======================
[18:31:41] ==================== args (13 subtests) ====================
[18:31:41] [PASSED] count_args_test
[18:31:41] [PASSED] call_args_example
[18:31:41] [PASSED] call_args_test
[18:31:41] [PASSED] drop_first_arg_example
[18:31:41] [PASSED] drop_first_arg_test
[18:31:41] [PASSED] first_arg_example
[18:31:41] [PASSED] first_arg_test
[18:31:41] [PASSED] last_arg_example
[18:31:41] [PASSED] last_arg_test
[18:31:41] [PASSED] pick_arg_example
[18:31:41] [PASSED] if_args_example
[18:31:41] [PASSED] if_args_test
[18:31:41] [PASSED] sep_comma_example
[18:31:41] ====================== [PASSED] args =======================
[18:31:41] =================== xe_pci (3 subtests) ====================
[18:31:41] ==================== check_graphics_ip  ====================
[18:31:41] [PASSED] 12.00 Xe_LP
[18:31:41] [PASSED] 12.10 Xe_LP+
[18:31:41] [PASSED] 12.55 Xe_HPG
[18:31:41] [PASSED] 12.60 Xe_HPC
[18:31:41] [PASSED] 12.70 Xe_LPG
[18:31:41] [PASSED] 12.71 Xe_LPG
[18:31:41] [PASSED] 12.74 Xe_LPG+
[18:31:41] [PASSED] 20.01 Xe2_HPG
[18:31:41] [PASSED] 20.02 Xe2_HPG
[18:31:41] [PASSED] 20.04 Xe2_LPG
[18:31:41] [PASSED] 30.00 Xe3_LPG
[18:31:41] [PASSED] 30.01 Xe3_LPG
[18:31:41] [PASSED] 30.03 Xe3_LPG
[18:31:41] [PASSED] 30.04 Xe3_LPG
[18:31:41] [PASSED] 30.05 Xe3_LPG
[18:31:41] [PASSED] 35.10 Xe3p_LPG
[18:31:41] [PASSED] 35.11 Xe3p_XPC
[18:31:41] ================ [PASSED] check_graphics_ip ================
[18:31:41] ===================== check_media_ip  ======================
[18:31:41] [PASSED] 12.00 Xe_M
[18:31:41] [PASSED] 12.55 Xe_HPM
[18:31:41] [PASSED] 13.00 Xe_LPM+
[18:31:41] [PASSED] 13.01 Xe2_HPM
[18:31:41] [PASSED] 20.00 Xe2_LPM
[18:31:41] [PASSED] 30.00 Xe3_LPM
[18:31:41] [PASSED] 30.02 Xe3_LPM
[18:31:41] [PASSED] 35.00 Xe3p_LPM
[18:31:41] [PASSED] 35.03 Xe3p_HPM
[18:31:41] ================= [PASSED] check_media_ip ==================
[18:31:41] =================== check_platform_desc  ===================
[18:31:41] [PASSED] 0x9A60 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A68 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A70 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A40 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A49 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A59 (TIGERLAKE)
[18:31:41] [PASSED] 0x9A78 (TIGERLAKE)
[18:31:41] [PASSED] 0x9AC0 (TIGERLAKE)
[18:31:41] [PASSED] 0x9AC9 (TIGERLAKE)
[18:31:41] [PASSED] 0x9AD9 (TIGERLAKE)
[18:31:41] [PASSED] 0x9AF8 (TIGERLAKE)
[18:31:41] [PASSED] 0x4C80 (ROCKETLAKE)
[18:31:41] [PASSED] 0x4C8A (ROCKETLAKE)
[18:31:41] [PASSED] 0x4C8B (ROCKETLAKE)
[18:31:41] [PASSED] 0x4C8C (ROCKETLAKE)
[18:31:41] [PASSED] 0x4C90 (ROCKETLAKE)
[18:31:41] [PASSED] 0x4C9A (ROCKETLAKE)
[18:31:41] [PASSED] 0x4680 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4682 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4688 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x468A (ALDERLAKE_S)
[18:31:41] [PASSED] 0x468B (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4690 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4692 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4693 (ALDERLAKE_S)
[18:31:41] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46AA (ALDERLAKE_P)
[18:31:41] [PASSED] 0x462A (ALDERLAKE_P)
[18:31:41] [PASSED] 0x4626 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x4628 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:31:41] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:31:41] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:31:41] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:31:41] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:31:41] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:31:41] [PASSED] 0xA721 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA720 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:31:41] [PASSED] 0xA780 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA781 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA782 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA783 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA788 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA789 (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA78A (ALDERLAKE_S)
[18:31:41] [PASSED] 0xA78B (ALDERLAKE_S)
[18:31:41] [PASSED] 0x4905 (DG1)
[18:31:41] [PASSED] 0x4906 (DG1)
[18:31:41] [PASSED] 0x4907 (DG1)
[18:31:41] [PASSED] 0x4908 (DG1)
[18:31:41] [PASSED] 0x4909 (DG1)
[18:31:41] [PASSED] 0x56C0 (DG2)
[18:31:41] [PASSED] 0x56C2 (DG2)
[18:31:41] [PASSED] 0x56C1 (DG2)
[18:31:41] [PASSED] 0x7D51 (METEORLAKE)
[18:31:41] [PASSED] 0x7DD1 (METEORLAKE)
[18:31:41] [PASSED] 0x7D41 (METEORLAKE)
[18:31:41] [PASSED] 0x7D67 (METEORLAKE)
[18:31:41] [PASSED] 0xB640 (METEORLAKE)
[18:31:41] [PASSED] 0x56A0 (DG2)
[18:31:41] [PASSED] 0x56A1 (DG2)
[18:31:41] [PASSED] 0x56A2 (DG2)
[18:31:41] [PASSED] 0x56BE (DG2)
[18:31:41] [PASSED] 0x56BF (DG2)
[18:31:41] [PASSED] 0x5690 (DG2)
[18:31:41] [PASSED] 0x5691 (DG2)
[18:31:41] [PASSED] 0x5692 (DG2)
[18:31:41] [PASSED] 0x56A5 (DG2)
[18:31:41] [PASSED] 0x56A6 (DG2)
[18:31:41] [PASSED] 0x56B0 (DG2)
[18:31:41] [PASSED] 0x56B1 (DG2)
[18:31:41] [PASSED] 0x56BA (DG2)
[18:31:41] [PASSED] 0x56BB (DG2)
[18:31:41] [PASSED] 0x56BC (DG2)
[18:31:41] [PASSED] 0x56BD (DG2)
[18:31:41] [PASSED] 0x5693 (DG2)
[18:31:41] [PASSED] 0x5694 (DG2)
[18:31:41] [PASSED] 0x5695 (DG2)
[18:31:41] [PASSED] 0x56A3 (DG2)
[18:31:41] [PASSED] 0x56A4 (DG2)
[18:31:41] [PASSED] 0x56B2 (DG2)
[18:31:41] [PASSED] 0x56B3 (DG2)
[18:31:41] [PASSED] 0x5696 (DG2)
[18:31:41] [PASSED] 0x5697 (DG2)
[18:31:41] [PASSED] 0xB69 (PVC)
[18:31:41] [PASSED] 0xB6E (PVC)
[18:31:41] [PASSED] 0xBD4 (PVC)
[18:31:41] [PASSED] 0xBD5 (PVC)
[18:31:41] [PASSED] 0xBD6 (PVC)
[18:31:41] [PASSED] 0xBD7 (PVC)
[18:31:41] [PASSED] 0xBD8 (PVC)
[18:31:41] [PASSED] 0xBD9 (PVC)
[18:31:41] [PASSED] 0xBDA (PVC)
[18:31:41] [PASSED] 0xBDB (PVC)
[18:31:41] [PASSED] 0xBE0 (PVC)
[18:31:41] [PASSED] 0xBE1 (PVC)
[18:31:41] [PASSED] 0xBE5 (PVC)
[18:31:41] [PASSED] 0x7D40 (METEORLAKE)
[18:31:41] [PASSED] 0x7D45 (METEORLAKE)
[18:31:41] [PASSED] 0x7D55 (METEORLAKE)
[18:31:41] [PASSED] 0x7D60 (METEORLAKE)
[18:31:41] [PASSED] 0x7DD5 (METEORLAKE)
[18:31:41] [PASSED] 0x6420 (LUNARLAKE)
[18:31:41] [PASSED] 0x64A0 (LUNARLAKE)
[18:31:41] [PASSED] 0x64B0 (LUNARLAKE)
[18:31:41] [PASSED] 0xE202 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE209 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE20B (BATTLEMAGE)
[18:31:41] [PASSED] 0xE20C (BATTLEMAGE)
[18:31:41] [PASSED] 0xE20D (BATTLEMAGE)
[18:31:41] [PASSED] 0xE210 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE211 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE212 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE216 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE220 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE221 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE222 (BATTLEMAGE)
[18:31:41] [PASSED] 0xE223 (BATTLEMAGE)
[18:31:41] [PASSED] 0xB080 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB081 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB082 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB083 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB084 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB085 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB086 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB087 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB08F (PANTHERLAKE)
[18:31:41] [PASSED] 0xB090 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:31:41] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:31:41] [PASSED] 0xFD80 (PANTHERLAKE)
[18:31:41] [PASSED] 0xFD81 (PANTHERLAKE)
[18:31:41] [PASSED] 0xD740 (NOVALAKE_S)
[18:31:41] [PASSED] 0xD741 (NOVALAKE_S)
[18:31:41] [PASSED] 0xD742 (NOVALAKE_S)
[18:31:41] [PASSED] 0xD743 (NOVALAKE_S)
[18:31:41] [PASSED] 0xD745 (NOVALAKE_S)
[18:31:41] [PASSED] 0xD74A (NOVALAKE_S)
[18:31:41] [PASSED] 0xD74B (NOVALAKE_S)
[18:31:41] [PASSED] 0x674C (CRESCENTISLAND)
[18:31:41] [PASSED] 0x674D (CRESCENTISLAND)
[18:31:41] [PASSED] 0x674E (CRESCENTISLAND)
[18:31:41] [PASSED] 0x674F (CRESCENTISLAND)
[18:31:41] [PASSED] 0x6750 (CRESCENTISLAND)
[18:31:41] [PASSED] 0xD750 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD751 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD752 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD753 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD754 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD755 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD756 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD757 (NOVALAKE_P)
[18:31:41] [PASSED] 0xD75F (NOVALAKE_P)
[18:31:41] =============== [PASSED] check_platform_desc ===============
[18:31:41] ===================== [PASSED] xe_pci ======================
[18:31:41] ============= xe_rtp_tables_test (4 subtests) ==============
[18:31:41] ================== xe_rtp_table_gt_test  ===================
[18:31:41] [PASSED] gt_was/14011060649
[18:31:41] [PASSED] gt_was/14011059788
[18:31:41] [PASSED] gt_was/14015795083
[18:31:41] [PASSED] gt_was/16021867713
[18:31:41] [PASSED] gt_was/14019449301
[18:31:41] [PASSED] gt_was/16028005424
[18:31:41] [PASSED] gt_was/14026578760
[18:31:41] [PASSED] gt_was/1409420604
[18:31:41] [PASSED] gt_was/1408615072
[18:31:41] [PASSED] gt_was/22010523718
[18:31:41] [PASSED] gt_was/14011006942
[18:31:41] [PASSED] gt_was/14014830051
[18:31:41] [PASSED] gt_was/18018781329
[18:31:41] [PASSED] gt_was/1509235366
[18:31:41] [PASSED] gt_was/18018781329
[18:31:41] [PASSED] gt_was/16016694945
[18:31:41] [PASSED] gt_was/14018575942
[18:31:41] [PASSED] gt_was/22016670082
[18:31:41] [PASSED] gt_was/22016670082
[18:31:41] [PASSED] gt_was/14017421178
[18:31:41] [PASSED] gt_was/16025250150
[18:31:41] [PASSED] gt_was/14021871409
[18:31:41] [PASSED] gt_was/16021865536
[18:31:41] [PASSED] gt_was/14021486841
[18:31:41] [PASSED] gt_was/14025160223
[18:31:41] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[18:31:41] [PASSED] gt_was/14025635424
[18:31:41] [PASSED] gt_was/16028005424
[18:31:41] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:31:41] ================== xe_rtp_table_gt_test  ===================
[18:31:41] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[18:31:41] [PASSED] gt_tunings/Tuning: 32B Access Enable
[18:31:41] [PASSED] gt_tunings/Tuning: L3 cache
[18:31:41] [PASSED] gt_tunings/Tuning: L3 cache - media
[18:31:41] [PASSED] gt_tunings/Tuning: Compression Overfetch
[18:31:41] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[18:31:41] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[18:31:41] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[18:31:41] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[18:31:41] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[18:31:41] [PASSED] gt_tunings/Tuning: Stateless compression control
[18:31:41] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[18:31:41] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[18:31:41] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[18:31:41] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[18:31:41] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:31:41] ================== xe_rtp_table_oob_test  ==================
[18:31:41] [PASSED] oob_was/1607983814
[18:31:41] [PASSED] oob_was/16010904313
[18:31:41] [PASSED] oob_was/18022495364
[18:31:41] [PASSED] oob_was/22012773006
[18:31:41] [PASSED] oob_was/14014475959
[18:31:41] [PASSED] oob_was/22011391025
[18:31:41] [PASSED] oob_was/22012727170
[18:31:41] [PASSED] oob_was/22012727685
[18:31:41] [PASSED] oob_was/22016596838
[18:31:41] [PASSED] oob_was/18020744125
[18:31:41] [PASSED] oob_was/1409600907
[18:31:41] [PASSED] oob_was/22014953428
[18:31:41] [PASSED] oob_was/16017236439
[18:31:41] [PASSED] oob_was/14019821291
[18:31:41] [PASSED] oob_was/14015076503
[18:31:41] [PASSED] oob_was/14018913170
[18:31:41] [PASSED] oob_was/14018094691
[18:31:41] [PASSED] oob_was/18024947630
[18:31:41] [PASSED] oob_was/16022287689
[18:31:41] [PASSED] oob_was/13011645652
[18:31:41] [PASSED] oob_was/14022293748
[18:31:41] [PASSED] oob_was/22019794406
[18:31:41] [PASSED] oob_was/22019338487
[18:31:41] [PASSED] oob_was/16023588340
[18:31:41] [PASSED] oob_was/14019789679
[18:31:41] [PASSED] oob_was/14022866841
[18:31:41] [PASSED] oob_was/16021333562
[18:31:41] [PASSED] oob_was/14016712196
[18:31:41] [PASSED] oob_was/14015568240
[18:31:41] [PASSED] oob_was/18013179988
[18:31:41] [PASSED] oob_was/1508761755
[18:31:41] [PASSED] oob_was/16023105232
[18:31:41] [PASSED] oob_was/16026508708
[18:31:41] [PASSED] oob_was/14020001231
[18:31:41] [PASSED] oob_was/16023683509
[18:31:41] [PASSED] oob_was/14025515070
[18:31:41] [PASSED] oob_was/15015404425_disable
[18:31:41] [PASSED] oob_was/16026007364
[18:31:41] [PASSED] oob_was/14020316580
[18:31:41] [PASSED] oob_was/14025883347
[18:31:41] [PASSED] oob_was/16029380221
[18:31:41] ============== [PASSED] xe_rtp_table_oob_test ==============
[18:31:41] ================ xe_rtp_table_dev_oob_test  ================
[18:31:41] [PASSED] device_oob_was/22010954014
[18:31:41] [PASSED] device_oob_was/15015404425
[18:31:41] [PASSED] device_oob_was/22019338487_display
[18:31:41] [PASSED] device_oob_was/14022085890
[18:31:41] [PASSED] device_oob_was/14026539277
[18:31:41] [PASSED] device_oob_was/14026633728
[18:31:41] [PASSED] device_oob_was/14026746987
[18:31:41] [PASSED] device_oob_was/14026779378
[18:31:41] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[18:31:41] =============== [PASSED] xe_rtp_tables_test ================
[18:31:41] =================== xe_rtp (3 subtests) ====================
[18:31:41] =================== xe_rtp_rules_tests  ====================
[18:31:41] [PASSED] no
[18:31:41] [PASSED] yes
[18:31:41] [PASSED] no-and-no
[18:31:41] [PASSED] no-and-yes
[18:31:41] [PASSED] yes-and-no
[18:31:41] [PASSED] yes-and-yes
[18:31:41] [PASSED] no-or-no
[18:31:41] [PASSED] no-or-yes
[18:31:41] [PASSED] yes-or-no
[18:31:41] [PASSED] yes-or-yes
[18:31:41] [PASSED] no-yes-or-yes-no
[18:31:41] [PASSED] no-yes-or-yes-yes
[18:31:41] [PASSED] yes-yes-or-no-yes
[18:31:41] [PASSED] yes-yes-or-yes-yes
[18:31:41] [PASSED] no-no-or-yes-or-no
[18:31:41] [PASSED] or
[18:31:41] [PASSED] or-yes
[18:31:41] [PASSED] or-no
[18:31:41] [PASSED] yes-or
[18:31:41] [PASSED] no-or
[18:31:41] [PASSED] no-or-or-yes
[18:31:41] [PASSED] yes-or-or-no
[18:31:41] [PASSED] no-or-or-no
[18:31:41] [PASSED] missing-context-engine-class
[18:31:41] [PASSED] missing-context-engine-class-or-yes
[18:31:41] [PASSED] missing-context-engine-class-or-or-yes
[18:31:41] =============== [PASSED] xe_rtp_rules_tests ================
[18:31:41] =============== xe_rtp_process_to_sr_tests  ================
[18:31:41] [PASSED] coalesce-same-reg
[18:31:41] [PASSED] coalesce-same-reg-literal-and-func
[18:31:41] [PASSED] no-match-no-add
[18:31:41] [PASSED] two-regs-two-entries
[18:31:41] [PASSED] clr-one-set-other
[18:31:41] [PASSED] set-field
[18:31:41] [PASSED] conflict-duplicate
[18:31:41] [PASSED] conflict-not-disjoint
[18:31:41] [PASSED] conflict-not-disjoint-literal-and-func
[18:31:41] [PASSED] conflict-reg-type
[18:31:41] [PASSED] bad-mcr-reg-forced-to-regular
[18:31:41] [PASSED] bad-regular-reg-forced-to-mcr
[18:31:41] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:31:41] ================== xe_rtp_process_tests  ===================
[18:31:41] [PASSED] active1
[18:31:41] [PASSED] active2
[18:31:41] [PASSED] active-inactive
[18:31:41] [PASSED] inactive-active
[18:31:41] [PASSED] inactive-active-inactive
[18:31:41] [PASSED] inactive-inactive-inactive
[18:31:41] ============== [PASSED] xe_rtp_process_tests ===============
[18:31:41] ===================== [PASSED] xe_rtp ======================
[18:31:41] ==================== xe_wa (1 subtest) =====================
[18:31:41] ======================== xe_wa_gt  =========================
[18:31:41] [PASSED] TIGERLAKE B0
[18:31:41] [PASSED] DG1 A0
[18:31:41] [PASSED] DG1 B0
[18:31:41] [PASSED] ALDERLAKE_S A0
[18:31:41] [PASSED] ALDERLAKE_S B0
[18:31:41] [PASSED] ALDERLAKE_S C0
[18:31:41] [PASSED] ALDERLAKE_S D0
[18:31:41] [PASSED] ALDERLAKE_P A0
[18:31:41] [PASSED] ALDERLAKE_P B0
[18:31:41] [PASSED] ALDERLAKE_P C0
[18:31:41] [PASSED] ALDERLAKE_S RPLS D0
[18:31:41] [PASSED] ALDERLAKE_P RPLU E0
[18:31:41] [PASSED] DG2 G10 C0
[18:31:41] [PASSED] DG2 G11 B1
[18:31:41] [PASSED] DG2 G12 A1
[18:31:41] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:31:41] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:31:41] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:31:41] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:31:41] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:31:41] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:31:41] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:31:41] ==================== [PASSED] xe_wa_gt =====================
[18:31:41] ====================== [PASSED] xe_wa ======================
[18:31:41] ============================================================
[18:31:41] Testing complete. Ran 719 tests: passed: 701, skipped: 18
[18:31:41] Elapsed time: 36.115s total, 4.331s configuring, 31.117s building, 0.645s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:31:41] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:31:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:32:07] Starting KUnit Kernel (1/1)...
[18:32:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:32:07] ============ drm_test_pick_cmdline (2 subtests) ============
[18:32:07] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:32:07] =============== drm_test_pick_cmdline_named  ===============
[18:32:07] [PASSED] NTSC
[18:32:07] [PASSED] NTSC-J
[18:32:07] [PASSED] PAL
[18:32:07] [PASSED] PAL-M
[18:32:07] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:32:07] ============== [PASSED] drm_test_pick_cmdline ==============
[18:32:07] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:32:07] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:32:07] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:32:07] =========== drm_validate_clone_mode (2 subtests) ===========
[18:32:07] ============== drm_test_check_in_clone_mode  ===============
[18:32:07] [PASSED] in_clone_mode
[18:32:07] [PASSED] not_in_clone_mode
[18:32:07] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:32:07] =============== drm_test_check_valid_clones  ===============
[18:32:07] [PASSED] not_in_clone_mode
[18:32:07] [PASSED] valid_clone
[18:32:07] [PASSED] invalid_clone
[18:32:07] =========== [PASSED] drm_test_check_valid_clones ===========
[18:32:07] ============= [PASSED] drm_validate_clone_mode =============
[18:32:07] ============= drm_validate_modeset (1 subtest) =============
[18:32:07] [PASSED] drm_test_check_connector_changed_modeset
[18:32:07] ============== [PASSED] drm_validate_modeset ===============
[18:32:07] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:32:07] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:32:07] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:32:07] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:32:07] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[18:32:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:32:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:32:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:32:07] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[18:32:07] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:32:07] ============== drm_bridge_alloc (2 subtests) ===============
[18:32:07] [PASSED] drm_test_drm_bridge_alloc_basic
[18:32:07] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:32:07] ================ [PASSED] drm_bridge_alloc =================
[18:32:07] ============= drm_bridge_bus_fmt (5 subtests) ==============
[18:32:07] [PASSED] drm_test_bridge_rgb_yuv_rgb
[18:32:07] [PASSED] drm_test_bridge_must_convert_to_yuv444
[18:32:07] [PASSED] drm_test_bridge_hdmi_auto_rgb
[18:32:07] [PASSED] drm_test_bridge_auto_first
[18:32:07] [PASSED] drm_test_bridge_rgb_yuv_no_path
[18:32:07] =============== [PASSED] drm_bridge_bus_fmt ================
[18:32:07] ============= drm_cmdline_parser (40 subtests) =============
[18:32:07] [PASSED] drm_test_cmdline_force_d_only
[18:32:07] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:32:07] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:32:07] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:32:07] [PASSED] drm_test_cmdline_force_e_only
[18:32:07] [PASSED] drm_test_cmdline_res
[18:32:07] [PASSED] drm_test_cmdline_res_vesa
[18:32:07] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:32:07] [PASSED] drm_test_cmdline_res_rblank
[18:32:07] [PASSED] drm_test_cmdline_res_bpp
[18:32:07] [PASSED] drm_test_cmdline_res_refresh
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:32:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:32:07] [PASSED] drm_test_cmdline_res_margins_force_on
[18:32:07] [PASSED] drm_test_cmdline_res_vesa_margins
[18:32:07] [PASSED] drm_test_cmdline_name
[18:32:07] [PASSED] drm_test_cmdline_name_bpp
[18:32:07] [PASSED] drm_test_cmdline_name_option
[18:32:07] [PASSED] drm_test_cmdline_name_bpp_option
[18:32:07] [PASSED] drm_test_cmdline_rotate_0
[18:32:07] [PASSED] drm_test_cmdline_rotate_90
[18:32:07] [PASSED] drm_test_cmdline_rotate_180
[18:32:07] [PASSED] drm_test_cmdline_rotate_270
[18:32:07] [PASSED] drm_test_cmdline_hmirror
[18:32:07] [PASSED] drm_test_cmdline_vmirror
[18:32:07] [PASSED] drm_test_cmdline_margin_options
[18:32:07] [PASSED] drm_test_cmdline_multiple_options
[18:32:07] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:32:07] [PASSED] drm_test_cmdline_extra_and_option
[18:32:07] [PASSED] drm_test_cmdline_freestanding_options
[18:32:07] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:32:07] [PASSED] drm_test_cmdline_panel_orientation
[18:32:07] ================ drm_test_cmdline_invalid  =================
[18:32:07] [PASSED] margin_only
[18:32:07] [PASSED] interlace_only
[18:32:07] [PASSED] res_missing_x
[18:32:07] [PASSED] res_missing_y
[18:32:07] [PASSED] res_bad_y
[18:32:07] [PASSED] res_missing_y_bpp
[18:32:07] [PASSED] res_bad_bpp
[18:32:07] [PASSED] res_bad_refresh
[18:32:07] [PASSED] res_bpp_refresh_force_on_off
[18:32:07] [PASSED] res_invalid_mode
[18:32:07] [PASSED] res_bpp_wrong_place_mode
[18:32:07] [PASSED] name_bpp_refresh
[18:32:07] [PASSED] name_refresh
[18:32:07] [PASSED] name_refresh_wrong_mode
[18:32:07] [PASSED] name_refresh_invalid_mode
[18:32:07] [PASSED] rotate_multiple
[18:32:07] [PASSED] rotate_invalid_val
[18:32:07] [PASSED] rotate_truncated
[18:32:07] [PASSED] invalid_option
[18:32:07] [PASSED] invalid_tv_option
[18:32:07] [PASSED] truncated_tv_option
[18:32:07] ============ [PASSED] drm_test_cmdline_invalid =============
[18:32:07] =============== drm_test_cmdline_tv_options  ===============
[18:32:07] [PASSED] NTSC
[18:32:07] [PASSED] NTSC_443
[18:32:07] [PASSED] NTSC_J
[18:32:07] [PASSED] PAL
[18:32:07] [PASSED] PAL_M
[18:32:07] [PASSED] PAL_N
[18:32:07] [PASSED] SECAM
[18:32:07] [PASSED] MONO_525
[18:32:07] [PASSED] MONO_625
[18:32:07] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:32:07] =============== [PASSED] drm_cmdline_parser ================
[18:32:07] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:32:07] [PASSED] drm_test_connector_hdmi_init_valid
[18:32:07] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:32:07] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:32:07] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:32:07] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:32:07] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:32:07] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:32:07] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:32:07] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:32:07] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:32:07] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:32:07] [PASSED] supported_formats=0x5 yuv420_allowed=1
[18:32:07] [PASSED] supported_formats=0x5 yuv420_allowed=0
[18:32:07] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:32:07] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:32:07] [PASSED] drm_test_connector_hdmi_init_null_product
[18:32:07] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:32:07] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:32:07] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:32:07] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:32:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:32:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:32:07] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:32:07] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:32:07] [PASSED] HDMI-A
[18:32:07] [PASSED] HDMI-B
[18:32:07] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:32:07] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:32:07] [PASSED] Unknown
[18:32:07] [PASSED] VGA
[18:32:07] [PASSED] DVI-I
[18:32:07] [PASSED] DVI-D
[18:32:07] [PASSED] DVI-A
[18:32:07] [PASSED] Composite
[18:32:07] [PASSED] SVIDEO
[18:32:07] [PASSED] LVDS
[18:32:07] [PASSED] Component
[18:32:07] [PASSED] DIN
[18:32:07] [PASSED] DP
[18:32:07] [PASSED] TV
[18:32:07] [PASSED] eDP
[18:32:07] [PASSED] Virtual
[18:32:07] [PASSED] DSI
[18:32:07] [PASSED] DPI
[18:32:07] [PASSED] Writeback
[18:32:07] [PASSED] SPI
[18:32:07] [PASSED] USB
[18:32:07] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:32:07] ============ [PASSED] drmm_connector_hdmi_init =============
[18:32:07] ============= drmm_connector_init (3 subtests) =============
[18:32:07] [PASSED] drm_test_drmm_connector_init
[18:32:07] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:32:07] ========= drm_test_drmm_connector_init_type_valid  =========
[18:32:07] [PASSED] Unknown
[18:32:07] [PASSED] VGA
[18:32:07] [PASSED] DVI-I
[18:32:07] [PASSED] DVI-D
[18:32:07] [PASSED] DVI-A
[18:32:07] [PASSED] Composite
[18:32:07] [PASSED] SVIDEO
[18:32:07] [PASSED] LVDS
[18:32:07] [PASSED] Component
[18:32:07] [PASSED] DIN
[18:32:07] [PASSED] DP
[18:32:07] [PASSED] HDMI-A
[18:32:07] [PASSED] HDMI-B
[18:32:07] [PASSED] TV
[18:32:07] [PASSED] eDP
[18:32:07] [PASSED] Virtual
[18:32:07] [PASSED] DSI
[18:32:07] [PASSED] DPI
[18:32:07] [PASSED] Writeback
[18:32:07] [PASSED] SPI
[18:32:07] [PASSED] USB
[18:32:07] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:32:07] =============== [PASSED] drmm_connector_init ===============
[18:32:07] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_init
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:32:07] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:32:07] [PASSED] Unknown
[18:32:07] [PASSED] VGA
[18:32:07] [PASSED] DVI-I
[18:32:07] [PASSED] DVI-D
[18:32:07] [PASSED] DVI-A
[18:32:07] [PASSED] Composite
[18:32:07] [PASSED] SVIDEO
[18:32:07] [PASSED] LVDS
[18:32:07] [PASSED] Component
[18:32:07] [PASSED] DIN
[18:32:07] [PASSED] DP
[18:32:07] [PASSED] HDMI-A
[18:32:07] [PASSED] HDMI-B
[18:32:07] [PASSED] TV
[18:32:07] [PASSED] eDP
[18:32:07] [PASSED] Virtual
[18:32:07] [PASSED] DSI
[18:32:07] [PASSED] DPI
[18:32:07] [PASSED] Writeback
[18:32:07] [PASSED] SPI
[18:32:07] [PASSED] USB
[18:32:07] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:32:07] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:32:07] [PASSED] Unknown
[18:32:07] [PASSED] VGA
[18:32:07] [PASSED] DVI-I
[18:32:07] [PASSED] DVI-D
[18:32:07] [PASSED] DVI-A
[18:32:07] [PASSED] Composite
[18:32:07] [PASSED] SVIDEO
[18:32:07] [PASSED] LVDS
[18:32:07] [PASSED] Component
[18:32:07] [PASSED] DIN
[18:32:07] [PASSED] DP
[18:32:07] [PASSED] HDMI-A
[18:32:07] [PASSED] HDMI-B
[18:32:07] [PASSED] TV
[18:32:07] [PASSED] eDP
[18:32:07] [PASSED] Virtual
[18:32:07] [PASSED] DSI
[18:32:07] [PASSED] DPI
[18:32:07] [PASSED] Writeback
[18:32:07] [PASSED] SPI
[18:32:07] [PASSED] USB
[18:32:07] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:32:07] =========== [PASSED] drm_connector_dynamic_init ============
[18:32:07] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:32:07] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:32:07] ======= drm_connector_dynamic_register (7 subtests) ========
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:32:07] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:32:07] ========= [PASSED] drm_connector_dynamic_register ==========
[18:32:07] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:32:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:32:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:32:07] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:32:07] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:32:07] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:32:07] [PASSED] NTSC
[18:32:07] [PASSED] NTSC-443
[18:32:07] [PASSED] NTSC-J
[18:32:07] [PASSED] PAL
[18:32:07] [PASSED] PAL-M
[18:32:07] [PASSED] PAL-N
[18:32:07] [PASSED] SECAM
[18:32:07] [PASSED] Mono
[18:32:07] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:32:07] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:32:07] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:32:07] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:32:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:32:07] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:32:07] [PASSED] VIC 96
[18:32:07] [PASSED] VIC 97
[18:32:07] [PASSED] VIC 101
[18:32:07] [PASSED] VIC 102
[18:32:07] [PASSED] VIC 106
[18:32:07] [PASSED] VIC 107
[18:32:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:32:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:32:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:32:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:32:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:32:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:32:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:32:07] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:32:07] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:32:07] [PASSED] Automatic
[18:32:07] [PASSED] Full
[18:32:07] [PASSED] Limited 16:235
[18:32:07] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:32:07] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:32:07] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:32:07] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:32:07] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:32:07] [PASSED] RGB
[18:32:07] [PASSED] YUV 4:2:0
[18:32:07] [PASSED] YUV 4:2:2
[18:32:07] [PASSED] YUV 4:4:4
[18:32:07] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:32:07] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:32:07] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:32:07] ============= drm_damage_helper (21 subtests) ==============
[18:32:07] [PASSED] drm_test_damage_iter_no_damage
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:32:07] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:32:07] [PASSED] drm_test_damage_iter_simple_damage
[18:32:07] [PASSED] drm_test_damage_iter_single_damage
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:32:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:32:07] [PASSED] drm_test_damage_iter_damage
[18:32:07] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:32:07] [PASSED] drm_test_damage_iter_damage_one_outside
[18:32:07] [PASSED] drm_test_damage_iter_damage_src_moved
[18:32:07] [PASSED] drm_test_damage_iter_damage_not_visible
[18:32:07] ================ [PASSED] drm_damage_helper ================
[18:32:07] ============== drm_dp_mst_helper (3 subtests) ==============
[18:32:07] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:32:07] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:32:07] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:32:07] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:32:07] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:32:07] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:32:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:32:07] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:32:07] [PASSED] Link rate 2000000 lane count 4
[18:32:07] [PASSED] Link rate 2000000 lane count 2
[18:32:07] [PASSED] Link rate 2000000 lane count 1
[18:32:07] [PASSED] Link rate 1350000 lane count 4
[18:32:07] [PASSED] Link rate 1350000 lane count 2
[18:32:07] [PASSED] Link rate 1350000 lane count 1
[18:32:07] [PASSED] Link rate 1000000 lane count 4
[18:32:07] [PASSED] Link rate 1000000 lane count 2
[18:32:07] [PASSED] Link rate 1000000 lane count 1
[18:32:07] [PASSED] Link rate 810000 lane count 4
[18:32:07] [PASSED] Link rate 810000 lane count 2
[18:32:07] [PASSED] Link rate 810000 lane count 1
[18:32:07] [PASSED] Link rate 540000 lane count 4
[18:32:07] [PASSED] Link rate 540000 lane count 2
[18:32:07] [PASSED] Link rate 540000 lane count 1
[18:32:07] [PASSED] Link rate 270000 lane count 4
[18:32:07] [PASSED] Link rate 270000 lane count 2
[18:32:07] [PASSED] Link rate 270000 lane count 1
[18:32:07] [PASSED] Link rate 162000 lane count 4
[18:32:07] [PASSED] Link rate 162000 lane count 2
[18:32:07] [PASSED] Link rate 162000 lane count 1
[18:32:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:32:07] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:32:07] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:32:07] [PASSED] DP_POWER_UP_PHY with port number
[18:32:07] [PASSED] DP_POWER_DOWN_PHY with port number
[18:32:07] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:32:07] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:32:07] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:32:07] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:32:07] [PASSED] DP_QUERY_PAYLOAD with port number
[18:32:07] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:32:07] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:32:07] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:32:07] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:32:07] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:32:07] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:32:07] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:32:07] [PASSED] DP_REMOTE_I2C_READ with port number
[18:32:07] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:32:07] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:32:07] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:32:07] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:32:07] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:32:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:32:07] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:32:07] ================ [PASSED] drm_dp_mst_helper ================
[18:32:07] ================== drm_exec (7 subtests) ===================
[18:32:07] [PASSED] sanitycheck
[18:32:07] [PASSED] test_lock
[18:32:07] [PASSED] test_lock_unlock
[18:32:07] [PASSED] test_duplicates
[18:32:07] [PASSED] test_prepare
[18:32:07] [PASSED] test_prepare_array
[18:32:07] [PASSED] test_multiple_loops
[18:32:07] ==================== [PASSED] drm_exec =====================
[18:32:07] =========== drm_format_helper_test (17 subtests) ===========
[18:32:07] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:32:07] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:32:07] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:32:07] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:32:07] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:32:07] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:32:07] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:32:07] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:32:07] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:32:07] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:32:07] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:32:07] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:32:07] ==================== drm_test_fb_swab  =====================
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ================ [PASSED] drm_test_fb_swab =================
[18:32:07] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:32:07] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:32:07] [PASSED] single_pixel_source_buffer
[18:32:07] [PASSED] single_pixel_clip_rectangle
[18:32:07] [PASSED] well_known_colors
[18:32:07] [PASSED] destination_pitch
[18:32:07] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:32:07] ================= drm_test_fb_clip_offset  =================
[18:32:07] [PASSED] pass through
[18:32:07] [PASSED] horizontal offset
[18:32:07] [PASSED] vertical offset
[18:32:07] [PASSED] horizontal and vertical offset
[18:32:07] [PASSED] horizontal offset (custom pitch)
[18:32:07] [PASSED] vertical offset (custom pitch)
[18:32:07] [PASSED] horizontal and vertical offset (custom pitch)
[18:32:07] ============= [PASSED] drm_test_fb_clip_offset =============
[18:32:07] =================== drm_test_fb_memcpy  ====================
[18:32:07] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:32:07] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:32:07] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:32:07] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:32:07] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:32:07] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:32:07] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:32:07] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:32:07] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:32:07] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:32:07] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:32:07] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:32:07] =============== [PASSED] drm_test_fb_memcpy ================
[18:32:07] ============= [PASSED] drm_format_helper_test ==============
[18:32:07] ================= drm_format (18 subtests) =================
[18:32:07] [PASSED] drm_test_format_block_width_invalid
[18:32:07] [PASSED] drm_test_format_block_width_one_plane
[18:32:07] [PASSED] drm_test_format_block_width_two_plane
[18:32:07] [PASSED] drm_test_format_block_width_three_plane
[18:32:07] [PASSED] drm_test_format_block_width_tiled
[18:32:07] [PASSED] drm_test_format_block_height_invalid
[18:32:07] [PASSED] drm_test_format_block_height_one_plane
[18:32:07] [PASSED] drm_test_format_block_height_two_plane
[18:32:07] [PASSED] drm_test_format_block_height_three_plane
[18:32:07] [PASSED] drm_test_format_block_height_tiled
[18:32:07] [PASSED] drm_test_format_min_pitch_invalid
[18:32:07] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:32:07] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:32:07] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:32:07] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:32:07] [PASSED] drm_test_format_min_pitch_two_plane
[18:32:07] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:32:07] [PASSED] drm_test_format_min_pitch_tiled
[18:32:07] =================== [PASSED] drm_format ====================
[18:32:07] ============== drm_framebuffer (10 subtests) ===============
[18:32:07] ========== drm_test_framebuffer_check_src_coords  ==========
[18:32:07] [PASSED] Success: source fits into fb
[18:32:07] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:32:07] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:32:07] [PASSED] Fail: overflowing fb with source width
[18:32:07] [PASSED] Fail: overflowing fb with source height
[18:32:07] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:32:07] [PASSED] drm_test_framebuffer_cleanup
[18:32:07] =============== drm_test_framebuffer_create  ===============
[18:32:07] [PASSED] ABGR8888 normal sizes
[18:32:07] [PASSED] ABGR8888 max sizes
[18:32:07] [PASSED] ABGR8888 pitch greater than min required
[18:32:07] [PASSED] ABGR8888 pitch less than min required
[18:32:07] [PASSED] ABGR8888 Invalid width
[18:32:07] [PASSED] ABGR8888 Invalid buffer handle
[18:32:07] [PASSED] No pixel format
[18:32:07] [PASSED] ABGR8888 Width 0
[18:32:07] [PASSED] ABGR8888 Height 0
[18:32:07] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:32:07] [PASSED] ABGR8888 Large buffer offset
[18:32:07] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:32:07] [PASSED] ABGR8888 Invalid flag
[18:32:07] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:32:07] [PASSED] ABGR8888 Valid buffer modifier
[18:32:07] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:32:07] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] NV12 Normal sizes
[18:32:07] [PASSED] NV12 Max sizes
[18:32:07] [PASSED] NV12 Invalid pitch
[18:32:07] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:32:07] [PASSED] NV12 different  modifier per-plane
[18:32:07] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:32:07] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] NV12 Modifier for inexistent plane
[18:32:07] [PASSED] NV12 Handle for inexistent plane
[18:32:07] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:32:07] [PASSED] YVU420 Normal sizes
[18:32:07] [PASSED] YVU420 Max sizes
[18:32:07] [PASSED] YVU420 Invalid pitch
[18:32:07] [PASSED] YVU420 Different pitches
[18:32:07] [PASSED] YVU420 Different buffer offsets/pitches
[18:32:07] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:32:07] [PASSED] YVU420 Valid modifier
[18:32:07] [PASSED] YVU420 Different modifiers per plane
[18:32:07] [PASSED] YVU420 Modifier for inexistent plane
[18:32:07] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:32:07] [PASSED] X0L2 Normal sizes
[18:32:07] [PASSED] X0L2 Max sizes
[18:32:07] [PASSED] X0L2 Invalid pitch
[18:32:07] [PASSED] X0L2 Pitch greater than minimum required
[18:32:07] [PASSED] X0L2 Handle for inexistent plane
[18:32:07] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:32:07] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:32:07] [PASSED] X0L2 Valid modifier
[18:32:07] [PASSED] X0L2 Modifier for inexistent plane
[18:32:07] =========== [PASSED] drm_test_framebuffer_create ===========
[18:32:07] [PASSED] drm_test_framebuffer_free
[18:32:07] [PASSED] drm_test_framebuffer_init
[18:32:07] [PASSED] drm_test_framebuffer_init_bad_format
[18:32:07] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:32:07] [PASSED] drm_test_framebuffer_lookup
[18:32:07] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:32:07] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:32:07] ================= [PASSED] drm_framebuffer =================
[18:32:07] ================ drm_gem_shmem (8 subtests) ================
[18:32:07] [PASSED] drm_gem_shmem_test_obj_create
[18:32:07] [PASSED] drm_gem_shmem_test_obj_create_private
[18:32:07] [PASSED] drm_gem_shmem_test_pin_pages
[18:32:07] [PASSED] drm_gem_shmem_test_vmap
[18:32:07] [PASSED] drm_gem_shmem_test_get_sg_table
[18:32:07] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:32:07] [PASSED] drm_gem_shmem_test_madvise
[18:32:07] [PASSED] drm_gem_shmem_test_purge
[18:32:07] ================== [PASSED] drm_gem_shmem ==================
[18:32:07] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:32:07] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:32:07] [PASSED] Automatic
[18:32:07] [PASSED] Full
[18:32:07] [PASSED] Limited 16:235
[18:32:07] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:32:07] [PASSED] drm_test_check_disable_connector
[18:32:07] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:32:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:32:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:32:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:32:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:32:07] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:32:07] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:32:07] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:32:07] [PASSED] drm_test_check_output_bpc_dvi
[18:32:07] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:32:07] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:32:07] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:32:07] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:32:07] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:32:07] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:32:07] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:32:07] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:32:07] ============ drm_test_check_hdmi_color_format  =============
[18:32:07] [PASSED] AUTO -> RGB
[18:32:07] [PASSED] YCBCR422 -> YUV422
[18:32:07] [PASSED] YCBCR420 -> YUV420
[18:32:07] [PASSED] YCBCR444 -> YUV444
[18:32:07] [PASSED] RGB -> RGB
[18:32:07] ======== [PASSED] drm_test_check_hdmi_color_format =========
[18:32:07] ======== drm_test_check_hdmi_color_format_420_only  ========
[18:32:07] [PASSED] RGB should fail
[18:32:07] [PASSED] YUV444 should fail
[18:32:07] [PASSED] YUV422 should fail
[18:32:07] [PASSED] YUV420 should work
[18:32:07] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[18:32:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:32:07] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:32:07] [PASSED] drm_test_check_broadcast_rgb_value
[18:32:07] [PASSED] drm_test_check_bpc_8_value
[18:32:07] [PASSED] drm_test_check_bpc_10_value
[18:32:07] [PASSED] drm_test_check_bpc_12_value
[18:32:07] [PASSED] drm_test_check_format_value
[18:32:07] [PASSED] drm_test_check_tmds_char_value
[18:32:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:32:07] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[18:32:07] [PASSED] drm_test_check_mode_valid
[18:32:07] [PASSED] drm_test_check_mode_valid_reject
[18:32:07] [PASSED] drm_test_check_mode_valid_reject_rate
[18:32:07] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:32:07] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[18:32:07] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[18:32:07] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[18:32:07] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:32:07] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:32:07] [PASSED] drm_test_check_infoframes
[18:32:07] [PASSED] drm_test_check_reject_avi_infoframe
[18:32:07] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:32:07] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:32:07] [PASSED] drm_test_check_reject_audio_infoframe
[18:32:07] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:32:07] ================= drm_managed (2 subtests) =================
[18:32:07] [PASSED] drm_test_managed_release_action
[18:32:07] [PASSED] drm_test_managed_run_action
[18:32:07] =================== [PASSED] drm_managed ===================
[18:32:07] =================== drm_mm (6 subtests) ====================
[18:32:07] [PASSED] drm_test_mm_init
[18:32:07] [PASSED] drm_test_mm_debug
[18:32:07] [PASSED] drm_test_mm_align32
[18:32:07] [PASSED] drm_test_mm_align64
[18:32:07] [PASSED] drm_test_mm_lowest
[18:32:07] [PASSED] drm_test_mm_highest
[18:32:07] ===================== [PASSED] drm_mm ======================
[18:32:07] ============= drm_modes_analog_tv (5 subtests) =============
[18:32:07] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:32:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:32:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:32:07] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:32:07] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:32:07] =============== [PASSED] drm_modes_analog_tv ===============
[18:32:07] ============== drm_plane_helper (2 subtests) ===============
[18:32:07] =============== drm_test_check_plane_state  ================
[18:32:07] [PASSED] clipping_simple
[18:32:07] [PASSED] clipping_rotate_reflect
[18:32:07] [PASSED] positioning_simple
[18:32:07] [PASSED] upscaling
[18:32:07] [PASSED] downscaling
[18:32:07] [PASSED] rounding1
[18:32:07] [PASSED] rounding2
[18:32:07] [PASSED] rounding3
[18:32:07] [PASSED] rounding4
[18:32:07] =========== [PASSED] drm_test_check_plane_state ============
[18:32:07] =========== drm_test_check_invalid_plane_state  ============
[18:32:07] [PASSED] positioning_invalid
[18:32:07] [PASSED] upscaling_invalid
[18:32:07] [PASSED] downscaling_invalid
[18:32:07] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:32:07] ================ [PASSED] drm_plane_helper =================
[18:32:07] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:32:07] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:32:07] [PASSED] None
[18:32:07] [PASSED] PAL
[18:32:07] [PASSED] NTSC
[18:32:07] [PASSED] Both, NTSC Default
[18:32:07] [PASSED] Both, PAL Default
[18:32:07] [PASSED] Both, NTSC Default, with PAL on command-line
[18:32:07] [PASSED] Both, PAL Default, with NTSC on command-line
[18:32:07] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:32:07] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:32:07] ================== drm_rect (9 subtests) ===================
[18:32:07] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:32:07] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:32:07] [PASSED] drm_test_rect_clip_scaled_clipped
[18:32:07] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:32:07] ================= drm_test_rect_intersect  =================
[18:32:07] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:32:07] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:32:07] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:32:07] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:32:07] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:32:07] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:32:07] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:32:07] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:32:07] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:32:07] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:32:07] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:32:07] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:32:07] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:32:07] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:32:07] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:32:07] ============= [PASSED] drm_test_rect_intersect =============
[18:32:07] ================ drm_test_rect_calc_hscale  ================
[18:32:07] [PASSED] normal use
[18:32:07] [PASSED] out of max range
[18:32:07] [PASSED] out of min range
[18:32:07] [PASSED] zero dst
[18:32:07] [PASSED] negative src
[18:32:07] [PASSED] negative dst
[18:32:07] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:32:07] ================ drm_test_rect_calc_vscale  ================
[18:32:07] [PASSED] normal use
[18:32:07] [PASSED] out of max range
[18:32:07] [PASSED] out of min range
[18:32:07] [PASSED] zero dst
[18:32:07] [PASSED] negative src
[18:32:07] [PASSED] negative dst
[18:32:07] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:32:07] ================== drm_test_rect_rotate  ===================
[18:32:07] [PASSED] reflect-x
[18:32:07] [PASSED] reflect-y
[18:32:07] [PASSED] rotate-0
[18:32:07] [PASSED] rotate-90
[18:32:07] [PASSED] rotate-180
[18:32:07] [PASSED] rotate-270
[18:32:07] ============== [PASSED] drm_test_rect_rotate ===============
[18:32:07] ================ drm_test_rect_rotate_inv  =================
[18:32:07] [PASSED] reflect-x
[18:32:07] [PASSED] reflect-y
[18:32:07] [PASSED] rotate-0
[18:32:07] [PASSED] rotate-90
[18:32:07] [PASSED] rotate-180
[18:32:07] [PASSED] rotate-270
[18:32:07] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:32:07] ==================== [PASSED] drm_rect =====================
[18:32:07] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:32:07] ============ drm_test_sysfb_build_fourcc_list  =============
[18:32:07] [PASSED] no native formats
[18:32:07] [PASSED] XRGB8888 as native format
[18:32:07] [PASSED] remove duplicates
[18:32:07] [PASSED] convert alpha formats
[18:32:07] [PASSED] random formats
[18:32:07] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:32:07] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:32:07] ================== drm_fixp (2 subtests) ===================
[18:32:07] [PASSED] drm_test_int2fixp
[18:32:07] [PASSED] drm_test_sm2fixp
[18:32:07] ==================== [PASSED] drm_fixp =====================
[18:32:07] ============================================================
[18:32:07] Testing complete. Ran 639 tests: passed: 639
[18:32:07] Elapsed time: 26.116s total, 1.780s configuring, 24.120s building, 0.194s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:32:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:32:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:32:18] Starting KUnit Kernel (1/1)...
[18:32:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:32:18] ================= ttm_device (5 subtests) ==================
[18:32:18] [PASSED] ttm_device_init_basic
[18:32:18] [PASSED] ttm_device_init_multiple
[18:32:18] [PASSED] ttm_device_fini_basic
[18:32:18] [PASSED] ttm_device_init_no_vma_man
[18:32:18] ================== ttm_device_init_pools  ==================
[18:32:18] [PASSED] No DMA allocations, no DMA32 required
[18:32:18] [PASSED] DMA allocations, DMA32 required
[18:32:18] [PASSED] No DMA allocations, DMA32 required
[18:32:18] [PASSED] DMA allocations, no DMA32 required
[18:32:18] ============== [PASSED] ttm_device_init_pools ==============
[18:32:18] =================== [PASSED] ttm_device ====================
[18:32:18] ================== ttm_pool (8 subtests) ===================
[18:32:18] ================== ttm_pool_alloc_basic  ===================
[18:32:18] [PASSED] One page
[18:32:18] [PASSED] More than one page
[18:32:18] [PASSED] Above the allocation limit
[18:32:18] [PASSED] One page, with coherent DMA mappings enabled
[18:32:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:32:18] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:32:18] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:32:18] [PASSED] One page
[18:32:18] [PASSED] More than one page
[18:32:18] [PASSED] Above the allocation limit
[18:32:18] [PASSED] One page, with coherent DMA mappings enabled
[18:32:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:32:18] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:32:18] [PASSED] ttm_pool_alloc_order_caching_match
[18:32:18] [PASSED] ttm_pool_alloc_caching_mismatch
[18:32:18] [PASSED] ttm_pool_alloc_order_mismatch
[18:32:18] [PASSED] ttm_pool_free_dma_alloc
[18:32:18] [PASSED] ttm_pool_free_no_dma_alloc
[18:32:18] [PASSED] ttm_pool_fini_basic
[18:32:18] ==================== [PASSED] ttm_pool =====================
[18:32:18] ================ ttm_resource (8 subtests) =================
[18:32:18] ================= ttm_resource_init_basic  =================
[18:32:18] [PASSED] Init resource in TTM_PL_SYSTEM
[18:32:18] [PASSED] Init resource in TTM_PL_VRAM
[18:32:18] [PASSED] Init resource in a private placement
[18:32:18] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:32:18] ============= [PASSED] ttm_resource_init_basic =============
[18:32:18] [PASSED] ttm_resource_init_pinned
[18:32:18] [PASSED] ttm_resource_fini_basic
[18:32:18] [PASSED] ttm_resource_manager_init_basic
[18:32:18] [PASSED] ttm_resource_manager_usage_basic
[18:32:18] [PASSED] ttm_resource_manager_set_used_basic
[18:32:18] [PASSED] ttm_sys_man_alloc_basic
[18:32:18] [PASSED] ttm_sys_man_free_basic
[18:32:18] ================== [PASSED] ttm_resource ===================
[18:32:18] =================== ttm_tt (15 subtests) ===================
[18:32:18] ==================== ttm_tt_init_basic  ====================
[18:32:18] [PASSED] Page-aligned size
[18:32:18] [PASSED] Extra pages requested
[18:32:18] ================ [PASSED] ttm_tt_init_basic ================
[18:32:18] [PASSED] ttm_tt_init_misaligned
[18:32:18] [PASSED] ttm_tt_fini_basic
[18:32:18] [PASSED] ttm_tt_fini_sg
[18:32:18] [PASSED] ttm_tt_fini_shmem
[18:32:18] [PASSED] ttm_tt_create_basic
[18:32:18] [PASSED] ttm_tt_create_invalid_bo_type
[18:32:18] [PASSED] ttm_tt_create_ttm_exists
[18:32:18] [PASSED] ttm_tt_create_failed
[18:32:18] [PASSED] ttm_tt_destroy_basic
[18:32:18] [PASSED] ttm_tt_populate_null_ttm
[18:32:18] [PASSED] ttm_tt_populate_populated_ttm
[18:32:18] [PASSED] ttm_tt_unpopulate_basic
[18:32:18] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:32:18] [PASSED] ttm_tt_swapin_basic
[18:32:18] ===================== [PASSED] ttm_tt ======================
[18:32:18] =================== ttm_bo (14 subtests) ===================
[18:32:18] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:32:18] [PASSED] Cannot be interrupted and sleeps
[18:32:18] [PASSED] Cannot be interrupted, locks straight away
[18:32:18] [PASSED] Can be interrupted, sleeps
[18:32:18] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:32:18] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:32:18] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:32:18] [PASSED] ttm_bo_reserve_double_resv
[18:32:18] [PASSED] ttm_bo_reserve_interrupted
[18:32:18] [PASSED] ttm_bo_reserve_deadlock
[18:32:18] [PASSED] ttm_bo_unreserve_basic
[18:32:18] [PASSED] ttm_bo_unreserve_pinned
[18:32:18] [PASSED] ttm_bo_unreserve_bulk
[18:32:18] [PASSED] ttm_bo_fini_basic
[18:32:18] [PASSED] ttm_bo_fini_shared_resv
[18:32:18] [PASSED] ttm_bo_pin_basic
[18:32:18] [PASSED] ttm_bo_pin_unpin_resource
[18:32:18] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:32:18] ===================== [PASSED] ttm_bo ======================
[18:32:18] ============== ttm_bo_validate (22 subtests) ===============
[18:32:18] ============== ttm_bo_init_reserved_sys_man  ===============
[18:32:18] [PASSED] Buffer object for userspace
[18:32:18] [PASSED] Kernel buffer object
[18:32:18] [PASSED] Shared buffer object
[18:32:18] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:32:18] ============== ttm_bo_init_reserved_mock_man  ==============
[18:32:18] [PASSED] Buffer object for userspace
[18:32:18] [PASSED] Kernel buffer object
[18:32:18] [PASSED] Shared buffer object
[18:32:18] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:32:18] [PASSED] ttm_bo_init_reserved_resv
[18:32:18] ================== ttm_bo_validate_basic  ==================
[18:32:18] [PASSED] Buffer object for userspace
[18:32:18] [PASSED] Kernel buffer object
[18:32:18] [PASSED] Shared buffer object
[18:32:18] ============== [PASSED] ttm_bo_validate_basic ==============
[18:32:18] [PASSED] ttm_bo_validate_invalid_placement
[18:32:18] ============= ttm_bo_validate_same_placement  ==============
[18:32:18] [PASSED] System manager
[18:32:18] [PASSED] VRAM manager
[18:32:18] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:32:18] [PASSED] ttm_bo_validate_failed_alloc
[18:32:18] [PASSED] ttm_bo_validate_pinned
[18:32:18] [PASSED] ttm_bo_validate_busy_placement
[18:32:18] ================ ttm_bo_validate_multihop  =================
[18:32:18] [PASSED] Buffer object for userspace
[18:32:18] [PASSED] Kernel buffer object
[18:32:18] [PASSED] Shared buffer object
[18:32:18] ============ [PASSED] ttm_bo_validate_multihop =============
[18:32:18] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:32:18] [PASSED] Buffer object in system domain, no page vector
[18:32:18] [PASSED] Buffer object in system domain with an existing page vector
[18:32:18] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:32:18] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:32:18] [PASSED] Buffer object for userspace
[18:32:18] [PASSED] Kernel buffer object
[18:32:18] [PASSED] Shared buffer object
[18:32:18] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:32:18] [PASSED] ttm_bo_validate_move_fence_signaled
[18:32:19] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:32:19] [PASSED] Waits for GPU
[18:32:19] [PASSED] Tries to lock straight away
[18:32:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:32:19] [PASSED] ttm_bo_validate_swapout
[18:32:19] [PASSED] ttm_bo_validate_happy_evict
[18:32:19] [PASSED] ttm_bo_validate_all_pinned_evict
[18:32:19] [PASSED] ttm_bo_validate_allowed_only_evict
[18:32:19] [PASSED] ttm_bo_validate_deleted_evict
[18:32:19] [PASSED] ttm_bo_validate_busy_domain_evict
[18:32:19] [PASSED] ttm_bo_validate_evict_gutting
[18:32:19] [PASSED] ttm_bo_validate_recrusive_evict
[18:32:19] ================= [PASSED] ttm_bo_validate =================
[18:32:19] ============================================================
[18:32:19] Testing complete. Ran 102 tests: passed: 102
[18:32:19] Elapsed time: 11.305s total, 1.770s configuring, 9.320s building, 0.173s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159034/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 6583dd200482a34bb17e5dc54551f91f53b79798
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+/kernel/Makefile:1247: C=1 specified, but sparse is not available or not up to date

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ i915.CI.BAT: failure for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 12020 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159035/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_18707 -> Patchwork_159035v17
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_159035v17 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_159035v17, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/index.html

Participating hosts (42 -> 39)
------------------------------

  Missing    (3): bat-dg2-13 fi-snb-2520m fi-pnv-d510 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_159035v17:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - fi-bsw-n3050:       [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-bsw-n3050/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-bsw-n3050/igt@i915_module_load@load.html
    - bat-adlp-6:         [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-adlp-6/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-adlp-6/igt@i915_module_load@load.html
    - bat-arlh-2:         [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-arlh-2/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-arlh-2/igt@i915_module_load@load.html
    - fi-rkl-11600:       [PASS][7] -> [ABORT][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-rkl-11600/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-rkl-11600/igt@i915_module_load@load.html
    - fi-skl-6600u:       [PASS][9] -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-skl-6600u/igt@i915_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-skl-6600u/igt@i915_module_load@load.html
    - bat-arlh-3:         [PASS][11] -> [ABORT][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-arlh-3/igt@i915_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-arlh-3/igt@i915_module_load@load.html
    - bat-dg1-7:          [PASS][13] -> [ABORT][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-dg1-7/igt@i915_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-dg1-7/igt@i915_module_load@load.html
    - fi-glk-j4005:       [PASS][15] -> [ABORT][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-glk-j4005/igt@i915_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-glk-j4005/igt@i915_module_load@load.html
    - bat-adlp-9:         [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-adlp-9/igt@i915_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-adlp-9/igt@i915_module_load@load.html
    - bat-twl-2:          [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-twl-2/igt@i915_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-twl-2/igt@i915_module_load@load.html
    - bat-rpls-4:         [PASS][21] -> [ABORT][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-rpls-4/igt@i915_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-rpls-4/igt@i915_module_load@load.html
    - fi-cfl-8700k:       [PASS][23] -> [ABORT][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-cfl-8700k/igt@i915_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-cfl-8700k/igt@i915_module_load@load.html
    - bat-twl-1:          [PASS][25] -> [ABORT][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-twl-1/igt@i915_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-twl-1/igt@i915_module_load@load.html
    - fi-kbl-8809g:       [PASS][27] -> [ABORT][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-kbl-8809g/igt@i915_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-kbl-8809g/igt@i915_module_load@load.html
    - bat-jsl-5:          [PASS][29] -> [ABORT][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-jsl-5/igt@i915_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-jsl-5/igt@i915_module_load@load.html
    - bat-apl-1:          [PASS][31] -> [ABORT][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-apl-1/igt@i915_module_load@load.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-apl-1/igt@i915_module_load@load.html
    - bat-dg2-14:         [PASS][33] -> [ABORT][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-dg2-14/igt@i915_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-dg2-14/igt@i915_module_load@load.html
    - fi-bsw-nick:        [PASS][35] -> [ABORT][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-bsw-nick/igt@i915_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-bsw-nick/igt@i915_module_load@load.html
    - bat-kbl-2:          [PASS][37] -> [ABORT][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-kbl-2/igt@i915_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-kbl-2/igt@i915_module_load@load.html
    - bat-arls-5:         [PASS][39] -> [ABORT][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-arls-5/igt@i915_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-arls-5/igt@i915_module_load@load.html
    - bat-rplp-1:         [PASS][41] -> [ABORT][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-rplp-1/igt@i915_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-rplp-1/igt@i915_module_load@load.html
    - fi-tgl-1115g4:      [PASS][43] -> [ABORT][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-tgl-1115g4/igt@i915_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-tgl-1115g4/igt@i915_module_load@load.html
    - bat-atsm-1:         [PASS][45] -> [ABORT][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-atsm-1/igt@i915_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-atsm-1/igt@i915_module_load@load.html
    - fi-cfl-guc:         [PASS][47] -> [ABORT][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-cfl-guc/igt@i915_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-cfl-guc/igt@i915_module_load@load.html
    - bat-mtlp-9:         [PASS][49] -> [ABORT][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-mtlp-9/igt@i915_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-mtlp-9/igt@i915_module_load@load.html
    - bat-arls-6:         [PASS][51] -> [ABORT][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-arls-6/igt@i915_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-arls-6/igt@i915_module_load@load.html
    - bat-dg2-9:          [PASS][53] -> [ABORT][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-dg2-9/igt@i915_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-dg2-9/igt@i915_module_load@load.html
    - fi-kbl-x1275:       [PASS][55] -> [ABORT][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-kbl-x1275/igt@i915_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-kbl-x1275/igt@i915_module_load@load.html
    - bat-adlp-11:        [PASS][57] -> [ABORT][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-adlp-11/igt@i915_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-adlp-11/igt@i915_module_load@load.html
    - fi-hsw-4770:        [PASS][59] -> [ABORT][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-hsw-4770/igt@i915_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-hsw-4770/igt@i915_module_load@load.html
    - fi-cfl-8109u:       [PASS][61] -> [ABORT][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-cfl-8109u/igt@i915_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-cfl-8109u/igt@i915_module_load@load.html
    - fi-ivb-3770:        [PASS][63] -> [ABORT][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-ivb-3770/igt@i915_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-ivb-3770/igt@i915_module_load@load.html
    - bat-mtlp-8:         [PASS][65] -> [ABORT][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-mtlp-8/igt@i915_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-mtlp-8/igt@i915_module_load@load.html
    - bat-dg1-6:          [PASS][67] -> [ABORT][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-dg1-6/igt@i915_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-dg1-6/igt@i915_module_load@load.html
    - bat-dg2-8:          [PASS][69] -> [ABORT][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-dg2-8/igt@i915_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-dg2-8/igt@i915_module_load@load.html
    - bat-adls-6:         [PASS][71] -> [ABORT][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/bat-adls-6/igt@i915_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/bat-adls-6/igt@i915_module_load@load.html

  
Known issues
------------

  Here are the changes found in Patchwork_159035v17 that come from known issues:

### IGT changes ###

#### Warnings ####

  * igt@i915_module_load@load:
    - fi-kbl-7567u:       [DMESG-WARN][73] ([i915#13735] / [i915#15673] / [i915#180]) -> [ABORT][74] ([i915#180])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18707/fi-kbl-7567u/igt@i915_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/fi-kbl-7567u/igt@i915_module_load@load.html

  
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180


Build changes
-------------

  * Linux: CI_DRM_18707 -> Patchwork_159035v17

  CI-20190529: 20190529
  CI_DRM_18707: 6583dd200482a34bb17e5dc54551f91f53b79798 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8976: 8976
  Patchwork_159035v17: 6583dd200482a34bb17e5dc54551f91f53b79798 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v17/index.html

[-- Attachment #2: Type: text/html, Size: 12863 bytes --]

✓ Xe.CI.BAT: success for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1633 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159034/
State : success

== Summary ==

CI Bug Log - changes from xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798_BAT -> xe-pw-159034v17_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-159034v17_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - bat-ptl-2:          [PASS][1] -> [FAIL][2] ([Intel XE#5408]) +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/bat-ptl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/bat-ptl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html

  
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408


Build changes
-------------

  * IGT: IGT_8976 -> IGT_8977
  * Linux: xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798 -> xe-pw-159034v17

  IGT_8976: 8976
  IGT_8977: c8bdb0bc2140e337e1d79969430c3d7a5c088c9e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798: 6583dd200482a34bb17e5dc54551f91f53b79798
  xe-pw-159034v17: 159034v17

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/index.html

[-- Attachment #2: Type: text/html, Size: 2213 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 27069 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev17)
URL   : https://patchwork.freedesktop.org/series/159034/
State : failure

== Summary ==

CI Bug Log - changes from xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798_FULL -> xe-pw-159034v17_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159034v17_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159034v17_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159034v17_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][1] -> [FAIL][2] +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_sequence@queue-busy:
    - shard-lnl:          [PASS][3] -> [FAIL][4] +2 other tests fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-7/igt@kms_sequence@queue-busy.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-2/igt@kms_sequence@queue-busy.html

  
Known issues
------------

  Here are the changes found in xe-pw-159034v17_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][5] -> [FAIL][6] ([Intel XE#3718] / [Intel XE#6078]) +2 other tests fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip.html
    - shard-lnl:          [PASS][7] -> [FAIL][8] ([Intel XE#3718] / [Intel XE#7265]) +3 other tests fail
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-1/igt@kms_async_flips@alternate-sync-async-flip.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-1/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3:
    - shard-bmg:          [PASS][9] -> [FAIL][10] ([Intel XE#6078]) +8 other tests fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-c-edp-1:
    - shard-lnl:          [PASS][11] -> [FAIL][12] ([Intel XE#7265]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-c-edp-1.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-7/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-c-edp-1.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#1124]) +4 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#1124])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_bw@linear-tiling-1-displays-target-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#367]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-1/igt@kms_bw@linear-tiling-1-displays-target-3840x2160p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2887]) +6 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-4/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#2887])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2325] / [Intel XE#7358])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_frames@dp-crc-multiple:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2252]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_chamelium_frames@dp-crc-multiple.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2320])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2321] / [Intel XE#7355])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][22] -> [FAIL][23] ([Intel XE#8292])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-10/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2286] / [Intel XE#6035])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dsc@dsc-with-bpc-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#8265])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_dsc@dsc-with-bpc-ultrajoiner.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-bmg:          [PASS][26] -> [FAIL][27] ([Intel XE#6266]) +1 other test fail
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-5/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [PASS][28] -> [FAIL][29] ([Intel XE#3149] / [Intel XE#3321] / [Intel XE#5408] / [Intel XE#6266])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
    - shard-bmg:          [PASS][30] -> [FAIL][31] ([Intel XE#3321]) +18 other tests fail
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [PASS][32] -> [FAIL][33] ([Intel XE#5408] / [Intel XE#6266]) +2 other tests fail
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-2/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][34] -> [FAIL][35] ([Intel XE#301])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [PASS][36] -> [FAIL][37] ([Intel XE#301] / [Intel XE#3149])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3:
    - shard-bmg:          [PASS][38] -> [FAIL][39] ([Intel XE#3149] / [Intel XE#3321]) +4 other tests fail
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2311]) +16 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#6312])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4141]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#7061] / [Intel XE#7356])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2313]) +12 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7061]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html

  * igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][46] -> [SKIP][47] ([Intel XE#7915]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-10/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6911] / [Intel XE#7466])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2486])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-10/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#7283]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#1489]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-9/igt@kms_psr@psr-basic.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-lnl:          [PASS][53] -> [SKIP][54] ([Intel XE#8361])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2330] / [Intel XE#5813])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6503])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-9/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#1499])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#7636]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-5/igt@xe_eudebug@basic-exec-queues.html
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#7636])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-8/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][60] -> [INCOMPLETE][61] ([Intel XE#6321] / [Intel XE#8355])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#8374]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@xe_exec_fault_mode@many-multi-queue-rebind.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#8364]) +9 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#8364]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-8/igt@xe_exec_multi_queue@one-queue-preempt-mode-userptr-invalidate.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#8378]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-rebind.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#6281] / [Intel XE#7426])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-7/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_oa@buffer-size:
    - shard-lnl:          [PASS][68] -> [FAIL][69] ([Intel XE#7334])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@xe_oa@buffer-size.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-8/igt@xe_oa@buffer-size.html

  * igt@xe_oa@buffer-size@oag-0-256k:
    - shard-lnl:          NOTRUN -> [FAIL][70] ([Intel XE#7334])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-8/igt@xe_oa@buffer-size@oag-0-256k.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#944])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@xe_query@multigpu-query-config.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-bmg:          [PASS][72] -> [FAIL][73] ([Intel XE#6569])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-10/igt@xe_sriov_flr@flr-vf1-clear.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-3/igt@xe_sriov_flr@flr-vf1-clear.html

  
#### Possible fixes ####

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][74] ([Intel XE#7915]) -> [PASS][75] +1 other test pass
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-2/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-10/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@xe_sriov_vram@vf-access-provisioned:
    - shard-bmg:          [FAIL][76] ([Intel XE#7992]) -> [PASS][77] +1 other test pass
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-8/igt@xe_sriov_vram@vf-access-provisioned.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-7/igt@xe_sriov_vram@vf-access-provisioned.html

  * igt@xe_vm@large-userptr-binds-16777216:
    - shard-lnl:          [ABORT][78] ([Intel XE#8007]) -> [PASS][79]
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-5/igt@xe_vm@large-userptr-binds-16777216.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-3/igt@xe_vm@large-userptr-binds-16777216.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-bmg:          [ABORT][80] ([Intel XE#8007]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-3/igt@xe_wedged@wedged-mode-toggle.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-6/igt@xe_wedged@wedged-mode-toggle.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][82] ([Intel XE#301]) -> [FAIL][83] ([Intel XE#301] / [Intel XE#3149])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][84] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][85] ([Intel XE#2426] / [Intel XE#5848])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][86] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][87] ([Intel XE#2509] / [Intel XE#7437])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7265
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8292]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8292
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8361
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8976 -> IGT_8977
  * Linux: xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798 -> xe-pw-159034v17

  IGT_8976: 8976
  IGT_8977: c8bdb0bc2140e337e1d79969430c3d7a5c088c9e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5286-6583dd200482a34bb17e5dc54551f91f53b79798: 6583dd200482a34bb17e5dc54551f91f53b79798
  xe-pw-159034v17: 159034v17

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v17/index.html

[-- Attachment #2: Type: text/html, Size: 30581 bytes --]

[PATCH v9.5] drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

[Maarten Lankhorst]

The busyness implementation for guc is incompatible with PMU,
so disable it to prevent upsetting lockdep.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/i915_pmu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 65771e54b9b51..f8bea3ec458d9 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -554,6 +554,9 @@ engine_event_status(struct intel_engine_cs *engine,
 {
 	switch (sample) {
 	case I915_SAMPLE_BUSY:
+		/* The guc submission engine->busyness() callback has issues with CONFIG_PREEMPT_RT */
+		if (CONFIG_ENABLED(CONFIG_PREEMPT_RT) && intel_uc_uses_guc_submission(engine->gt->uc))
+			return -ENODEV;
 	case I915_SAMPLE_WAIT:
 		break;
 	case I915_SAMPLE_SEMA:
-- 
2.53.0

[PATCH v9.6] drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

[Maarten Lankhorst]

The busyness implementation for guc is incompatible with PMU,
so disable it to prevent upsetting lockdep.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/i915_pmu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 65771e54b9b51..d5fc47dcde3e3 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -554,6 +554,9 @@ engine_event_status(struct intel_engine_cs *engine,
 {
 	switch (sample) {
 	case I915_SAMPLE_BUSY:
+		/* The guc submission engine->busyness() callback has issues with CONFIG_PREEMPT_RT */
+		if (IS_ENABLED(CONFIG_PREEMPT_RT) && intel_uc_uses_guc_submission(&engine->gt->uc))
+			return -ENODEV;
 	case I915_SAMPLE_WAIT:
 		break;
 	case I915_SAMPLE_SEMA:
-- 
2.53.0

Re: [PATCH v9.6] drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing `fallthrough;` or `break;` annotation in switch case causes implicit fallthrough warning, which breaks the build.
--

commit e0b7d47d4c0056e301a2d2f6858efe90c7e7bb10
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

The busyness implementation for guc is incompatible with PMU,
so disable it to prevent upsetting lockdep.

> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 1c3bafda9c708..bd7116732285f 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -554,6 +554,9 @@ engine_event_status(struct intel_engine_cs *engine,
>  {
>  	switch (sample) {
>  	case I915_SAMPLE_BUSY:
> +		/* The guc submission engine->busyness() callback has issues with CONFIG_PREEMPT_RT */
> +		if (IS_ENABLED(CONFIG_PREEMPT_RT) && intel_uc_uses_guc_submission(&engine->gt->uc))
> +			return -ENODEV;

[Severity: Low]
Will this trigger a -Wimplicit-fallthrough compiler warning? The case now
contains statements but does not explicitly terminate with a fallthrough;
annotation before the next case.

>  	case I915_SAMPLE_WAIT:
>  		break;
>  	case I915_SAMPLE_SEMA:

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260623132734.227322-1-dev@lankhorst.se?part=1

Re: [PATCH v9.5] drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Low] The patch uses the non-existent macro `CONFIG_ENABLED()`, which causes a build failure.
- [Low] Passing a struct by value instead of a pointer to `intel_uc_uses_guc_submission()` causes a compilation error.
- [Low] Missing `fallthrough;` annotation or `break;` statement in switch case causes a `-Wimplicit-fallthrough` build error.
--

commit b45d05f8f8fec20309384c6ec58105a6c7f737dd
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915: Disable "busy" pmu event on CONFIG_PREEMPT_RT

The busyness implementation for guc is incompatible with PMU,
so disable it to prevent upsetting lockdep.

> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 1c3bafda9c708..d1949bd3b3b24 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -554,6 +554,9 @@ engine_event_status(struct intel_engine_cs *engine,
>  {
>  	switch (sample) {
>  	case I915_SAMPLE_BUSY:
> +		/* The guc submission engine->busyness() callback has issues with CONFIG_PREEMPT_RT */
> +		if (CONFIG_ENABLED(CONFIG_PREEMPT_RT) && intel_uc_uses_guc_submission(engine->gt->uc))

[Severity: Low]
Is CONFIG_ENABLED() a valid macro here? It appears this might cause a build
failure and should instead be IS_ENABLED().

Additionally, does intel_uc_uses_guc_submission() expect a pointer to the uc
struct? If uc is embedded in struct intel_gt, passing engine->gt->uc by value
will cause an incompatible type compilation error. Should this be passed as
&engine->gt->uc?

> +			return -ENODEV;

[Severity: Low]
Does this code fall through to I915_SAMPLE_WAIT when the if condition is
false? 

Now that the I915_SAMPLE_BUSY case is no longer empty, falling through without
an explicit fallthrough; annotation or a break; statement will trigger a
-Wimplicit-fallthrough warning, which breaks the build.

>  	case I915_SAMPLE_WAIT:
>  		break;
>  	case I915_SAMPLE_SEMA:

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260623125745.179419-1-dev@lankhorst.se?part=1